xref: /dragonfly/usr.sbin/cpucontrol/amd10h.c (revision ee46a572)
1 /*-
2  * Copyright (c) 2012 Andriy Gapon <avg@FreeBSD.org>.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
20  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
21  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24  */
25 
26 #include <sys/cdefs.h>
27 __FBSDID("$FreeBSD$");
28 
29 #include <sys/types.h>
30 #include <sys/stat.h>
31 #include <sys/mman.h>
32 #include <sys/ioctl.h>
33 #include <sys/ioccom.h>
34 #include <sys/cpuctl.h>
35 
36 #include <machine/cpufunc.h>
37 #include <machine/specialreg.h>
38 
39 #include <assert.h>
40 #include <stdio.h>
41 #include <stdlib.h>
42 #include <string.h>
43 #include <unistd.h>
44 #include <fcntl.h>
45 #include <err.h>
46 
47 #include "cpucontrol.h"
48 #include "amd.h"
49 
50 int
51 amd10h_probe(int fd)
52 {
53 	char vendor[13];
54 	cpuctl_cpuid_args_t idargs;
55 	uint32_t family;
56 	uint32_t signature;
57 	int error;
58 
59 	idargs.level = 0;
60 	error = ioctl(fd, CPUCTL_CPUID, &idargs);
61 	if (error < 0) {
62 		WARN(0, "ioctl()");
63 		return (1);
64 	}
65 	((uint32_t *)vendor)[0] = idargs.data[1];
66 	((uint32_t *)vendor)[1] = idargs.data[3];
67 	((uint32_t *)vendor)[2] = idargs.data[2];
68 	vendor[12] = '\0';
69 	if (strncmp(vendor, AMD_VENDOR_ID, sizeof(AMD_VENDOR_ID)) != 0)
70 		return (1);
71 
72 	idargs.level = 1;
73 	error = ioctl(fd, CPUCTL_CPUID, &idargs);
74 	if (error < 0) {
75 		WARN(0, "ioctl()");
76 		return (1);
77 	}
78 	signature = idargs.data[0];
79 	family = ((signature >> 8) & 0x0f) + ((signature >> 20) & 0xff);
80 	if (family < 0x10)
81 		return (1);
82 	return (0);
83 }
84 
85 /*
86  * NB: the format of microcode update files is not documented by AMD.
87  * It has been reverse engineered from studying Coreboot, illumos and Linux
88  * source code.
89  */
90 void
91 amd10h_update(const char *dev, const char *path)
92 {
93 	struct stat st;
94 	cpuctl_cpuid_args_t idargs;
95 	cpuctl_msr_args_t msrargs;
96 	cpuctl_update_args_t args;
97 	const amd_10h_fw_header_t *fw_header;
98 	const amd_10h_fw_header_t *selected_fw;
99 	const equiv_cpu_entry_t *equiv_cpu_table;
100 	const section_header_t *section_header;
101 	const container_header_t *container_header;
102 	const uint8_t *fw_data;
103 	uint8_t *fw_image;
104 	size_t fw_size;
105 	size_t selected_size;
106 	uint32_t revision;
107 	uint32_t new_rev;
108 	uint32_t signature;
109 	uint16_t equiv_id;
110 	int fd, devfd;
111 	unsigned int i;
112 	int error;
113 
114 	assert(path);
115 	assert(dev);
116 
117 	fd = -1;
118 	fw_image = MAP_FAILED;
119 	devfd = open(dev, O_RDWR);
120 	if (devfd < 0) {
121 		WARN(0, "could not open %s for writing", dev);
122 		return;
123 	}
124 	idargs.level = 1;
125 	error = ioctl(devfd, CPUCTL_CPUID, &idargs);
126 	if (error < 0) {
127 		WARN(0, "ioctl()");
128 		goto done;
129 	}
130 	signature = idargs.data[0];
131 
132 	msrargs.msr = 0x0000008b;
133 	error = ioctl(devfd, CPUCTL_RDMSR, &msrargs);
134 	if (error < 0) {
135 		WARN(0, "ioctl(%s)", dev);
136 		goto done;
137 	}
138 	revision = (uint32_t)msrargs.data;
139 
140 	WARNX(1, "found cpu family %#x model %#x "
141 	    "stepping %#x extfamily %#x extmodel %#x.",
142 	    (signature >> 8) & 0x0f, (signature >> 4) & 0x0f,
143 	    (signature >> 0) & 0x0f, (signature >> 20) & 0xff,
144 	    (signature >> 16) & 0x0f);
145 	WARNX(1, "microcode revision %#x", revision);
146 
147 	/*
148 	 * Open the firmware file.
149 	 */
150 	fd = open(path, O_RDONLY, 0);
151 	if (fd < 0) {
152 		WARN(0, "open(%s)", path);
153 		goto done;
154 	}
155 	error = fstat(fd, &st);
156 	if (error != 0) {
157 		WARN(0, "fstat(%s)", path);
158 		goto done;
159 	}
160 	if (st.st_size < 0 || (size_t)st.st_size <
161 	    (sizeof(*container_header) + sizeof(*section_header))) {
162 		WARNX(2, "file too short: %s", path);
163 		goto done;
164 	}
165 	fw_size = st.st_size;
166 
167 	/*
168 	 * mmap the whole image.
169 	 */
170 	fw_image = (uint8_t *)mmap(NULL, st.st_size, PROT_READ,
171 	    MAP_PRIVATE, fd, 0);
172 	if (fw_image == MAP_FAILED) {
173 		WARN(0, "mmap(%s)", path);
174 		goto done;
175 	}
176 
177 	fw_data = fw_image;
178 	container_header = (const container_header_t *)fw_data;
179 	if (container_header->magic != AMD_10H_MAGIC) {
180 		WARNX(2, "%s is not a valid amd firmware: bad magic", path);
181 		goto done;
182 	}
183 	fw_data += sizeof(*container_header);
184 	fw_size -= sizeof(*container_header);
185 
186 	section_header = (const section_header_t *)fw_data;
187 	if (section_header->type != AMD_10H_EQUIV_TABLE_TYPE) {
188 		WARNX(2, "%s is not a valid amd firmware: "
189 		    "first section is not CPU equivalence table", path);
190 		goto done;
191 	}
192 	if (section_header->size == 0) {
193 		WARNX(2, "%s is not a valid amd firmware: "
194 		    "first section is empty", path);
195 		goto done;
196 	}
197 	fw_data += sizeof(*section_header);
198 	fw_size -= sizeof(*section_header);
199 
200 	if (section_header->size > fw_size) {
201 		WARNX(2, "%s is not a valid amd firmware: "
202 		    "file is truncated", path);
203 		goto done;
204 	}
205 	if (section_header->size < sizeof(*equiv_cpu_table)) {
206 		WARNX(2, "%s is not a valid amd firmware: "
207 		    "first section is too short", path);
208 		goto done;
209 	}
210 	equiv_cpu_table = (const equiv_cpu_entry_t *)fw_data;
211 	fw_data += section_header->size;
212 	fw_size -= section_header->size;
213 
214 	equiv_id = 0;
215 	for (i = 0; equiv_cpu_table[i].installed_cpu != 0; i++) {
216 		printf("TEST %s %08x %08x\n", path, signature, equiv_cpu_table[i].installed_cpu);
217 		if (signature == equiv_cpu_table[i].installed_cpu) {
218 			equiv_id = equiv_cpu_table[i].equiv_cpu;
219 			WARNX(3, "equiv_id: %x", equiv_id);
220 			break;
221 		}
222 	}
223 	if (equiv_id == 0) {
224 		WARNX(2, "CPU is not found in the equivalence table");
225 		goto done;
226 	}
227 
228 	selected_fw = NULL;
229 	selected_size = 0;
230 	while (fw_size >= sizeof(*section_header)) {
231 		section_header = (const section_header_t *)fw_data;
232 		fw_data += sizeof(*section_header);
233 		fw_size -= sizeof(*section_header);
234 		if (section_header->type != AMD_10H_uCODE_TYPE) {
235 			WARNX(2, "%s is not a valid amd firmware: "
236 			    "section has incorret type", path);
237 			goto done;
238 		}
239 		if (section_header->size > fw_size) {
240 			WARNX(2, "%s is not a valid amd firmware: "
241 			    "file is truncated", path);
242 			goto done;
243 		}
244 		if (section_header->size < sizeof(*fw_header)) {
245 			WARNX(2, "%s is not a valid amd firmware: "
246 			    "section is too short", path);
247 			goto done;
248 		}
249 		fw_header = (const amd_10h_fw_header_t *)fw_data;
250 		fw_data += section_header->size;
251 		fw_size -= section_header->size;
252 
253 		if (fw_header->processor_rev_id != equiv_id)
254 			continue; /* different cpu */
255 		if (fw_header->patch_id <= revision)
256 			continue; /* not newer revision */
257 		if (fw_header->nb_dev_id != 0 || fw_header->sb_dev_id != 0) {
258 			WARNX(2, "Chipset-specific microcode is not supported");
259 		}
260 
261 		WARNX(3, "selecting revision: %x", fw_header->patch_id);
262 		revision = fw_header->patch_id;
263 		selected_fw = fw_header;
264 		selected_size = section_header->size;
265 	}
266 
267 	if (fw_size != 0) {
268 		WARNX(2, "%s is not a valid amd firmware: "
269 		    "file is truncated", path);
270 		goto done;
271 	}
272 
273 	if (selected_fw != NULL) {
274 		WARNX(1, "selected ucode size is %zu", selected_size);
275 		fprintf(stderr, "%s: updating cpu %s to revision %#x... ",
276 		    path, dev, revision);
277 
278 		args.data = __DECONST(void *, selected_fw);
279 		args.size = selected_size;
280 		error = ioctl(devfd, CPUCTL_UPDATE, &args);
281 		if (error < 0) {
282 			fprintf(stderr, "failed.\n");
283 			warn("ioctl()");
284 			goto done;
285 		}
286 		fprintf(stderr, "done.\n");
287 	}
288 
289 	msrargs.msr = 0x0000008b;
290 	error = ioctl(devfd, CPUCTL_RDMSR, &msrargs);
291 	if (error < 0) {
292 		WARN(0, "ioctl(%s)", dev);
293 		goto done;
294 	}
295 	new_rev = (uint32_t)msrargs.data;
296 	if (new_rev != revision)
297 		WARNX(0, "revision after update %#x", new_rev);
298 
299 done:
300 	if (fd >= 0)
301 		close(fd);
302 	if (devfd >= 0)
303 		close(devfd);
304 	if (fw_image != MAP_FAILED)
305 		if (munmap(fw_image, st.st_size) != 0)
306 			warn("munmap(%s)", path);
307 	return;
308 }
309