1 /* 2 * Copyright 1996 Massachusetts Institute of Technology 3 * 4 * Permission to use, copy, modify, and distribute this software and 5 * its documentation for any purpose and without fee is hereby 6 * granted, provided that both the above copyright notice and this 7 * permission notice appear in all copies, that both the above 8 * copyright notice and this permission notice appear in all 9 * supporting documentation, and that the name of M.I.T. not be used 10 * in advertising or publicity pertaining to distribution of the 11 * software without specific, written prior permission. M.I.T. makes 12 * no representations about the suitability of this software for any 13 * purpose. It is provided "as is" without express or implied 14 * warranty. 15 * 16 * THIS SOFTWARE IS PROVIDED BY M.I.T. ``AS IS''. M.I.T. DISCLAIMS 17 * ALL EXPRESS OR IMPLIED WARRANTIES WITH REGARD TO THIS SOFTWARE, 18 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT 20 * SHALL M.I.T. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 23 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 24 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 26 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD: src/usr.sbin/pciconf/pciconf.c,v 1.30.2.3.2.1 2009/04/15 03:14:26 kensmith Exp $ 30 */ 31 32 #include <sys/types.h> 33 #include <sys/fcntl.h> 34 35 #include <ctype.h> 36 #include <err.h> 37 #include <stdlib.h> 38 #include <stdio.h> 39 #include <string.h> 40 #include <unistd.h> 41 #include <sys/pciio.h> 42 #include <sys/queue.h> 43 44 #include <bus/pci/pcireg.h> 45 46 #include "pathnames.h" 47 #include "pciconf.h" 48 49 struct pci_device_info 50 { 51 TAILQ_ENTRY(pci_device_info) link; 52 int id; 53 char *desc; 54 }; 55 56 struct pci_vendor_info 57 { 58 TAILQ_ENTRY(pci_vendor_info) link; 59 TAILQ_HEAD(,pci_device_info) devs; 60 int id; 61 char *desc; 62 }; 63 64 TAILQ_HEAD(,pci_vendor_info) pci_vendors; 65 66 static void list_bars(int fd, struct pci_conf *p); 67 static void list_bridge(int fd, struct pci_conf *p); 68 static void list_devs(int verbose, int bars, int bridge, int caps, 69 int errors); 70 static void list_verbose(struct pci_conf *p); 71 static const char *guess_class(struct pci_conf *p); 72 static const char *guess_subclass(struct pci_conf *p); 73 static int load_vendors(void); 74 static void readit(const char *, const char *, int); 75 static void writeit(const char *, const char *, const char *, int); 76 static void chkattached(const char *); 77 78 static int exitstatus = 0; 79 80 static void 81 usage(void) 82 { 83 fprintf(stderr, "%s\n%s\n%s\n%s\n", 84 "usage: pciconf -l [-bcv]", 85 " pciconf -a selector", 86 " pciconf -r [-b | -h] selector addr[:addr2]", 87 " pciconf -w [-b | -h] selector addr value"); 88 exit (1); 89 } 90 91 int 92 main(int argc, char **argv) 93 { 94 int c; 95 int listmode, readmode, writemode, attachedmode, bars, caps, verbose; 96 int byte, isshort; 97 int errors, bridge; 98 99 listmode = readmode = writemode = 0; 100 attachedmode = bars = caps = verbose = byte = isshort = 0; 101 errors = bridge = 0; 102 103 while ((c = getopt(argc, argv, "aBbcehlrwv")) != -1) { 104 switch(c) { 105 case 'a': 106 attachedmode = 1; 107 break; 108 109 case 'B': 110 bridge = 1; 111 break; 112 113 case 'b': 114 bars = 1; 115 byte = 1; 116 break; 117 118 case 'c': 119 caps = 1; 120 break; 121 122 case 'e': 123 errors = 1; 124 break; 125 126 case 'h': 127 isshort = 1; 128 break; 129 130 case 'l': 131 listmode = 1; 132 break; 133 134 case 'r': 135 readmode = 1; 136 break; 137 138 case 'w': 139 writemode = 1; 140 break; 141 142 case 'v': 143 verbose = 1; 144 break; 145 146 default: 147 usage(); 148 } 149 } 150 151 if ((listmode && optind != argc) 152 || (writemode && optind + 3 != argc) 153 || (readmode && optind + 2 != argc) 154 || (attachedmode && optind + 1 != argc)) 155 usage(); 156 157 if (listmode) { 158 list_devs(verbose, bars, bridge, caps, errors); 159 } else if (attachedmode) { 160 chkattached(argv[optind]); 161 } else if (readmode) { 162 readit(argv[optind], argv[optind + 1], 163 byte ? 1 : isshort ? 2 : 4); 164 } else if (writemode) { 165 writeit(argv[optind], argv[optind + 1], argv[optind + 2], 166 byte ? 1 : isshort ? 2 : 4); 167 } else { 168 usage(); 169 } 170 171 return exitstatus; 172 } 173 174 static void 175 list_devs(int verbose, int bars, int bridge, int caps, int errors) 176 { 177 int fd; 178 struct pci_conf_io pc; 179 struct pci_conf conf[255], *p; 180 int none_count = 0; 181 182 if (verbose) 183 load_vendors(); 184 185 fd = open(_PATH_DEVPCI, (bridge || caps || errors) ? 186 O_RDWR : O_RDONLY, 0); 187 if (fd < 0) 188 err(1, "%s", _PATH_DEVPCI); 189 190 bzero(&pc, sizeof(struct pci_conf_io)); 191 pc.match_buf_len = sizeof(conf); 192 pc.matches = conf; 193 194 do { 195 if (ioctl(fd, PCIOCGETCONF, &pc) == -1) 196 err(1, "ioctl(PCIOCGETCONF)"); 197 198 /* 199 * 255 entries should be more than enough for most people, 200 * but if someone has more devices, and then changes things 201 * around between ioctls, we'll do the cheesy thing and 202 * just bail. The alternative would be to go back to the 203 * beginning of the list, and print things twice, which may 204 * not be desirable. 205 */ 206 if (pc.status == PCI_GETCONF_LIST_CHANGED) { 207 warnx("PCI device list changed, please try again"); 208 exitstatus = 1; 209 close(fd); 210 return; 211 } else if (pc.status == PCI_GETCONF_ERROR) { 212 warnx("error returned from PCIOCGETCONF ioctl"); 213 exitstatus = 1; 214 close(fd); 215 return; 216 } 217 for (p = conf; p < &conf[pc.num_matches]; p++) { 218 printf("%s%d@pci%d:%d:%d:%d:\tclass=0x%06x card=0x%08x " 219 "chip=0x%08x rev=0x%02x hdr=0x%02x\n", 220 (p->pd_name && *p->pd_name) ? p->pd_name : 221 "none", 222 (p->pd_name && *p->pd_name) ? (int)p->pd_unit : 223 none_count++, p->pc_sel.pc_domain, 224 p->pc_sel.pc_bus, p->pc_sel.pc_dev, 225 p->pc_sel.pc_func, (p->pc_class << 16) | 226 (p->pc_subclass << 8) | p->pc_progif, 227 (p->pc_subdevice << 16) | p->pc_subvendor, 228 (p->pc_device << 16) | p->pc_vendor, 229 p->pc_revid, p->pc_hdr); 230 if (verbose) 231 list_verbose(p); 232 if (bars) 233 list_bars(fd, p); 234 if (bridge) 235 list_bridge(fd, p); 236 if (caps) 237 list_caps(fd, p); 238 if (errors) 239 list_errors(fd, p); 240 } 241 } while (pc.status == PCI_GETCONF_MORE_DEVS); 242 243 close(fd); 244 } 245 246 static void 247 print_bus_range(int fd, struct pci_conf *p, int secreg, int subreg) 248 { 249 uint8_t secbus, subbus; 250 251 secbus = read_config(fd, &p->pc_sel, secreg, 1); 252 subbus = read_config(fd, &p->pc_sel, subreg, 1); 253 printf(" bus range = %u-%u\n", secbus, subbus); 254 } 255 256 static void 257 print_window(int reg, const char *type, int range, uint64_t base, 258 uint64_t limit) 259 { 260 261 printf(" window[%02x] = type %s, range %2d, addr %#jx-%#jx, %s\n", 262 reg, type, range, (uintmax_t)base, (uintmax_t)limit, 263 base < limit ? "enabled" : "disabled"); 264 } 265 266 static void 267 print_special_decode(int isa, int vga, int subtractive) 268 { 269 int comma; 270 271 if (isa || vga || subtractive) { 272 comma = 0; 273 printf(" decode = "); 274 if (isa) { 275 printf("ISA"); 276 comma = 1; 277 } 278 if (vga) { 279 printf("%sVGA", comma ? ", " : ""); 280 comma = 1; 281 } 282 if (subtractive) 283 printf("%ssubtractive", comma ? ", " : ""); 284 printf("\n"); 285 } 286 } 287 288 static void 289 print_bridge_windows(int fd, struct pci_conf *p) 290 { 291 uint64_t base, limit; 292 uint32_t val; 293 uint16_t bctl; 294 int subtractive; 295 int range; 296 297 /* 298 * XXX: This assumes that a window with a base and limit of 0 299 * is not implemented. In theory a window might be programmed 300 * at the smallest size with a base of 0, but those do not seem 301 * common in practice. 302 */ 303 val = read_config(fd, &p->pc_sel, PCIR_IOBASEL_1, 1); 304 if (val != 0 || read_config(fd, &p->pc_sel, PCIR_IOLIMITL_1, 1) != 0) { 305 if ((val & PCIM_BRIO_MASK) == PCIM_BRIO_32) { 306 base = PCI_PPBIOBASE( 307 read_config(fd, &p->pc_sel, PCIR_IOBASEH_1, 2), 308 val); 309 limit = PCI_PPBIOLIMIT( 310 read_config(fd, &p->pc_sel, PCIR_IOLIMITH_1, 2), 311 read_config(fd, &p->pc_sel, PCIR_IOLIMITL_1, 1)); 312 range = 32; 313 } else { 314 base = PCI_PPBIOBASE(0, val); 315 limit = PCI_PPBIOLIMIT(0, 316 read_config(fd, &p->pc_sel, PCIR_IOLIMITL_1, 1)); 317 range = 16; 318 } 319 print_window(PCIR_IOBASEL_1, "I/O Port", range, base, limit); 320 } 321 322 base = PCI_PPBMEMBASE(0, 323 read_config(fd, &p->pc_sel, PCIR_MEMBASE_1, 2)); 324 limit = PCI_PPBMEMLIMIT(0, 325 read_config(fd, &p->pc_sel, PCIR_MEMLIMIT_1, 2)); 326 print_window(PCIR_MEMBASE_1, "Memory", 32, base, limit); 327 328 val = read_config(fd, &p->pc_sel, PCIR_PMBASEL_1, 2); 329 if (val != 0 || read_config(fd, &p->pc_sel, PCIR_PMLIMITL_1, 2) != 0) { 330 if ((val & PCIM_BRPM_MASK) == PCIM_BRPM_64) { 331 base = PCI_PPBMEMBASE( 332 read_config(fd, &p->pc_sel, PCIR_PMBASEH_1, 4), 333 val); 334 limit = PCI_PPBMEMLIMIT( 335 read_config(fd, &p->pc_sel, PCIR_PMLIMITH_1, 4), 336 read_config(fd, &p->pc_sel, PCIR_PMLIMITL_1, 2)); 337 range = 64; 338 } else { 339 base = PCI_PPBMEMBASE(0, val); 340 limit = PCI_PPBMEMLIMIT(0, 341 read_config(fd, &p->pc_sel, PCIR_PMLIMITL_1, 2)); 342 range = 32; 343 } 344 print_window(PCIR_PMBASEL_1, "Prefetchable Memory", range, base, 345 limit); 346 } 347 348 /* 349 * XXX: This list of bridges that are subtractive but do not set 350 * progif to indicate it is copied from pci_pci.c. 351 */ 352 subtractive = p->pc_progif == PCIP_BRIDGE_PCI_SUBTRACTIVE; 353 switch (p->pc_device << 16 | p->pc_vendor) { 354 case 0xa002177d: /* Cavium ThunderX */ 355 case 0x124b8086: /* Intel 82380FB Mobile */ 356 case 0x060513d7: /* Toshiba ???? */ 357 subtractive = 1; 358 } 359 if (p->pc_vendor == 0x8086 && (p->pc_device & 0xff00) == 0x2400) 360 subtractive = 1; 361 362 bctl = read_config(fd, &p->pc_sel, PCIR_BRIDGECTL_1, 2); 363 print_special_decode(bctl & PCIB_BCR_ISA_ENABLE, 364 bctl & PCIB_BCR_VGA_ENABLE, subtractive); 365 } 366 367 static void 368 print_cardbus_mem_window(int fd, struct pci_conf *p, int basereg, int limitreg, 369 int prefetch) 370 { 371 372 print_window(basereg, prefetch ? "Prefetchable Memory" : "Memory", 32, 373 PCI_CBBMEMBASE(read_config(fd, &p->pc_sel, basereg, 4)), 374 PCI_CBBMEMLIMIT(read_config(fd, &p->pc_sel, limitreg, 4))); 375 } 376 377 static void 378 print_cardbus_io_window(int fd, struct pci_conf *p, int basereg, int limitreg) 379 { 380 uint32_t base, limit; 381 uint32_t val; 382 int range; 383 384 val = read_config(fd, &p->pc_sel, basereg, 2); 385 if ((val & PCIM_CBBIO_MASK) == PCIM_CBBIO_32) { 386 base = PCI_CBBIOBASE(read_config(fd, &p->pc_sel, basereg, 4)); 387 limit = PCI_CBBIOBASE(read_config(fd, &p->pc_sel, limitreg, 4)); 388 range = 32; 389 } else { 390 base = PCI_CBBIOBASE(val); 391 limit = PCI_CBBIOBASE(read_config(fd, &p->pc_sel, limitreg, 2)); 392 range = 16; 393 } 394 print_window(basereg, "I/O Port", range, base, limit); 395 } 396 397 static void 398 print_cardbus_windows(int fd, struct pci_conf *p) 399 { 400 uint16_t bctl; 401 402 bctl = read_config(fd, &p->pc_sel, PCIR_BRIDGECTL_2, 2); 403 print_cardbus_mem_window(fd, p, PCIR_MEMBASE0_2, PCIR_MEMLIMIT0_2, 404 bctl & CBB_BCR_PREFETCH_0_ENABLE); 405 print_cardbus_mem_window(fd, p, PCIR_MEMBASE1_2, PCIR_MEMLIMIT1_2, 406 bctl & CBB_BCR_PREFETCH_1_ENABLE); 407 print_cardbus_io_window(fd, p, PCIR_IOBASE0_2, PCIR_IOLIMIT0_2); 408 print_cardbus_io_window(fd, p, PCIR_IOBASE1_2, PCIR_IOLIMIT1_2); 409 print_special_decode(bctl & CBB_BCR_ISA_ENABLE, 410 bctl & CBB_BCR_VGA_ENABLE, 0); 411 } 412 413 static void 414 list_bridge(int fd, struct pci_conf *p) 415 { 416 417 switch (p->pc_hdr & PCIM_HDRTYPE) { 418 case PCIM_HDRTYPE_BRIDGE: 419 print_bus_range(fd, p, PCIR_SECBUS_1, PCIR_SUBBUS_1); 420 print_bridge_windows(fd, p); 421 break; 422 case PCIM_HDRTYPE_CARDBUS: 423 print_bus_range(fd, p, PCIR_SECBUS_2, PCIR_SUBBUS_2); 424 print_cardbus_windows(fd, p); 425 break; 426 } 427 } 428 429 static void 430 list_bars(int fd, struct pci_conf *p) 431 { 432 struct pci_bar_io bar; 433 uint64_t base; 434 const char *type; 435 int i, range, max; 436 437 switch (p->pc_hdr & PCIM_HDRTYPE) { 438 case PCIM_HDRTYPE_NORMAL: 439 max = PCIR_MAX_BAR_0; 440 break; 441 case PCIM_HDRTYPE_BRIDGE: 442 max = PCIR_MAX_BAR_1; 443 break; 444 case PCIM_HDRTYPE_CARDBUS: 445 max = PCIR_MAX_BAR_2; 446 break; 447 default: 448 return; 449 } 450 451 for (i = 0; i <= max; i++) { 452 bar.pbi_sel = p->pc_sel; 453 bar.pbi_reg = PCIR_BAR(i); 454 if (ioctl(fd, PCIOCGETBAR, &bar) < 0) 455 continue; 456 if (PCI_BAR_IO(bar.pbi_base)) { 457 type = "I/O Port"; 458 range = 32; 459 base = bar.pbi_base & PCIM_BAR_IO_BASE; 460 } else { 461 if (bar.pbi_base & PCIM_BAR_MEM_PREFETCH) 462 type = "Prefetchable Memory"; 463 else 464 type = "Memory"; 465 switch (bar.pbi_base & PCIM_BAR_MEM_TYPE) { 466 case PCIM_BAR_MEM_32: 467 range = 32; 468 break; 469 case PCIM_BAR_MEM_1MB: 470 range = 20; 471 break; 472 case PCIM_BAR_MEM_64: 473 range = 64; 474 break; 475 default: 476 range = -1; 477 } 478 base = bar.pbi_base & ~((uint64_t)0xf); 479 } 480 printf(" bar [%02x] = type %s, range %2d, base %#jx, ", 481 PCIR_BAR(i), type, range, (uintmax_t)base); 482 printf("size %2d, %s\n", (int)bar.pbi_length, 483 bar.pbi_enabled ? "enabled" : "disabled"); 484 } 485 } 486 487 static void 488 list_verbose(struct pci_conf *p) 489 { 490 struct pci_vendor_info *vi; 491 struct pci_device_info *di; 492 const char *dp; 493 494 TAILQ_FOREACH(vi, &pci_vendors, link) { 495 if (vi->id == p->pc_vendor) { 496 printf(" vendor = '%s'\n", vi->desc); 497 break; 498 } 499 } 500 if (vi == NULL) { 501 di = NULL; 502 } else { 503 TAILQ_FOREACH(di, &vi->devs, link) { 504 if (di->id == p->pc_device) { 505 printf(" device = '%s'\n", di->desc); 506 break; 507 } 508 } 509 } 510 if ((dp = guess_class(p)) != NULL) 511 printf(" class = %s\n", dp); 512 if ((dp = guess_subclass(p)) != NULL) 513 printf(" subclass = %s\n", dp); 514 } 515 516 /* 517 * This is a direct cut-and-paste from the table in sys/bus/pci/pcireg.h. 518 */ 519 static struct 520 { 521 int class; 522 int subclass; 523 const char *desc; 524 } pci_nomatch_tab[] = { 525 {PCIC_OLD, -1, "old"}, 526 {PCIC_OLD, PCIS_OLD_NONVGA, "non-VGA display device"}, 527 {PCIC_OLD, PCIS_OLD_VGA, "VGA-compatible display device"}, 528 {PCIC_STORAGE, -1, "mass storage"}, 529 {PCIC_STORAGE, PCIS_STORAGE_SCSI, "SCSI"}, 530 {PCIC_STORAGE, PCIS_STORAGE_IDE, "ATA"}, 531 {PCIC_STORAGE, PCIS_STORAGE_FLOPPY, "floppy disk"}, 532 {PCIC_STORAGE, PCIS_STORAGE_IPI, "IPI"}, 533 {PCIC_STORAGE, PCIS_STORAGE_RAID, "RAID"}, 534 {PCIC_STORAGE, PCIS_STORAGE_ATA_ADMA, "ATA (ADMA)"}, 535 {PCIC_STORAGE, PCIS_STORAGE_SATA, "SATA"}, 536 {PCIC_STORAGE, PCIS_STORAGE_SAS, "SAS"}, 537 {PCIC_NETWORK, -1, "network"}, 538 {PCIC_NETWORK, PCIS_NETWORK_ETHERNET, "ethernet"}, 539 {PCIC_NETWORK, PCIS_NETWORK_TOKENRING, "token ring"}, 540 {PCIC_NETWORK, PCIS_NETWORK_FDDI, "fddi"}, 541 {PCIC_NETWORK, PCIS_NETWORK_ATM, "ATM"}, 542 {PCIC_NETWORK, PCIS_NETWORK_ISDN, "ISDN"}, 543 {PCIC_DISPLAY, -1, "display"}, 544 {PCIC_DISPLAY, PCIS_DISPLAY_VGA, "VGA"}, 545 {PCIC_DISPLAY, PCIS_DISPLAY_XGA, "XGA"}, 546 {PCIC_DISPLAY, PCIS_DISPLAY_3D, "3D"}, 547 {PCIC_MULTIMEDIA, -1, "multimedia"}, 548 {PCIC_MULTIMEDIA, PCIS_MULTIMEDIA_VIDEO, "video"}, 549 {PCIC_MULTIMEDIA, PCIS_MULTIMEDIA_AUDIO, "audio"}, 550 {PCIC_MULTIMEDIA, PCIS_MULTIMEDIA_TELE, "telephony"}, 551 {PCIC_MULTIMEDIA, PCIS_MULTIMEDIA_HDA, "HDA"}, 552 {PCIC_MEMORY, -1, "memory"}, 553 {PCIC_MEMORY, PCIS_MEMORY_RAM, "RAM"}, 554 {PCIC_MEMORY, PCIS_MEMORY_FLASH, "flash"}, 555 {PCIC_BRIDGE, -1, "bridge"}, 556 {PCIC_BRIDGE, PCIS_BRIDGE_HOST, "HOST-PCI"}, 557 {PCIC_BRIDGE, PCIS_BRIDGE_ISA, "PCI-ISA"}, 558 {PCIC_BRIDGE, PCIS_BRIDGE_EISA, "PCI-EISA"}, 559 {PCIC_BRIDGE, PCIS_BRIDGE_MCA, "PCI-MCA"}, 560 {PCIC_BRIDGE, PCIS_BRIDGE_PCI, "PCI-PCI"}, 561 {PCIC_BRIDGE, PCIS_BRIDGE_PCMCIA, "PCI-PCMCIA"}, 562 {PCIC_BRIDGE, PCIS_BRIDGE_NUBUS, "PCI-NuBus"}, 563 {PCIC_BRIDGE, PCIS_BRIDGE_CARDBUS, "PCI-CardBus"}, 564 {PCIC_BRIDGE, PCIS_BRIDGE_RACEWAY, "PCI-RACEway"}, 565 {PCIC_SIMPLECOMM, -1, "simple comms"}, 566 {PCIC_SIMPLECOMM, PCIS_SIMPLECOMM_UART, "UART"}, /* could detect 16550 */ 567 {PCIC_SIMPLECOMM, PCIS_SIMPLECOMM_PAR, "parallel port"}, 568 {PCIC_SIMPLECOMM, PCIS_SIMPLECOMM_MULSER, "multiport serial"}, 569 {PCIC_SIMPLECOMM, PCIS_SIMPLECOMM_MODEM, "generic modem"}, 570 {PCIC_BASEPERIPH, -1, "base peripheral"}, 571 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_PIC, "interrupt controller"}, 572 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_DMA, "DMA controller"}, 573 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_TIMER, "timer"}, 574 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_RTC, "realtime clock"}, 575 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_PCIHOT, "PCI hot-plug controller"}, 576 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_SDHC, "SD host controller"}, 577 {PCIC_INPUTDEV, -1, "input device"}, 578 {PCIC_INPUTDEV, PCIS_INPUTDEV_KEYBOARD, "keyboard"}, 579 {PCIC_INPUTDEV, PCIS_INPUTDEV_DIGITIZER,"digitizer"}, 580 {PCIC_INPUTDEV, PCIS_INPUTDEV_MOUSE, "mouse"}, 581 {PCIC_INPUTDEV, PCIS_INPUTDEV_SCANNER, "scanner"}, 582 {PCIC_INPUTDEV, PCIS_INPUTDEV_GAMEPORT, "gameport"}, 583 {PCIC_DOCKING, -1, "docking station"}, 584 {PCIC_PROCESSOR, -1, "processor"}, 585 {PCIC_SERIALBUS, -1, "serial bus"}, 586 {PCIC_SERIALBUS, PCIS_SERIALBUS_FW, "FireWire"}, 587 {PCIC_SERIALBUS, PCIS_SERIALBUS_ACCESS, "AccessBus"}, 588 {PCIC_SERIALBUS, PCIS_SERIALBUS_SSA, "SSA"}, 589 {PCIC_SERIALBUS, PCIS_SERIALBUS_USB, "USB"}, 590 {PCIC_SERIALBUS, PCIS_SERIALBUS_FC, "Fibre Channel"}, 591 {PCIC_SERIALBUS, PCIS_SERIALBUS_SMBUS, "SMBus"}, 592 {PCIC_WIRELESS, -1, "wireless controller"}, 593 {PCIC_WIRELESS, PCIS_WIRELESS_IRDA, "iRDA"}, 594 {PCIC_WIRELESS, PCIS_WIRELESS_IR, "IR"}, 595 {PCIC_WIRELESS, PCIS_WIRELESS_RF, "RF"}, 596 {PCIC_INTELLIIO, -1, "intelligent I/O controller"}, 597 {PCIC_INTELLIIO, PCIS_INTELLIIO_I2O, "I2O"}, 598 {PCIC_SATCOM, -1, "satellite communication"}, 599 {PCIC_SATCOM, PCIS_SATCOM_TV, "sat TV"}, 600 {PCIC_SATCOM, PCIS_SATCOM_AUDIO, "sat audio"}, 601 {PCIC_SATCOM, PCIS_SATCOM_VOICE, "sat voice"}, 602 {PCIC_SATCOM, PCIS_SATCOM_DATA, "sat data"}, 603 {PCIC_CRYPTO, -1, "encrypt/decrypt"}, 604 {PCIC_CRYPTO, PCIS_CRYPTO_NETCOMP, "network/computer crypto"}, 605 {PCIC_CRYPTO, PCIS_CRYPTO_NETCOMP, "entertainment crypto"}, 606 {PCIC_DASP, -1, "dasp"}, 607 {PCIC_DASP, PCIS_DASP_DPIO, "DPIO module"}, 608 {0, 0, NULL} 609 }; 610 611 static const char * 612 guess_class(struct pci_conf *p) 613 { 614 int i; 615 616 for (i = 0; pci_nomatch_tab[i].desc != NULL; i++) { 617 if (pci_nomatch_tab[i].class == p->pc_class) 618 return(pci_nomatch_tab[i].desc); 619 } 620 return(NULL); 621 } 622 623 static const char * 624 guess_subclass(struct pci_conf *p) 625 { 626 int i; 627 628 for (i = 0; pci_nomatch_tab[i].desc != NULL; i++) { 629 if ((pci_nomatch_tab[i].class == p->pc_class) && 630 (pci_nomatch_tab[i].subclass == p->pc_subclass)) 631 return(pci_nomatch_tab[i].desc); 632 } 633 return(NULL); 634 } 635 636 static int 637 load_vendors(void) 638 { 639 const char *dbf; 640 FILE *db; 641 struct pci_vendor_info *cv; 642 struct pci_device_info *cd; 643 char buf[1024], str[1024]; 644 char *ch; 645 int id, error; 646 647 /* 648 * Locate the database and initialise. 649 */ 650 TAILQ_INIT(&pci_vendors); 651 if ((dbf = getenv("PCICONF_VENDOR_DATABASE")) == NULL) 652 dbf = _PATH_PCIVDB; 653 if ((db = fopen(dbf, "r")) == NULL) 654 return(1); 655 cv = NULL; 656 cd = NULL; 657 error = 0; 658 659 /* 660 * Scan input lines from the database 661 */ 662 for (;;) { 663 if (fgets(buf, sizeof(buf), db) == NULL) 664 break; 665 666 if ((ch = strchr(buf, '#')) != NULL) 667 *ch = '\0'; 668 ch = strchr(buf, '\0') - 1; 669 while (ch > buf && isspace(*ch)) 670 *ch-- = '\0'; 671 if (ch <= buf) 672 continue; 673 674 /* Can't handle subvendor / subdevice entries yet */ 675 if (buf[0] == '\t' && buf[1] == '\t') 676 continue; 677 678 /* Check for vendor entry */ 679 if (buf[0] != '\t' && sscanf(buf, "%04x %[^\n]", &id, str) == 2) { 680 if ((id == 0) || (strlen(str) < 1)) 681 continue; 682 if ((cv = malloc(sizeof(struct pci_vendor_info))) == NULL) { 683 warn("allocating vendor entry"); 684 error = 1; 685 break; 686 } 687 if ((cv->desc = strdup(str)) == NULL) { 688 free(cv); 689 warn("allocating vendor description"); 690 error = 1; 691 break; 692 } 693 cv->id = id; 694 TAILQ_INIT(&cv->devs); 695 TAILQ_INSERT_TAIL(&pci_vendors, cv, link); 696 continue; 697 } 698 699 /* Check for device entry */ 700 if (buf[0] == '\t' && sscanf(buf + 1, "%04x %[^\n]", &id, str) == 2) { 701 if ((id == 0) || (strlen(str) < 1)) 702 continue; 703 if (cv == NULL) { 704 warnx("device entry with no vendor!"); 705 continue; 706 } 707 if ((cd = malloc(sizeof(struct pci_device_info))) == NULL) { 708 warn("allocating device entry"); 709 error = 1; 710 break; 711 } 712 if ((cd->desc = strdup(str)) == NULL) { 713 free(cd); 714 warn("allocating device description"); 715 error = 1; 716 break; 717 } 718 cd->id = id; 719 TAILQ_INSERT_TAIL(&cv->devs, cd, link); 720 continue; 721 } 722 723 /* It's a comment or junk, ignore it */ 724 } 725 if (ferror(db)) 726 error = 1; 727 fclose(db); 728 729 return(error); 730 } 731 732 uint32_t 733 read_config(int fd, struct pcisel *sel, long reg, int width) 734 { 735 struct pci_io pi; 736 737 pi.pi_sel = *sel; 738 pi.pi_reg = reg; 739 pi.pi_width = width; 740 741 if (ioctl(fd, PCIOCREAD, &pi) < 0) 742 err(1, "ioctl(PCIOCREAD)"); 743 744 return (pi.pi_data); 745 } 746 747 static struct pcisel 748 getsel(const char *str) 749 { 750 char *ep = strchr(str, '@'); 751 char *epbase; 752 struct pcisel sel = {0,0,0,0}; 753 unsigned long selarr[4]; 754 int i; 755 756 if (ep == NULL) 757 ep = __DECONST(char *, str); 758 else 759 ep++; 760 761 epbase = ep; 762 763 if (strncmp(ep, "pci", 3) == 0) { 764 ep += 3; 765 i = 0; 766 do { 767 selarr[i++] = strtoul(ep, &ep, 10); 768 } while ((*ep == ':' || *ep == '.') && *++ep != '\0' && i < 4); 769 770 if (i > 2) 771 sel.pc_func = selarr[--i]; 772 else 773 sel.pc_func = 0; 774 sel.pc_dev = selarr[--i]; 775 sel.pc_bus = selarr[--i]; 776 if (i > 0) 777 sel.pc_domain = selarr[--i]; 778 else 779 sel.pc_domain = 0; 780 } 781 if (*ep != '\x0' || ep == epbase) 782 errx(1, "cannot parse selector %s", str); 783 return sel; 784 } 785 786 static void 787 readone(int fd, struct pcisel *sel, long reg, int width) 788 { 789 790 printf("%0*x", width*2, read_config(fd, sel, reg, width)); 791 } 792 793 static void 794 readit(const char *name, const char *reg, int width) 795 { 796 long rstart; 797 long rend; 798 long r; 799 char *end; 800 int i; 801 int fd; 802 struct pcisel sel; 803 804 fd = open(_PATH_DEVPCI, O_RDWR, 0); 805 if (fd < 0) 806 err(1, "%s", _PATH_DEVPCI); 807 808 rend = rstart = strtol(reg, &end, 0); 809 if (end && *end == ':') { 810 end++; 811 rend = strtol(end, (char **) 0, 0); 812 } 813 sel = getsel(name); 814 for (i = 1, r = rstart; r <= rend; i++, r += width) { 815 readone(fd, &sel, r, width); 816 if (i && !(i % 8)) 817 putchar(' '); 818 putchar(i % (16/width) ? ' ' : '\n'); 819 } 820 if (i % (16/width) != 1) 821 putchar('\n'); 822 close(fd); 823 } 824 825 static void 826 writeit(const char *name, const char *reg, const char *data, int width) 827 { 828 int fd; 829 struct pci_io pi; 830 831 pi.pi_sel = getsel(name); 832 pi.pi_reg = strtoul(reg, (char **)0, 0); /* XXX error check */ 833 pi.pi_width = width; 834 pi.pi_data = strtoul(data, (char **)0, 0); /* XXX error check */ 835 836 fd = open(_PATH_DEVPCI, O_RDWR, 0); 837 if (fd < 0) 838 err(1, "%s", _PATH_DEVPCI); 839 840 if (ioctl(fd, PCIOCWRITE, &pi) < 0) 841 err(1, "ioctl(PCIOCWRITE)"); 842 } 843 844 static void 845 chkattached(const char *name) 846 { 847 int fd; 848 struct pci_io pi; 849 850 pi.pi_sel = getsel(name); 851 852 fd = open(_PATH_DEVPCI, O_RDWR, 0); 853 if (fd < 0) 854 err(1, "%s", _PATH_DEVPCI); 855 856 if (ioctl(fd, PCIOCATTACHED, &pi) < 0) 857 err(1, "ioctl(PCIOCATTACHED)"); 858 859 exitstatus = pi.pi_data ? 0 : 2; /* exit(2), if NOT attached */ 860 printf("%s: %s%s\n", name, pi.pi_data == 0 ? "not " : "", "attached"); 861 } 862