1072a4ba8SAndrew Turner /*
2072a4ba8SAndrew Turner  * Single-precision vector asinh(x) function.
3072a4ba8SAndrew Turner  *
4072a4ba8SAndrew Turner  * Copyright (c) 2022-2023, Arm Limited.
5072a4ba8SAndrew Turner  * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
6072a4ba8SAndrew Turner  */
7072a4ba8SAndrew Turner 
8072a4ba8SAndrew Turner #include "v_math.h"
9072a4ba8SAndrew Turner #include "pl_sig.h"
10072a4ba8SAndrew Turner #include "pl_test.h"
11072a4ba8SAndrew Turner #include "v_log1pf_inline.h"
12072a4ba8SAndrew Turner 
13*5a02ffc3SAndrew Turner #define SignMask v_u32 (0x80000000)
14*5a02ffc3SAndrew Turner 
15*5a02ffc3SAndrew Turner const static struct data
16*5a02ffc3SAndrew Turner {
17*5a02ffc3SAndrew Turner   struct v_log1pf_data log1pf_consts;
18*5a02ffc3SAndrew Turner   uint32x4_t big_bound;
19*5a02ffc3SAndrew Turner #if WANT_SIMD_EXCEPT
20*5a02ffc3SAndrew Turner   uint32x4_t tiny_bound;
21*5a02ffc3SAndrew Turner #endif
22*5a02ffc3SAndrew Turner } data = {
23*5a02ffc3SAndrew Turner   .log1pf_consts = V_LOG1PF_CONSTANTS_TABLE,
24*5a02ffc3SAndrew Turner   .big_bound = V4 (0x5f800000), /* asuint(0x1p64).  */
25*5a02ffc3SAndrew Turner #if WANT_SIMD_EXCEPT
26*5a02ffc3SAndrew Turner   .tiny_bound = V4 (0x30800000) /* asuint(0x1p-30).  */
27*5a02ffc3SAndrew Turner #endif
28*5a02ffc3SAndrew Turner };
29*5a02ffc3SAndrew Turner 
30*5a02ffc3SAndrew Turner static float32x4_t NOINLINE VPCS_ATTR
special_case(float32x4_t x,float32x4_t y,uint32x4_t special)31*5a02ffc3SAndrew Turner special_case (float32x4_t x, float32x4_t y, uint32x4_t special)
32072a4ba8SAndrew Turner {
33072a4ba8SAndrew Turner   return v_call_f32 (asinhf, x, y, special);
34072a4ba8SAndrew Turner }
35072a4ba8SAndrew Turner 
36072a4ba8SAndrew Turner /* Single-precision implementation of vector asinh(x), using vector log1p.
37072a4ba8SAndrew Turner    Worst-case error is 2.66 ULP, at roughly +/-0.25:
38072a4ba8SAndrew Turner    __v_asinhf(0x1.01b04p-2) got 0x1.fe163ep-3 want 0x1.fe1638p-3.  */
V_NAME_F1(asinh)39*5a02ffc3SAndrew Turner VPCS_ATTR float32x4_t V_NAME_F1 (asinh) (float32x4_t x)
40072a4ba8SAndrew Turner {
41*5a02ffc3SAndrew Turner   const struct data *dat = ptr_barrier (&data);
42*5a02ffc3SAndrew Turner   uint32x4_t iax = vbicq_u32 (vreinterpretq_u32_f32 (x), SignMask);
43*5a02ffc3SAndrew Turner   float32x4_t ax = vreinterpretq_f32_u32 (iax);
44*5a02ffc3SAndrew Turner   uint32x4_t special = vcgeq_u32 (iax, dat->big_bound);
45*5a02ffc3SAndrew Turner   float32x4_t special_arg = x;
46072a4ba8SAndrew Turner 
47072a4ba8SAndrew Turner #if WANT_SIMD_EXCEPT
48072a4ba8SAndrew Turner   /* Sidestep tiny and large values to avoid inadvertently triggering
49072a4ba8SAndrew Turner      under/overflow.  */
50*5a02ffc3SAndrew Turner   special = vorrq_u32 (special, vcltq_u32 (iax, dat->tiny_bound));
51072a4ba8SAndrew Turner   if (unlikely (v_any_u32 (special)))
52*5a02ffc3SAndrew Turner     {
53*5a02ffc3SAndrew Turner       ax = v_zerofy_f32 (ax, special);
54*5a02ffc3SAndrew Turner       x = v_zerofy_f32 (x, special);
55*5a02ffc3SAndrew Turner     }
56072a4ba8SAndrew Turner #endif
57072a4ba8SAndrew Turner 
58072a4ba8SAndrew Turner   /* asinh(x) = log(x + sqrt(x * x + 1)).
59072a4ba8SAndrew Turner      For positive x, asinh(x) = log1p(x + x * x / (1 + sqrt(x * x + 1))).  */
60*5a02ffc3SAndrew Turner   float32x4_t d
61*5a02ffc3SAndrew Turner       = vaddq_f32 (v_f32 (1), vsqrtq_f32 (vfmaq_f32 (v_f32 (1), x, x)));
62*5a02ffc3SAndrew Turner   float32x4_t y = log1pf_inline (
63*5a02ffc3SAndrew Turner       vaddq_f32 (ax, vdivq_f32 (vmulq_f32 (ax, ax), d)), dat->log1pf_consts);
64072a4ba8SAndrew Turner 
65072a4ba8SAndrew Turner   if (unlikely (v_any_u32 (special)))
66*5a02ffc3SAndrew Turner     return special_case (special_arg, vbslq_f32 (SignMask, x, y), special);
67*5a02ffc3SAndrew Turner   return vbslq_f32 (SignMask, x, y);
68072a4ba8SAndrew Turner }
69072a4ba8SAndrew Turner 
70072a4ba8SAndrew Turner PL_SIG (V, F, 1, asinh, -10.0, 10.0)
71*5a02ffc3SAndrew Turner PL_TEST_ULP (V_NAME_F1 (asinh), 2.17)
72*5a02ffc3SAndrew Turner PL_TEST_EXPECT_FENV (V_NAME_F1 (asinh), WANT_SIMD_EXCEPT)
73*5a02ffc3SAndrew Turner PL_TEST_INTERVAL (V_NAME_F1 (asinh), 0, 0x1p-12, 40000)
74*5a02ffc3SAndrew Turner PL_TEST_INTERVAL (V_NAME_F1 (asinh), 0x1p-12, 1.0, 40000)
75*5a02ffc3SAndrew Turner PL_TEST_INTERVAL (V_NAME_F1 (asinh), 1.0, 0x1p11, 40000)
76*5a02ffc3SAndrew Turner PL_TEST_INTERVAL (V_NAME_F1 (asinh), 0x1p11, inf, 40000)
77*5a02ffc3SAndrew Turner PL_TEST_INTERVAL (V_NAME_F1 (asinh), -0, -0x1p-12, 20000)
78*5a02ffc3SAndrew Turner PL_TEST_INTERVAL (V_NAME_F1 (asinh), -0x1p-12, -1.0, 20000)
79*5a02ffc3SAndrew Turner PL_TEST_INTERVAL (V_NAME_F1 (asinh), -1.0, -0x1p11, 20000)
80*5a02ffc3SAndrew Turner PL_TEST_INTERVAL (V_NAME_F1 (asinh), -0x1p11, -inf, 20000)
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