1072a4ba8SAndrew Turner /*
2072a4ba8SAndrew Turner * Single-precision vector atanh(x) function.
3072a4ba8SAndrew Turner *
4072a4ba8SAndrew Turner * Copyright (c) 2022-2023, Arm Limited.
5072a4ba8SAndrew Turner * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
6072a4ba8SAndrew Turner */
7072a4ba8SAndrew Turner
8072a4ba8SAndrew Turner #include "v_math.h"
9072a4ba8SAndrew Turner #include "pl_sig.h"
10072a4ba8SAndrew Turner #include "pl_test.h"
11072a4ba8SAndrew Turner #include "v_log1pf_inline.h"
12072a4ba8SAndrew Turner
13*5a02ffc3SAndrew Turner const static struct data
14*5a02ffc3SAndrew Turner {
15*5a02ffc3SAndrew Turner struct v_log1pf_data log1pf_consts;
16*5a02ffc3SAndrew Turner uint32x4_t one;
17*5a02ffc3SAndrew Turner #if WANT_SIMD_EXCEPT
18*5a02ffc3SAndrew Turner uint32x4_t tiny_bound;
19*5a02ffc3SAndrew Turner #endif
20*5a02ffc3SAndrew Turner } data = {
21*5a02ffc3SAndrew Turner .log1pf_consts = V_LOG1PF_CONSTANTS_TABLE,
22*5a02ffc3SAndrew Turner .one = V4 (0x3f800000),
23*5a02ffc3SAndrew Turner #if WANT_SIMD_EXCEPT
24*5a02ffc3SAndrew Turner /* 0x1p-12, below which atanhf(x) rounds to x. */
25*5a02ffc3SAndrew Turner .tiny_bound = V4 (0x39800000),
26*5a02ffc3SAndrew Turner #endif
27*5a02ffc3SAndrew Turner };
28*5a02ffc3SAndrew Turner
29*5a02ffc3SAndrew Turner #define AbsMask v_u32 (0x7fffffff)
30*5a02ffc3SAndrew Turner #define Half v_u32 (0x3f000000)
31*5a02ffc3SAndrew Turner
32*5a02ffc3SAndrew Turner static float32x4_t NOINLINE VPCS_ATTR
special_case(float32x4_t x,float32x4_t y,uint32x4_t special)33*5a02ffc3SAndrew Turner special_case (float32x4_t x, float32x4_t y, uint32x4_t special)
34*5a02ffc3SAndrew Turner {
35*5a02ffc3SAndrew Turner return v_call_f32 (atanhf, x, y, special);
36*5a02ffc3SAndrew Turner }
37072a4ba8SAndrew Turner
38072a4ba8SAndrew Turner /* Approximation for vector single-precision atanh(x) using modified log1p.
39072a4ba8SAndrew Turner The maximum error is 3.08 ULP:
40072a4ba8SAndrew Turner __v_atanhf(0x1.ff215p-5) got 0x1.ffcb7cp-5
41072a4ba8SAndrew Turner want 0x1.ffcb82p-5. */
V_NAME_F1(atanh)42*5a02ffc3SAndrew Turner VPCS_ATTR float32x4_t V_NAME_F1 (atanh) (float32x4_t x)
43072a4ba8SAndrew Turner {
44*5a02ffc3SAndrew Turner const struct data *d = ptr_barrier (&data);
45072a4ba8SAndrew Turner
46*5a02ffc3SAndrew Turner float32x4_t halfsign = vbslq_f32 (AbsMask, v_f32 (0.5), x);
47*5a02ffc3SAndrew Turner float32x4_t ax = vabsq_f32 (x);
48*5a02ffc3SAndrew Turner uint32x4_t iax = vreinterpretq_u32_f32 (ax);
49072a4ba8SAndrew Turner
50072a4ba8SAndrew Turner #if WANT_SIMD_EXCEPT
51*5a02ffc3SAndrew Turner uint32x4_t special
52*5a02ffc3SAndrew Turner = vorrq_u32 (vcgeq_u32 (iax, d->one), vcltq_u32 (iax, d->tiny_bound));
53072a4ba8SAndrew Turner /* Side-step special cases by setting those lanes to 0, which will trigger no
54072a4ba8SAndrew Turner exceptions. These will be fixed up later. */
55072a4ba8SAndrew Turner if (unlikely (v_any_u32 (special)))
56*5a02ffc3SAndrew Turner ax = v_zerofy_f32 (ax, special);
57072a4ba8SAndrew Turner #else
58*5a02ffc3SAndrew Turner uint32x4_t special = vcgeq_u32 (iax, d->one);
59072a4ba8SAndrew Turner #endif
60072a4ba8SAndrew Turner
61*5a02ffc3SAndrew Turner float32x4_t y = vdivq_f32 (vaddq_f32 (ax, ax), vsubq_f32 (v_f32 (1), ax));
62*5a02ffc3SAndrew Turner y = log1pf_inline (y, d->log1pf_consts);
63072a4ba8SAndrew Turner
64072a4ba8SAndrew Turner if (unlikely (v_any_u32 (special)))
65*5a02ffc3SAndrew Turner return special_case (x, vmulq_f32 (halfsign, y), special);
66*5a02ffc3SAndrew Turner return vmulq_f32 (halfsign, y);
67072a4ba8SAndrew Turner }
68072a4ba8SAndrew Turner
69072a4ba8SAndrew Turner PL_SIG (V, F, 1, atanh, -1.0, 1.0)
70*5a02ffc3SAndrew Turner PL_TEST_ULP (V_NAME_F1 (atanh), 2.59)
71*5a02ffc3SAndrew Turner PL_TEST_EXPECT_FENV (V_NAME_F1 (atanh), WANT_SIMD_EXCEPT)
72*5a02ffc3SAndrew Turner /* atanh is asymptotic at 1, which is the default control value - have to set
73*5a02ffc3SAndrew Turner -c 0 specially to ensure fp exceptions are triggered correctly (choice of
74*5a02ffc3SAndrew Turner control lane is irrelevant if fp exceptions are disabled). */
75*5a02ffc3SAndrew Turner PL_TEST_SYM_INTERVAL_C (V_NAME_F1 (atanh), 0, 0x1p-12, 500, 0)
76*5a02ffc3SAndrew Turner PL_TEST_SYM_INTERVAL_C (V_NAME_F1 (atanh), 0x1p-12, 1, 200000, 0)
77*5a02ffc3SAndrew Turner PL_TEST_SYM_INTERVAL_C (V_NAME_F1 (atanh), 1, inf, 1000, 0)
78