1072a4ba8SAndrew Turner /*
2072a4ba8SAndrew Turner  * Single-precision vector log10 function.
3072a4ba8SAndrew Turner  *
4072a4ba8SAndrew Turner  * Copyright (c) 2020-2023, Arm Limited.
5072a4ba8SAndrew Turner  * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
6072a4ba8SAndrew Turner  */
7072a4ba8SAndrew Turner 
8072a4ba8SAndrew Turner #include "v_math.h"
9*5a02ffc3SAndrew Turner #include "poly_advsimd_f32.h"
10072a4ba8SAndrew Turner #include "pl_sig.h"
11072a4ba8SAndrew Turner #include "pl_test.h"
12072a4ba8SAndrew Turner 
13*5a02ffc3SAndrew Turner static const struct data
14*5a02ffc3SAndrew Turner {
15*5a02ffc3SAndrew Turner   uint32x4_t min_norm;
16*5a02ffc3SAndrew Turner   uint16x8_t special_bound;
17*5a02ffc3SAndrew Turner   float32x4_t poly[8];
18*5a02ffc3SAndrew Turner   float32x4_t inv_ln10, ln2;
19*5a02ffc3SAndrew Turner   uint32x4_t off, mantissa_mask;
20*5a02ffc3SAndrew Turner } data = {
21*5a02ffc3SAndrew Turner   /* Use order 9 for log10(1+x), i.e. order 8 for log10(1+x)/x, with x in
22*5a02ffc3SAndrew Turner       [-1/3, 1/3] (offset=2/3). Max. relative error: 0x1.068ee468p-25.  */
23*5a02ffc3SAndrew Turner   .poly = { V4 (-0x1.bcb79cp-3f), V4 (0x1.2879c8p-3f), V4 (-0x1.bcd472p-4f),
24*5a02ffc3SAndrew Turner 	    V4 (0x1.6408f8p-4f), V4 (-0x1.246f8p-4f), V4 (0x1.f0e514p-5f),
25*5a02ffc3SAndrew Turner 	    V4 (-0x1.0fc92cp-4f), V4 (0x1.f5f76ap-5f) },
26*5a02ffc3SAndrew Turner   .ln2 = V4 (0x1.62e43p-1f),
27*5a02ffc3SAndrew Turner   .inv_ln10 = V4 (0x1.bcb7b2p-2f),
28*5a02ffc3SAndrew Turner   .min_norm = V4 (0x00800000),
29*5a02ffc3SAndrew Turner   .special_bound = V8 (0x7f00), /* asuint32(inf) - min_norm.  */
30*5a02ffc3SAndrew Turner   .off = V4 (0x3f2aaaab),	/* 0.666667.  */
31*5a02ffc3SAndrew Turner   .mantissa_mask = V4 (0x007fffff),
32*5a02ffc3SAndrew Turner };
33072a4ba8SAndrew Turner 
34*5a02ffc3SAndrew Turner static float32x4_t VPCS_ATTR NOINLINE
special_case(float32x4_t x,float32x4_t y,float32x4_t p,float32x4_t r2,uint16x4_t cmp)35*5a02ffc3SAndrew Turner special_case (float32x4_t x, float32x4_t y, float32x4_t p, float32x4_t r2,
36*5a02ffc3SAndrew Turner 	      uint16x4_t cmp)
37072a4ba8SAndrew Turner {
38072a4ba8SAndrew Turner   /* Fall back to scalar code.  */
39*5a02ffc3SAndrew Turner   return v_call_f32 (log10f, x, vfmaq_f32 (y, p, r2), vmovl_u16 (cmp));
40072a4ba8SAndrew Turner }
41072a4ba8SAndrew Turner 
42*5a02ffc3SAndrew Turner /* Fast implementation of AdvSIMD log10f,
43*5a02ffc3SAndrew Turner    uses a similar approach as AdvSIMD logf with the same offset (i.e., 2/3) and
44*5a02ffc3SAndrew Turner    an order 9 polynomial.
45072a4ba8SAndrew Turner    Maximum error: 3.305ulps (nearest rounding.)
46*5a02ffc3SAndrew Turner    _ZGVnN4v_log10f(0x1.555c16p+0) got 0x1.ffe2fap-4
47*5a02ffc3SAndrew Turner 				 want 0x1.ffe2f4p-4.  */
V_NAME_F1(log10)48*5a02ffc3SAndrew Turner float32x4_t VPCS_ATTR V_NAME_F1 (log10) (float32x4_t x)
49072a4ba8SAndrew Turner {
50*5a02ffc3SAndrew Turner   const struct data *d = ptr_barrier (&data);
51*5a02ffc3SAndrew Turner   uint32x4_t u = vreinterpretq_u32_f32 (x);
52*5a02ffc3SAndrew Turner   uint16x4_t special = vcge_u16 (vsubhn_u32 (u, d->min_norm),
53*5a02ffc3SAndrew Turner 				 vget_low_u16 (d->special_bound));
54072a4ba8SAndrew Turner 
55072a4ba8SAndrew Turner   /* x = 2^n * (1+r), where 2/3 < 1+r < 4/3.  */
56*5a02ffc3SAndrew Turner   u = vsubq_u32 (u, d->off);
57*5a02ffc3SAndrew Turner   float32x4_t n = vcvtq_f32_s32 (
58*5a02ffc3SAndrew Turner       vshrq_n_s32 (vreinterpretq_s32_u32 (u), 23)); /* signextend.  */
59*5a02ffc3SAndrew Turner   u = vaddq_u32 (vandq_u32 (u, d->mantissa_mask), d->off);
60*5a02ffc3SAndrew Turner   float32x4_t r = vsubq_f32 (vreinterpretq_f32_u32 (u), v_f32 (1.0f));
61072a4ba8SAndrew Turner 
62072a4ba8SAndrew Turner   /* y = log10(1+r) + n * log10(2).  */
63*5a02ffc3SAndrew Turner   float32x4_t r2 = vmulq_f32 (r, r);
64*5a02ffc3SAndrew Turner   float32x4_t poly = v_pw_horner_7_f32 (r, r2, d->poly);
65*5a02ffc3SAndrew Turner   /* y = Log10(2) * n + poly * InvLn(10).  */
66*5a02ffc3SAndrew Turner   float32x4_t y = vfmaq_f32 (r, d->ln2, n);
67*5a02ffc3SAndrew Turner   y = vmulq_f32 (y, d->inv_ln10);
68072a4ba8SAndrew Turner 
69*5a02ffc3SAndrew Turner   if (unlikely (v_any_u16h (special)))
70*5a02ffc3SAndrew Turner     return special_case (x, y, poly, r2, special);
71*5a02ffc3SAndrew Turner   return vfmaq_f32 (y, poly, r2);
72072a4ba8SAndrew Turner }
73072a4ba8SAndrew Turner 
74072a4ba8SAndrew Turner PL_SIG (V, F, 1, log10, 0.01, 11.1)
75*5a02ffc3SAndrew Turner PL_TEST_ULP (V_NAME_F1 (log10), 2.81)
76*5a02ffc3SAndrew Turner PL_TEST_EXPECT_FENV_ALWAYS (V_NAME_F1 (log10))
77*5a02ffc3SAndrew Turner PL_TEST_INTERVAL (V_NAME_F1 (log10), -0.0, -inf, 100)
78*5a02ffc3SAndrew Turner PL_TEST_INTERVAL (V_NAME_F1 (log10), 0, 0x1p-126, 100)
79*5a02ffc3SAndrew Turner PL_TEST_INTERVAL (V_NAME_F1 (log10), 0x1p-126, 0x1p-23, 50000)
80*5a02ffc3SAndrew Turner PL_TEST_INTERVAL (V_NAME_F1 (log10), 0x1p-23, 1.0, 50000)
81*5a02ffc3SAndrew Turner PL_TEST_INTERVAL (V_NAME_F1 (log10), 1.0, 100, 50000)
82*5a02ffc3SAndrew Turner PL_TEST_INTERVAL (V_NAME_F1 (log10), 100, inf, 50000)
83