10b57cec5SDimitry Andric//===-- BuiltinsHexagon.def - Hexagon Builtin function database --*- C++ -*-==// 20b57cec5SDimitry Andric// 30b57cec5SDimitry Andric// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric// See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric// 70b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric// 90b57cec5SDimitry Andric// This file defines the Hexagon-specific builtin function database. Users of 100b57cec5SDimitry Andric// this file must define the BUILTIN macro to make use of this information. 110b57cec5SDimitry Andric// 120b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 130b57cec5SDimitry Andric 140b57cec5SDimitry Andric// The format of this database matches clang/Basic/Builtins.def. 150b57cec5SDimitry Andric 165ffd83dbSDimitry Andric#if defined(BUILTIN) && !defined(TARGET_BUILTIN) 175ffd83dbSDimitry Andric# define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) BUILTIN(ID, TYPE, ATTRS) 185ffd83dbSDimitry Andric#endif 195ffd83dbSDimitry Andric 20bdd1243dSDimitry Andric#pragma push_macro("V73") 21bdd1243dSDimitry Andric#define V73 "v73" 22bdd1243dSDimitry Andric#pragma push_macro("V71") 23bdd1243dSDimitry Andric#define V71 "v71|" V73 240eae32dcSDimitry Andric#pragma push_macro("V69") 25bdd1243dSDimitry Andric#define V69 "v69|" V71 26fe6060f1SDimitry Andric#pragma push_macro("V68") 270eae32dcSDimitry Andric#define V68 "v68|" V69 285ffd83dbSDimitry Andric#pragma push_macro("V67") 29fe6060f1SDimitry Andric#define V67 "v67|" V68 305ffd83dbSDimitry Andric#pragma push_macro("V66") 315ffd83dbSDimitry Andric#define V66 "v66|" V67 325ffd83dbSDimitry Andric#pragma push_macro("V65") 335ffd83dbSDimitry Andric#define V65 "v65|" V66 345ffd83dbSDimitry Andric#pragma push_macro("V62") 355ffd83dbSDimitry Andric#define V62 "v62|" V65 365ffd83dbSDimitry Andric#pragma push_macro("V60") 375ffd83dbSDimitry Andric#define V60 "v60|" V62 385ffd83dbSDimitry Andric#pragma push_macro("V55") 395ffd83dbSDimitry Andric#define V55 "v55|" V60 405ffd83dbSDimitry Andric#pragma push_macro("V5") 415ffd83dbSDimitry Andric#define V5 "v5|" V55 425ffd83dbSDimitry Andric 43bdd1243dSDimitry Andric#pragma push_macro("HVXV73") 44bdd1243dSDimitry Andric#define HVXV73 "hvxv73" 45bdd1243dSDimitry Andric#pragma push_macro("HVXV71") 46bdd1243dSDimitry Andric#define HVXV71 "hvxv71|" HVXV73 470eae32dcSDimitry Andric#pragma push_macro("HVXV69") 48bdd1243dSDimitry Andric#define HVXV69 "hvxv69|" HVXV71 49fe6060f1SDimitry Andric#pragma push_macro("HVXV68") 500eae32dcSDimitry Andric#define HVXV68 "hvxv68|" HVXV69 515ffd83dbSDimitry Andric#pragma push_macro("HVXV67") 52fe6060f1SDimitry Andric#define HVXV67 "hvxv67|" HVXV68 535ffd83dbSDimitry Andric#pragma push_macro("HVXV66") 545ffd83dbSDimitry Andric#define HVXV66 "hvxv66|" HVXV67 555ffd83dbSDimitry Andric#pragma push_macro("HVXV65") 565ffd83dbSDimitry Andric#define HVXV65 "hvxv65|" HVXV66 575ffd83dbSDimitry Andric#pragma push_macro("HVXV62") 585ffd83dbSDimitry Andric#define HVXV62 "hvxv62|" HVXV65 595ffd83dbSDimitry Andric#pragma push_macro("HVXV60") 605ffd83dbSDimitry Andric#define HVXV60 "hvxv60|" HVXV62 615ffd83dbSDimitry Andric 625ffd83dbSDimitry Andric 630b57cec5SDimitry Andric// The builtins below are not autogenerated from iset.py. 640b57cec5SDimitry Andric// Make sure you do not overwrite these. 655ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_SI_to_SXTHI_asrh, "ii", "", V5) 665ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_brev_ldd, "v*LLi*CLLi*iC", "", V5) 675ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_brev_ldw, "v*i*Ci*iC", "", V5) 685ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_brev_ldh, "v*s*Cs*iC", "", V5) 695ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_brev_lduh, "v*Us*CUs*iC", "", V5) 705ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_brev_ldb, "v*Sc*CSc*iC", "", V5) 715ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_brev_ldub, "v*Uc*CUc*iC", "", V5) 725ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_circ_ldd, "LLi*LLi*LLi*iIi", "", V5) 735ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_circ_ldw, "i*i*i*iIi", "", V5) 745ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_circ_ldh, "s*s*s*iIi", "", V5) 755ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_circ_lduh, "Us*Us*Us*iIi", "", V5) 765ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_circ_ldb, "c*c*c*iIi", "", V5) 775ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_circ_ldub, "Uc*Uc*Uc*iIi", "", V5) 785ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_brev_std, "LLi*CLLi*LLiiC", "", V5) 795ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_brev_stw, "i*Ci*iiC", "", V5) 805ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_brev_sth, "s*Cs*iiC", "", V5) 815ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_brev_sthhi, "s*Cs*iiC", "", V5) 825ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_brev_stb, "c*Cc*iiC", "", V5) 835ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_circ_std, "LLi*LLi*LLiiIi", "", V5) 845ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_circ_stw, "i*i*iiIi", "", V5) 855ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_circ_sth, "s*s*iiIi", "", V5) 865ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_circ_sthhi, "s*s*iiIi", "", V5) 875ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_circ_stb, "c*c*iiIi", "", V5) 885ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_L2_loadrub_pci, "iv*IiivC*", "", V5) 895ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_L2_loadrb_pci, "iv*IiivC*", "", V5) 905ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_L2_loadruh_pci, "iv*IiivC*", "", V5) 915ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_L2_loadrh_pci, "iv*IiivC*", "", V5) 925ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_L2_loadri_pci, "iv*IiivC*", "", V5) 935ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_L2_loadrd_pci, "LLiv*IiivC*", "", V5) 945ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_L2_loadrub_pcr, "iv*ivC*", "", V5) 955ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_L2_loadrb_pcr, "iv*ivC*", "", V5) 965ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_L2_loadruh_pcr, "iv*ivC*", "", V5) 975ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_L2_loadrh_pcr, "iv*ivC*", "", V5) 985ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_L2_loadri_pcr, "iv*ivC*", "", V5) 995ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_L2_loadrd_pcr, "LLiv*ivC*", "", V5) 1000b57cec5SDimitry Andric 1015ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_S2_storerb_pci, "vv*IiiivC*", "", V5) 1025ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_S2_storerh_pci, "vv*IiiivC*", "", V5) 1035ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_S2_storerf_pci, "vv*IiiivC*", "", V5) 1045ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_S2_storeri_pci, "vv*IiiivC*", "", V5) 1055ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_S2_storerd_pci, "vv*IiiLLivC*", "", V5) 1065ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_S2_storerb_pcr, "vv*iivC*", "", V5) 1075ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_S2_storerh_pcr, "vv*iivC*", "", V5) 1085ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_S2_storerf_pcr, "vv*iivC*", "", V5) 1095ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_S2_storeri_pcr, "vv*iivC*", "", V5) 1105ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_S2_storerd_pcr, "vv*iLLivC*", "", V5) 1110b57cec5SDimitry Andric 1125ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_prefetch,"vv*","", V5) 1135ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_A6_vminub_RdP,"LLiLLiLLi","", V62) 1140b57cec5SDimitry Andric 1155ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_V6_vmaskedstoreq,"vV64bv*V16i","", HVXV60) 1165ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_V6_vmaskedstorenq,"vV64bv*V16i","", HVXV60) 1175ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_V6_vmaskedstorentq,"vV64bv*V16i","", HVXV60) 1185ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_V6_vmaskedstorentnq,"vV64bv*V16i","", HVXV60) 1195ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_V6_vmaskedstoreq_128B,"vV128bv*V32i","", HVXV60) 1205ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_V6_vmaskedstorenq_128B,"vV128bv*V32i","", HVXV60) 1215ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_V6_vmaskedstorentq_128B,"vV128bv*V32i","", HVXV60) 1225ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_V6_vmaskedstorentnq_128B,"vV128bv*V32i","", HVXV60) 1230b57cec5SDimitry Andric 1240b57cec5SDimitry Andric 1255ffd83dbSDimitry Andric// These are only valid on v65 1265ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpybub_rtt,"V32iV16iLLi","", "hvxv65") 1275ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpybub_rtt_128B,"V64iV32iLLi","", "hvxv65") 1285ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpybub_rtt_acc,"V32iV32iV16iLLi","", "hvxv65") 1295ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpybub_rtt_acc_128B,"V64iV64iV32iLLi","", "hvxv65") 1305ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpyub_rtt,"V32iV16iLLi","", "hvxv65") 1315ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpyub_rtt_128B,"V64iV32iLLi","", "hvxv65") 1325ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpyub_rtt_acc,"V32iV32iV16iLLi","", "hvxv65") 1335ffd83dbSDimitry AndricTARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpyub_rtt_acc_128B,"V64iV64iV32iLLi","", "hvxv65") 1340b57cec5SDimitry Andric 1355ffd83dbSDimitry Andric#include "clang/Basic/BuiltinsHexagonDep.def" 1360b57cec5SDimitry Andric 1375ffd83dbSDimitry Andric#pragma pop_macro("HVXV60") 1385ffd83dbSDimitry Andric#pragma pop_macro("HVXV62") 1395ffd83dbSDimitry Andric#pragma pop_macro("HVXV65") 1405ffd83dbSDimitry Andric#pragma pop_macro("HVXV66") 1415ffd83dbSDimitry Andric#pragma pop_macro("HVXV67") 142fe6060f1SDimitry Andric#pragma pop_macro("HVXV68") 1430eae32dcSDimitry Andric#pragma pop_macro("HVXV69") 144bdd1243dSDimitry Andric#pragma pop_macro("HVXV71") 145bdd1243dSDimitry Andric#pragma pop_macro("HVXV73") 1460b57cec5SDimitry Andric 1475ffd83dbSDimitry Andric#pragma pop_macro("V5") 1485ffd83dbSDimitry Andric#pragma pop_macro("V55") 1495ffd83dbSDimitry Andric#pragma pop_macro("V60") 1505ffd83dbSDimitry Andric#pragma pop_macro("V62") 1515ffd83dbSDimitry Andric#pragma pop_macro("V65") 1525ffd83dbSDimitry Andric#pragma pop_macro("V66") 1535ffd83dbSDimitry Andric#pragma pop_macro("V67") 154fe6060f1SDimitry Andric#pragma pop_macro("V68") 1550eae32dcSDimitry Andric#pragma pop_macro("V69") 156bdd1243dSDimitry Andric#pragma pop_macro("V71") 157bdd1243dSDimitry Andric#pragma pop_macro("V73") 1580b57cec5SDimitry Andric 1590b57cec5SDimitry Andric#undef BUILTIN 1605ffd83dbSDimitry Andric#undef TARGET_BUILTIN 1615ffd83dbSDimitry Andric 162