1//===--- BuiltinsPTX.def - PTX Builtin function database ----*- C++ -*-===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8// 9// This file defines the PTX-specific builtin function database. Users of 10// this file must define the BUILTIN macro to make use of this information. 11// 12//===----------------------------------------------------------------------===// 13 14// The format of this database matches clang/Basic/Builtins.def. 15 16#if defined(BUILTIN) && !defined(TARGET_BUILTIN) 17# define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) BUILTIN(ID, TYPE, ATTRS) 18#endif 19 20#pragma push_macro("SM_70") 21#pragma push_macro("SM_72") 22#pragma push_macro("SM_75") 23#define SM_75 "sm_75" 24#define SM_72 "sm_72|" SM_75 25#define SM_70 "sm_70|" SM_72 26 27#pragma push_macro("SM_60") 28#define SM_60 "sm_60|sm_61|sm_62|" SM_70 29 30#pragma push_macro("PTX60") 31#pragma push_macro("PTX61") 32#pragma push_macro("PTX63") 33#pragma push_macro("PTX64") 34#define PTX64 "ptx64" 35#define PTX63 "ptx63|" PTX64 36#define PTX61 "ptx61|" PTX63 37#define PTX60 "ptx60|" PTX61 38 39#pragma push_macro("AND") 40#define AND(a, b) a "," b 41 42// Special Registers 43 44BUILTIN(__nvvm_read_ptx_sreg_tid_x, "i", "nc") 45BUILTIN(__nvvm_read_ptx_sreg_tid_y, "i", "nc") 46BUILTIN(__nvvm_read_ptx_sreg_tid_z, "i", "nc") 47BUILTIN(__nvvm_read_ptx_sreg_tid_w, "i", "nc") 48 49BUILTIN(__nvvm_read_ptx_sreg_ntid_x, "i", "nc") 50BUILTIN(__nvvm_read_ptx_sreg_ntid_y, "i", "nc") 51BUILTIN(__nvvm_read_ptx_sreg_ntid_z, "i", "nc") 52BUILTIN(__nvvm_read_ptx_sreg_ntid_w, "i", "nc") 53 54BUILTIN(__nvvm_read_ptx_sreg_ctaid_x, "i", "nc") 55BUILTIN(__nvvm_read_ptx_sreg_ctaid_y, "i", "nc") 56BUILTIN(__nvvm_read_ptx_sreg_ctaid_z, "i", "nc") 57BUILTIN(__nvvm_read_ptx_sreg_ctaid_w, "i", "nc") 58 59BUILTIN(__nvvm_read_ptx_sreg_nctaid_x, "i", "nc") 60BUILTIN(__nvvm_read_ptx_sreg_nctaid_y, "i", "nc") 61BUILTIN(__nvvm_read_ptx_sreg_nctaid_z, "i", "nc") 62BUILTIN(__nvvm_read_ptx_sreg_nctaid_w, "i", "nc") 63 64BUILTIN(__nvvm_read_ptx_sreg_laneid, "i", "nc") 65BUILTIN(__nvvm_read_ptx_sreg_warpid, "i", "nc") 66BUILTIN(__nvvm_read_ptx_sreg_nwarpid, "i", "nc") 67 68BUILTIN(__nvvm_read_ptx_sreg_smid, "i", "nc") 69BUILTIN(__nvvm_read_ptx_sreg_nsmid, "i", "nc") 70BUILTIN(__nvvm_read_ptx_sreg_gridid, "i", "nc") 71 72BUILTIN(__nvvm_read_ptx_sreg_lanemask_eq, "i", "nc") 73BUILTIN(__nvvm_read_ptx_sreg_lanemask_le, "i", "nc") 74BUILTIN(__nvvm_read_ptx_sreg_lanemask_lt, "i", "nc") 75BUILTIN(__nvvm_read_ptx_sreg_lanemask_ge, "i", "nc") 76BUILTIN(__nvvm_read_ptx_sreg_lanemask_gt, "i", "nc") 77 78BUILTIN(__nvvm_read_ptx_sreg_clock, "i", "n") 79BUILTIN(__nvvm_read_ptx_sreg_clock64, "LLi", "n") 80 81BUILTIN(__nvvm_read_ptx_sreg_pm0, "i", "n") 82BUILTIN(__nvvm_read_ptx_sreg_pm1, "i", "n") 83BUILTIN(__nvvm_read_ptx_sreg_pm2, "i", "n") 84BUILTIN(__nvvm_read_ptx_sreg_pm3, "i", "n") 85 86// MISC 87 88BUILTIN(__nvvm_prmt, "UiUiUiUi", "") 89 90// Min Max 91 92BUILTIN(__nvvm_fmax_ftz_f, "fff", "") 93BUILTIN(__nvvm_fmax_f, "fff", "") 94BUILTIN(__nvvm_fmin_ftz_f, "fff", "") 95BUILTIN(__nvvm_fmin_f, "fff", "") 96 97BUILTIN(__nvvm_fmax_d, "ddd", "") 98BUILTIN(__nvvm_fmin_d, "ddd", "") 99 100// Multiplication 101 102BUILTIN(__nvvm_mulhi_i, "iii", "") 103BUILTIN(__nvvm_mulhi_ui, "UiUiUi", "") 104BUILTIN(__nvvm_mulhi_ll, "LLiLLiLLi", "") 105BUILTIN(__nvvm_mulhi_ull, "ULLiULLiULLi", "") 106 107BUILTIN(__nvvm_mul_rn_ftz_f, "fff", "") 108BUILTIN(__nvvm_mul_rn_f, "fff", "") 109BUILTIN(__nvvm_mul_rz_ftz_f, "fff", "") 110BUILTIN(__nvvm_mul_rz_f, "fff", "") 111BUILTIN(__nvvm_mul_rm_ftz_f, "fff", "") 112BUILTIN(__nvvm_mul_rm_f, "fff", "") 113BUILTIN(__nvvm_mul_rp_ftz_f, "fff", "") 114BUILTIN(__nvvm_mul_rp_f, "fff", "") 115 116BUILTIN(__nvvm_mul_rn_d, "ddd", "") 117BUILTIN(__nvvm_mul_rz_d, "ddd", "") 118BUILTIN(__nvvm_mul_rm_d, "ddd", "") 119BUILTIN(__nvvm_mul_rp_d, "ddd", "") 120 121BUILTIN(__nvvm_mul24_i, "iii", "") 122BUILTIN(__nvvm_mul24_ui, "UiUiUi", "") 123 124// Div 125 126BUILTIN(__nvvm_div_approx_ftz_f, "fff", "") 127BUILTIN(__nvvm_div_approx_f, "fff", "") 128 129BUILTIN(__nvvm_div_rn_ftz_f, "fff", "") 130BUILTIN(__nvvm_div_rn_f, "fff", "") 131BUILTIN(__nvvm_div_rz_ftz_f, "fff", "") 132BUILTIN(__nvvm_div_rz_f, "fff", "") 133BUILTIN(__nvvm_div_rm_ftz_f, "fff", "") 134BUILTIN(__nvvm_div_rm_f, "fff", "") 135BUILTIN(__nvvm_div_rp_ftz_f, "fff", "") 136BUILTIN(__nvvm_div_rp_f, "fff", "") 137 138BUILTIN(__nvvm_div_rn_d, "ddd", "") 139BUILTIN(__nvvm_div_rz_d, "ddd", "") 140BUILTIN(__nvvm_div_rm_d, "ddd", "") 141BUILTIN(__nvvm_div_rp_d, "ddd", "") 142 143// Sad 144 145BUILTIN(__nvvm_sad_i, "iiii", "") 146BUILTIN(__nvvm_sad_ui, "UiUiUiUi", "") 147 148// Floor, Ceil 149 150BUILTIN(__nvvm_floor_ftz_f, "ff", "") 151BUILTIN(__nvvm_floor_f, "ff", "") 152BUILTIN(__nvvm_floor_d, "dd", "") 153 154BUILTIN(__nvvm_ceil_ftz_f, "ff", "") 155BUILTIN(__nvvm_ceil_f, "ff", "") 156BUILTIN(__nvvm_ceil_d, "dd", "") 157 158// Abs 159 160BUILTIN(__nvvm_fabs_ftz_f, "ff", "") 161BUILTIN(__nvvm_fabs_f, "ff", "") 162BUILTIN(__nvvm_fabs_d, "dd", "") 163 164// Round 165 166BUILTIN(__nvvm_round_ftz_f, "ff", "") 167BUILTIN(__nvvm_round_f, "ff", "") 168BUILTIN(__nvvm_round_d, "dd", "") 169 170// Trunc 171 172BUILTIN(__nvvm_trunc_ftz_f, "ff", "") 173BUILTIN(__nvvm_trunc_f, "ff", "") 174BUILTIN(__nvvm_trunc_d, "dd", "") 175 176// Saturate 177 178BUILTIN(__nvvm_saturate_ftz_f, "ff", "") 179BUILTIN(__nvvm_saturate_f, "ff", "") 180BUILTIN(__nvvm_saturate_d, "dd", "") 181 182// Exp2, Log2 183 184BUILTIN(__nvvm_ex2_approx_ftz_f, "ff", "") 185BUILTIN(__nvvm_ex2_approx_f, "ff", "") 186BUILTIN(__nvvm_ex2_approx_d, "dd", "") 187 188BUILTIN(__nvvm_lg2_approx_ftz_f, "ff", "") 189BUILTIN(__nvvm_lg2_approx_f, "ff", "") 190BUILTIN(__nvvm_lg2_approx_d, "dd", "") 191 192// Sin, Cos 193 194BUILTIN(__nvvm_sin_approx_ftz_f, "ff", "") 195BUILTIN(__nvvm_sin_approx_f, "ff", "") 196 197BUILTIN(__nvvm_cos_approx_ftz_f, "ff", "") 198BUILTIN(__nvvm_cos_approx_f, "ff", "") 199 200// Fma 201 202BUILTIN(__nvvm_fma_rn_ftz_f, "ffff", "") 203BUILTIN(__nvvm_fma_rn_f, "ffff", "") 204BUILTIN(__nvvm_fma_rz_ftz_f, "ffff", "") 205BUILTIN(__nvvm_fma_rz_f, "ffff", "") 206BUILTIN(__nvvm_fma_rm_ftz_f, "ffff", "") 207BUILTIN(__nvvm_fma_rm_f, "ffff", "") 208BUILTIN(__nvvm_fma_rp_ftz_f, "ffff", "") 209BUILTIN(__nvvm_fma_rp_f, "ffff", "") 210BUILTIN(__nvvm_fma_rn_d, "dddd", "") 211BUILTIN(__nvvm_fma_rz_d, "dddd", "") 212BUILTIN(__nvvm_fma_rm_d, "dddd", "") 213BUILTIN(__nvvm_fma_rp_d, "dddd", "") 214 215// Rcp 216 217BUILTIN(__nvvm_rcp_rn_ftz_f, "ff", "") 218BUILTIN(__nvvm_rcp_rn_f, "ff", "") 219BUILTIN(__nvvm_rcp_rz_ftz_f, "ff", "") 220BUILTIN(__nvvm_rcp_rz_f, "ff", "") 221BUILTIN(__nvvm_rcp_rm_ftz_f, "ff", "") 222BUILTIN(__nvvm_rcp_rm_f, "ff", "") 223BUILTIN(__nvvm_rcp_rp_ftz_f, "ff", "") 224BUILTIN(__nvvm_rcp_rp_f, "ff", "") 225 226BUILTIN(__nvvm_rcp_rn_d, "dd", "") 227BUILTIN(__nvvm_rcp_rz_d, "dd", "") 228BUILTIN(__nvvm_rcp_rm_d, "dd", "") 229BUILTIN(__nvvm_rcp_rp_d, "dd", "") 230BUILTIN(__nvvm_rcp_approx_ftz_d, "dd", "") 231 232// Sqrt 233 234BUILTIN(__nvvm_sqrt_rn_ftz_f, "ff", "") 235BUILTIN(__nvvm_sqrt_rn_f, "ff", "") 236BUILTIN(__nvvm_sqrt_rz_ftz_f, "ff", "") 237BUILTIN(__nvvm_sqrt_rz_f, "ff", "") 238BUILTIN(__nvvm_sqrt_rm_ftz_f, "ff", "") 239BUILTIN(__nvvm_sqrt_rm_f, "ff", "") 240BUILTIN(__nvvm_sqrt_rp_ftz_f, "ff", "") 241BUILTIN(__nvvm_sqrt_rp_f, "ff", "") 242BUILTIN(__nvvm_sqrt_approx_ftz_f, "ff", "") 243BUILTIN(__nvvm_sqrt_approx_f, "ff", "") 244 245BUILTIN(__nvvm_sqrt_rn_d, "dd", "") 246BUILTIN(__nvvm_sqrt_rz_d, "dd", "") 247BUILTIN(__nvvm_sqrt_rm_d, "dd", "") 248BUILTIN(__nvvm_sqrt_rp_d, "dd", "") 249 250// Rsqrt 251 252BUILTIN(__nvvm_rsqrt_approx_ftz_f, "ff", "") 253BUILTIN(__nvvm_rsqrt_approx_f, "ff", "") 254BUILTIN(__nvvm_rsqrt_approx_d, "dd", "") 255 256// Add 257 258BUILTIN(__nvvm_add_rn_ftz_f, "fff", "") 259BUILTIN(__nvvm_add_rn_f, "fff", "") 260BUILTIN(__nvvm_add_rz_ftz_f, "fff", "") 261BUILTIN(__nvvm_add_rz_f, "fff", "") 262BUILTIN(__nvvm_add_rm_ftz_f, "fff", "") 263BUILTIN(__nvvm_add_rm_f, "fff", "") 264BUILTIN(__nvvm_add_rp_ftz_f, "fff", "") 265BUILTIN(__nvvm_add_rp_f, "fff", "") 266 267BUILTIN(__nvvm_add_rn_d, "ddd", "") 268BUILTIN(__nvvm_add_rz_d, "ddd", "") 269BUILTIN(__nvvm_add_rm_d, "ddd", "") 270BUILTIN(__nvvm_add_rp_d, "ddd", "") 271 272// Convert 273 274BUILTIN(__nvvm_d2f_rn_ftz, "fd", "") 275BUILTIN(__nvvm_d2f_rn, "fd", "") 276BUILTIN(__nvvm_d2f_rz_ftz, "fd", "") 277BUILTIN(__nvvm_d2f_rz, "fd", "") 278BUILTIN(__nvvm_d2f_rm_ftz, "fd", "") 279BUILTIN(__nvvm_d2f_rm, "fd", "") 280BUILTIN(__nvvm_d2f_rp_ftz, "fd", "") 281BUILTIN(__nvvm_d2f_rp, "fd", "") 282 283BUILTIN(__nvvm_d2i_rn, "id", "") 284BUILTIN(__nvvm_d2i_rz, "id", "") 285BUILTIN(__nvvm_d2i_rm, "id", "") 286BUILTIN(__nvvm_d2i_rp, "id", "") 287 288BUILTIN(__nvvm_d2ui_rn, "Uid", "") 289BUILTIN(__nvvm_d2ui_rz, "Uid", "") 290BUILTIN(__nvvm_d2ui_rm, "Uid", "") 291BUILTIN(__nvvm_d2ui_rp, "Uid", "") 292 293BUILTIN(__nvvm_i2d_rn, "di", "") 294BUILTIN(__nvvm_i2d_rz, "di", "") 295BUILTIN(__nvvm_i2d_rm, "di", "") 296BUILTIN(__nvvm_i2d_rp, "di", "") 297 298BUILTIN(__nvvm_ui2d_rn, "dUi", "") 299BUILTIN(__nvvm_ui2d_rz, "dUi", "") 300BUILTIN(__nvvm_ui2d_rm, "dUi", "") 301BUILTIN(__nvvm_ui2d_rp, "dUi", "") 302 303BUILTIN(__nvvm_f2i_rn_ftz, "if", "") 304BUILTIN(__nvvm_f2i_rn, "if", "") 305BUILTIN(__nvvm_f2i_rz_ftz, "if", "") 306BUILTIN(__nvvm_f2i_rz, "if", "") 307BUILTIN(__nvvm_f2i_rm_ftz, "if", "") 308BUILTIN(__nvvm_f2i_rm, "if", "") 309BUILTIN(__nvvm_f2i_rp_ftz, "if", "") 310BUILTIN(__nvvm_f2i_rp, "if", "") 311 312BUILTIN(__nvvm_f2ui_rn_ftz, "Uif", "") 313BUILTIN(__nvvm_f2ui_rn, "Uif", "") 314BUILTIN(__nvvm_f2ui_rz_ftz, "Uif", "") 315BUILTIN(__nvvm_f2ui_rz, "Uif", "") 316BUILTIN(__nvvm_f2ui_rm_ftz, "Uif", "") 317BUILTIN(__nvvm_f2ui_rm, "Uif", "") 318BUILTIN(__nvvm_f2ui_rp_ftz, "Uif", "") 319BUILTIN(__nvvm_f2ui_rp, "Uif", "") 320 321BUILTIN(__nvvm_i2f_rn, "fi", "") 322BUILTIN(__nvvm_i2f_rz, "fi", "") 323BUILTIN(__nvvm_i2f_rm, "fi", "") 324BUILTIN(__nvvm_i2f_rp, "fi", "") 325 326BUILTIN(__nvvm_ui2f_rn, "fUi", "") 327BUILTIN(__nvvm_ui2f_rz, "fUi", "") 328BUILTIN(__nvvm_ui2f_rm, "fUi", "") 329BUILTIN(__nvvm_ui2f_rp, "fUi", "") 330 331BUILTIN(__nvvm_lohi_i2d, "dii", "") 332 333BUILTIN(__nvvm_d2i_lo, "id", "") 334BUILTIN(__nvvm_d2i_hi, "id", "") 335 336BUILTIN(__nvvm_f2ll_rn_ftz, "LLif", "") 337BUILTIN(__nvvm_f2ll_rn, "LLif", "") 338BUILTIN(__nvvm_f2ll_rz_ftz, "LLif", "") 339BUILTIN(__nvvm_f2ll_rz, "LLif", "") 340BUILTIN(__nvvm_f2ll_rm_ftz, "LLif", "") 341BUILTIN(__nvvm_f2ll_rm, "LLif", "") 342BUILTIN(__nvvm_f2ll_rp_ftz, "LLif", "") 343BUILTIN(__nvvm_f2ll_rp, "LLif", "") 344 345BUILTIN(__nvvm_f2ull_rn_ftz, "ULLif", "") 346BUILTIN(__nvvm_f2ull_rn, "ULLif", "") 347BUILTIN(__nvvm_f2ull_rz_ftz, "ULLif", "") 348BUILTIN(__nvvm_f2ull_rz, "ULLif", "") 349BUILTIN(__nvvm_f2ull_rm_ftz, "ULLif", "") 350BUILTIN(__nvvm_f2ull_rm, "ULLif", "") 351BUILTIN(__nvvm_f2ull_rp_ftz, "ULLif", "") 352BUILTIN(__nvvm_f2ull_rp, "ULLif", "") 353 354BUILTIN(__nvvm_d2ll_rn, "LLid", "") 355BUILTIN(__nvvm_d2ll_rz, "LLid", "") 356BUILTIN(__nvvm_d2ll_rm, "LLid", "") 357BUILTIN(__nvvm_d2ll_rp, "LLid", "") 358 359BUILTIN(__nvvm_d2ull_rn, "ULLid", "") 360BUILTIN(__nvvm_d2ull_rz, "ULLid", "") 361BUILTIN(__nvvm_d2ull_rm, "ULLid", "") 362BUILTIN(__nvvm_d2ull_rp, "ULLid", "") 363 364BUILTIN(__nvvm_ll2f_rn, "fLLi", "") 365BUILTIN(__nvvm_ll2f_rz, "fLLi", "") 366BUILTIN(__nvvm_ll2f_rm, "fLLi", "") 367BUILTIN(__nvvm_ll2f_rp, "fLLi", "") 368 369BUILTIN(__nvvm_ull2f_rn, "fULLi", "") 370BUILTIN(__nvvm_ull2f_rz, "fULLi", "") 371BUILTIN(__nvvm_ull2f_rm, "fULLi", "") 372BUILTIN(__nvvm_ull2f_rp, "fULLi", "") 373 374BUILTIN(__nvvm_ll2d_rn, "dLLi", "") 375BUILTIN(__nvvm_ll2d_rz, "dLLi", "") 376BUILTIN(__nvvm_ll2d_rm, "dLLi", "") 377BUILTIN(__nvvm_ll2d_rp, "dLLi", "") 378 379BUILTIN(__nvvm_ull2d_rn, "dULLi", "") 380BUILTIN(__nvvm_ull2d_rz, "dULLi", "") 381BUILTIN(__nvvm_ull2d_rm, "dULLi", "") 382BUILTIN(__nvvm_ull2d_rp, "dULLi", "") 383 384BUILTIN(__nvvm_f2h_rn_ftz, "Usf", "") 385BUILTIN(__nvvm_f2h_rn, "Usf", "") 386 387// Bitcast 388 389BUILTIN(__nvvm_bitcast_f2i, "if", "") 390BUILTIN(__nvvm_bitcast_i2f, "fi", "") 391 392BUILTIN(__nvvm_bitcast_ll2d, "dLLi", "") 393BUILTIN(__nvvm_bitcast_d2ll, "LLid", "") 394 395// FNS 396TARGET_BUILTIN(__nvvm_fns, "UiUiUii", "n", PTX60) 397 398// Sync 399 400BUILTIN(__syncthreads, "v", "") 401BUILTIN(__nvvm_bar0_popc, "ii", "") 402BUILTIN(__nvvm_bar0_and, "ii", "") 403BUILTIN(__nvvm_bar0_or, "ii", "") 404BUILTIN(__nvvm_bar_sync, "vi", "n") 405TARGET_BUILTIN(__nvvm_bar_warp_sync, "vUi", "n", PTX60) 406TARGET_BUILTIN(__nvvm_barrier_sync, "vUi", "n", PTX60) 407TARGET_BUILTIN(__nvvm_barrier_sync_cnt, "vUiUi", "n", PTX60) 408 409// Shuffle 410 411BUILTIN(__nvvm_shfl_down_i32, "iiii", "") 412BUILTIN(__nvvm_shfl_down_f32, "ffii", "") 413BUILTIN(__nvvm_shfl_up_i32, "iiii", "") 414BUILTIN(__nvvm_shfl_up_f32, "ffii", "") 415BUILTIN(__nvvm_shfl_bfly_i32, "iiii", "") 416BUILTIN(__nvvm_shfl_bfly_f32, "ffii", "") 417BUILTIN(__nvvm_shfl_idx_i32, "iiii", "") 418BUILTIN(__nvvm_shfl_idx_f32, "ffii", "") 419 420TARGET_BUILTIN(__nvvm_shfl_sync_down_i32, "iUiiii", "", PTX60) 421TARGET_BUILTIN(__nvvm_shfl_sync_down_f32, "fUifii", "", PTX60) 422TARGET_BUILTIN(__nvvm_shfl_sync_up_i32, "iUiiii", "", PTX60) 423TARGET_BUILTIN(__nvvm_shfl_sync_up_f32, "fUifii", "", PTX60) 424TARGET_BUILTIN(__nvvm_shfl_sync_bfly_i32, "iUiiii", "", PTX60) 425TARGET_BUILTIN(__nvvm_shfl_sync_bfly_f32, "fUifii", "", PTX60) 426TARGET_BUILTIN(__nvvm_shfl_sync_idx_i32, "iUiiii", "", PTX60) 427TARGET_BUILTIN(__nvvm_shfl_sync_idx_f32, "fUifii", "", PTX60) 428 429// Vote 430BUILTIN(__nvvm_vote_all, "bb", "") 431BUILTIN(__nvvm_vote_any, "bb", "") 432BUILTIN(__nvvm_vote_uni, "bb", "") 433BUILTIN(__nvvm_vote_ballot, "Uib", "") 434 435TARGET_BUILTIN(__nvvm_vote_all_sync, "bUib", "", PTX60) 436TARGET_BUILTIN(__nvvm_vote_any_sync, "bUib", "", PTX60) 437TARGET_BUILTIN(__nvvm_vote_uni_sync, "bUib", "", PTX60) 438TARGET_BUILTIN(__nvvm_vote_ballot_sync, "UiUib", "", PTX60) 439 440// Match 441TARGET_BUILTIN(__nvvm_match_any_sync_i32, "UiUiUi", "", PTX60) 442TARGET_BUILTIN(__nvvm_match_any_sync_i64, "WiUiWi", "", PTX60) 443// These return a pair {value, predicate}, which requires custom lowering. 444TARGET_BUILTIN(__nvvm_match_all_sync_i32p, "UiUiUii*", "", PTX60) 445TARGET_BUILTIN(__nvvm_match_all_sync_i64p, "WiUiWii*", "", PTX60) 446 447// Membar 448 449BUILTIN(__nvvm_membar_cta, "v", "") 450BUILTIN(__nvvm_membar_gl, "v", "") 451BUILTIN(__nvvm_membar_sys, "v", "") 452 453// Memcpy, Memset 454 455BUILTIN(__nvvm_memcpy, "vUc*Uc*zi","") 456BUILTIN(__nvvm_memset, "vUc*Uczi","") 457 458// Image 459 460BUILTIN(__builtin_ptx_read_image2Dfi_, "V4fiiii", "") 461BUILTIN(__builtin_ptx_read_image2Dff_, "V4fiiff", "") 462BUILTIN(__builtin_ptx_read_image2Dii_, "V4iiiii", "") 463BUILTIN(__builtin_ptx_read_image2Dif_, "V4iiiff", "") 464 465BUILTIN(__builtin_ptx_read_image3Dfi_, "V4fiiiiii", "") 466BUILTIN(__builtin_ptx_read_image3Dff_, "V4fiiffff", "") 467BUILTIN(__builtin_ptx_read_image3Dii_, "V4iiiiiii", "") 468BUILTIN(__builtin_ptx_read_image3Dif_, "V4iiiffff", "") 469 470BUILTIN(__builtin_ptx_write_image2Df_, "viiiffff", "") 471BUILTIN(__builtin_ptx_write_image2Di_, "viiiiiii", "") 472BUILTIN(__builtin_ptx_write_image2Dui_, "viiiUiUiUiUi", "") 473BUILTIN(__builtin_ptx_get_image_depthi_, "ii", "") 474BUILTIN(__builtin_ptx_get_image_heighti_, "ii", "") 475BUILTIN(__builtin_ptx_get_image_widthi_, "ii", "") 476BUILTIN(__builtin_ptx_get_image_channel_data_typei_, "ii", "") 477BUILTIN(__builtin_ptx_get_image_channel_orderi_, "ii", "") 478 479// Atomic 480// 481// We need the atom intrinsics because 482// - they are used in converging analysis 483// - they are used in address space analysis and optimization 484// So it does not hurt to expose them as builtins. 485// 486BUILTIN(__nvvm_atom_add_gen_i, "iiD*i", "n") 487TARGET_BUILTIN(__nvvm_atom_cta_add_gen_i, "iiD*i", "n", SM_60) 488TARGET_BUILTIN(__nvvm_atom_sys_add_gen_i, "iiD*i", "n", SM_60) 489BUILTIN(__nvvm_atom_add_gen_l, "LiLiD*Li", "n") 490TARGET_BUILTIN(__nvvm_atom_cta_add_gen_l, "LiLiD*Li", "n", SM_60) 491TARGET_BUILTIN(__nvvm_atom_sys_add_gen_l, "LiLiD*Li", "n", SM_60) 492BUILTIN(__nvvm_atom_add_gen_ll, "LLiLLiD*LLi", "n") 493TARGET_BUILTIN(__nvvm_atom_cta_add_gen_ll, "LLiLLiD*LLi", "n", SM_60) 494TARGET_BUILTIN(__nvvm_atom_sys_add_gen_ll, "LLiLLiD*LLi", "n", SM_60) 495BUILTIN(__nvvm_atom_add_gen_f, "ffD*f", "n") 496TARGET_BUILTIN(__nvvm_atom_cta_add_gen_f, "ffD*f", "n", SM_60) 497TARGET_BUILTIN(__nvvm_atom_sys_add_gen_f, "ffD*f", "n", SM_60) 498TARGET_BUILTIN(__nvvm_atom_add_gen_d, "ddD*d", "n", SM_60) 499TARGET_BUILTIN(__nvvm_atom_cta_add_gen_d, "ddD*d", "n", SM_60) 500TARGET_BUILTIN(__nvvm_atom_sys_add_gen_d, "ddD*d", "n", SM_60) 501 502BUILTIN(__nvvm_atom_sub_gen_i, "iiD*i", "n") 503BUILTIN(__nvvm_atom_sub_gen_l, "LiLiD*Li", "n") 504BUILTIN(__nvvm_atom_sub_gen_ll, "LLiLLiD*LLi", "n") 505 506BUILTIN(__nvvm_atom_xchg_gen_i, "iiD*i", "n") 507TARGET_BUILTIN(__nvvm_atom_cta_xchg_gen_i, "iiD*i", "n", SM_60) 508TARGET_BUILTIN(__nvvm_atom_sys_xchg_gen_i, "iiD*i", "n", SM_60) 509BUILTIN(__nvvm_atom_xchg_gen_l, "LiLiD*Li", "n") 510TARGET_BUILTIN(__nvvm_atom_cta_xchg_gen_l, "LiLiD*Li", "n", SM_60) 511TARGET_BUILTIN(__nvvm_atom_sys_xchg_gen_l, "LiLiD*Li", "n", SM_60) 512BUILTIN(__nvvm_atom_xchg_gen_ll, "LLiLLiD*LLi", "n") 513TARGET_BUILTIN(__nvvm_atom_cta_xchg_gen_ll, "LLiLLiD*LLi", "n", SM_60) 514TARGET_BUILTIN(__nvvm_atom_sys_xchg_gen_ll, "LLiLLiD*LLi", "n", SM_60) 515 516BUILTIN(__nvvm_atom_max_gen_i, "iiD*i", "n") 517TARGET_BUILTIN(__nvvm_atom_cta_max_gen_i, "iiD*i", "n", SM_60) 518TARGET_BUILTIN(__nvvm_atom_sys_max_gen_i, "iiD*i", "n", SM_60) 519BUILTIN(__nvvm_atom_max_gen_ui, "UiUiD*Ui", "n") 520TARGET_BUILTIN(__nvvm_atom_cta_max_gen_ui, "UiUiD*Ui", "n", SM_60) 521TARGET_BUILTIN(__nvvm_atom_sys_max_gen_ui, "UiUiD*Ui", "n", SM_60) 522BUILTIN(__nvvm_atom_max_gen_l, "LiLiD*Li", "n") 523TARGET_BUILTIN(__nvvm_atom_cta_max_gen_l, "LiLiD*Li", "n", SM_60) 524TARGET_BUILTIN(__nvvm_atom_sys_max_gen_l, "LiLiD*Li", "n", SM_60) 525BUILTIN(__nvvm_atom_max_gen_ul, "ULiULiD*ULi", "n") 526TARGET_BUILTIN(__nvvm_atom_cta_max_gen_ul, "ULiULiD*ULi", "n", SM_60) 527TARGET_BUILTIN(__nvvm_atom_sys_max_gen_ul, "ULiULiD*ULi", "n", SM_60) 528BUILTIN(__nvvm_atom_max_gen_ll, "LLiLLiD*LLi", "n") 529TARGET_BUILTIN(__nvvm_atom_cta_max_gen_ll, "LLiLLiD*LLi", "n", SM_60) 530TARGET_BUILTIN(__nvvm_atom_sys_max_gen_ll, "LLiLLiD*LLi", "n", SM_60) 531BUILTIN(__nvvm_atom_max_gen_ull, "ULLiULLiD*ULLi", "n") 532TARGET_BUILTIN(__nvvm_atom_cta_max_gen_ull, "ULLiULLiD*ULLi", "n", SM_60) 533TARGET_BUILTIN(__nvvm_atom_sys_max_gen_ull, "ULLiULLiD*ULLi", "n", SM_60) 534 535BUILTIN(__nvvm_atom_min_gen_i, "iiD*i", "n") 536TARGET_BUILTIN(__nvvm_atom_cta_min_gen_i, "iiD*i", "n", SM_60) 537TARGET_BUILTIN(__nvvm_atom_sys_min_gen_i, "iiD*i", "n", SM_60) 538BUILTIN(__nvvm_atom_min_gen_ui, "UiUiD*Ui", "n") 539TARGET_BUILTIN(__nvvm_atom_cta_min_gen_ui, "UiUiD*Ui", "n", SM_60) 540TARGET_BUILTIN(__nvvm_atom_sys_min_gen_ui, "UiUiD*Ui", "n", SM_60) 541BUILTIN(__nvvm_atom_min_gen_l, "LiLiD*Li", "n") 542TARGET_BUILTIN(__nvvm_atom_cta_min_gen_l, "LiLiD*Li", "n", SM_60) 543TARGET_BUILTIN(__nvvm_atom_sys_min_gen_l, "LiLiD*Li", "n", SM_60) 544BUILTIN(__nvvm_atom_min_gen_ul, "ULiULiD*ULi", "n") 545TARGET_BUILTIN(__nvvm_atom_cta_min_gen_ul, "ULiULiD*ULi", "n", SM_60) 546TARGET_BUILTIN(__nvvm_atom_sys_min_gen_ul, "ULiULiD*ULi", "n", SM_60) 547BUILTIN(__nvvm_atom_min_gen_ll, "LLiLLiD*LLi", "n") 548TARGET_BUILTIN(__nvvm_atom_cta_min_gen_ll, "LLiLLiD*LLi", "n", SM_60) 549TARGET_BUILTIN(__nvvm_atom_sys_min_gen_ll, "LLiLLiD*LLi", "n", SM_60) 550BUILTIN(__nvvm_atom_min_gen_ull, "ULLiULLiD*ULLi", "n") 551TARGET_BUILTIN(__nvvm_atom_cta_min_gen_ull, "ULLiULLiD*ULLi", "n", SM_60) 552TARGET_BUILTIN(__nvvm_atom_sys_min_gen_ull, "ULLiULLiD*ULLi", "n", SM_60) 553 554BUILTIN(__nvvm_atom_inc_gen_ui, "UiUiD*Ui", "n") 555TARGET_BUILTIN(__nvvm_atom_cta_inc_gen_ui, "UiUiD*Ui", "n", SM_60) 556TARGET_BUILTIN(__nvvm_atom_sys_inc_gen_ui, "UiUiD*Ui", "n", SM_60) 557BUILTIN(__nvvm_atom_dec_gen_ui, "UiUiD*Ui", "n") 558TARGET_BUILTIN(__nvvm_atom_cta_dec_gen_ui, "UiUiD*Ui", "n", SM_60) 559TARGET_BUILTIN(__nvvm_atom_sys_dec_gen_ui, "UiUiD*Ui", "n", SM_60) 560 561BUILTIN(__nvvm_atom_and_gen_i, "iiD*i", "n") 562TARGET_BUILTIN(__nvvm_atom_cta_and_gen_i, "iiD*i", "n", SM_60) 563TARGET_BUILTIN(__nvvm_atom_sys_and_gen_i, "iiD*i", "n", SM_60) 564BUILTIN(__nvvm_atom_and_gen_l, "LiLiD*Li", "n") 565TARGET_BUILTIN(__nvvm_atom_cta_and_gen_l, "LiLiD*Li", "n", SM_60) 566TARGET_BUILTIN(__nvvm_atom_sys_and_gen_l, "LiLiD*Li", "n", SM_60) 567BUILTIN(__nvvm_atom_and_gen_ll, "LLiLLiD*LLi", "n") 568TARGET_BUILTIN(__nvvm_atom_cta_and_gen_ll, "LLiLLiD*LLi", "n", SM_60) 569TARGET_BUILTIN(__nvvm_atom_sys_and_gen_ll, "LLiLLiD*LLi", "n", SM_60) 570 571BUILTIN(__nvvm_atom_or_gen_i, "iiD*i", "n") 572TARGET_BUILTIN(__nvvm_atom_cta_or_gen_i, "iiD*i", "n", SM_60) 573TARGET_BUILTIN(__nvvm_atom_sys_or_gen_i, "iiD*i", "n", SM_60) 574BUILTIN(__nvvm_atom_or_gen_l, "LiLiD*Li", "n") 575TARGET_BUILTIN(__nvvm_atom_cta_or_gen_l, "LiLiD*Li", "n", SM_60) 576TARGET_BUILTIN(__nvvm_atom_sys_or_gen_l, "LiLiD*Li", "n", SM_60) 577BUILTIN(__nvvm_atom_or_gen_ll, "LLiLLiD*LLi", "n") 578TARGET_BUILTIN(__nvvm_atom_cta_or_gen_ll, "LLiLLiD*LLi", "n", SM_60) 579TARGET_BUILTIN(__nvvm_atom_sys_or_gen_ll, "LLiLLiD*LLi", "n", SM_60) 580 581BUILTIN(__nvvm_atom_xor_gen_i, "iiD*i", "n") 582TARGET_BUILTIN(__nvvm_atom_cta_xor_gen_i, "iiD*i", "n", SM_60) 583TARGET_BUILTIN(__nvvm_atom_sys_xor_gen_i, "iiD*i", "n", SM_60) 584BUILTIN(__nvvm_atom_xor_gen_l, "LiLiD*Li", "n") 585TARGET_BUILTIN(__nvvm_atom_cta_xor_gen_l, "LiLiD*Li", "n", SM_60) 586TARGET_BUILTIN(__nvvm_atom_sys_xor_gen_l, "LiLiD*Li", "n", SM_60) 587BUILTIN(__nvvm_atom_xor_gen_ll, "LLiLLiD*LLi", "n") 588TARGET_BUILTIN(__nvvm_atom_cta_xor_gen_ll, "LLiLLiD*LLi", "n", SM_60) 589TARGET_BUILTIN(__nvvm_atom_sys_xor_gen_ll, "LLiLLiD*LLi", "n", SM_60) 590 591BUILTIN(__nvvm_atom_cas_gen_i, "iiD*ii", "n") 592TARGET_BUILTIN(__nvvm_atom_cta_cas_gen_i, "iiD*ii", "n", SM_60) 593TARGET_BUILTIN(__nvvm_atom_sys_cas_gen_i, "iiD*ii", "n", SM_60) 594BUILTIN(__nvvm_atom_cas_gen_l, "LiLiD*LiLi", "n") 595TARGET_BUILTIN(__nvvm_atom_cta_cas_gen_l, "LiLiD*LiLi", "n", SM_60) 596TARGET_BUILTIN(__nvvm_atom_sys_cas_gen_l, "LiLiD*LiLi", "n", SM_60) 597BUILTIN(__nvvm_atom_cas_gen_ll, "LLiLLiD*LLiLLi", "n") 598TARGET_BUILTIN(__nvvm_atom_cta_cas_gen_ll, "LLiLLiD*LLiLLi", "n", SM_60) 599TARGET_BUILTIN(__nvvm_atom_sys_cas_gen_ll, "LLiLLiD*LLiLLi", "n", SM_60) 600 601// Compiler Error Warn 602BUILTIN(__nvvm_compiler_error, "vcC*4", "n") 603BUILTIN(__nvvm_compiler_warn, "vcC*4", "n") 604 605// __ldg. This is not implemented as a builtin by nvcc. 606BUILTIN(__nvvm_ldg_c, "ccC*", "") 607BUILTIN(__nvvm_ldg_s, "ssC*", "") 608BUILTIN(__nvvm_ldg_i, "iiC*", "") 609BUILTIN(__nvvm_ldg_l, "LiLiC*", "") 610BUILTIN(__nvvm_ldg_ll, "LLiLLiC*", "") 611 612BUILTIN(__nvvm_ldg_uc, "UcUcC*", "") 613BUILTIN(__nvvm_ldg_us, "UsUsC*", "") 614BUILTIN(__nvvm_ldg_ui, "UiUiC*", "") 615BUILTIN(__nvvm_ldg_ul, "ULiULiC*", "") 616BUILTIN(__nvvm_ldg_ull, "ULLiULLiC*", "") 617 618BUILTIN(__nvvm_ldg_f, "ffC*", "") 619BUILTIN(__nvvm_ldg_d, "ddC*", "") 620 621BUILTIN(__nvvm_ldg_c2, "E2cE2cC*", "") 622BUILTIN(__nvvm_ldg_c4, "E4cE4cC*", "") 623BUILTIN(__nvvm_ldg_s2, "E2sE2sC*", "") 624BUILTIN(__nvvm_ldg_s4, "E4sE4sC*", "") 625BUILTIN(__nvvm_ldg_i2, "E2iE2iC*", "") 626BUILTIN(__nvvm_ldg_i4, "E4iE4iC*", "") 627BUILTIN(__nvvm_ldg_ll2, "E2LLiE2LLiC*", "") 628 629BUILTIN(__nvvm_ldg_uc2, "E2UcE2UcC*", "") 630BUILTIN(__nvvm_ldg_uc4, "E4UcE4UcC*", "") 631BUILTIN(__nvvm_ldg_us2, "E2UsE2UsC*", "") 632BUILTIN(__nvvm_ldg_us4, "E4UsE4UsC*", "") 633BUILTIN(__nvvm_ldg_ui2, "E2UiE2UiC*", "") 634BUILTIN(__nvvm_ldg_ui4, "E4UiE4UiC*", "") 635BUILTIN(__nvvm_ldg_ull2, "E2ULLiE2ULLiC*", "") 636 637BUILTIN(__nvvm_ldg_f2, "E2fE2fC*", "") 638BUILTIN(__nvvm_ldg_f4, "E4fE4fC*", "") 639BUILTIN(__nvvm_ldg_d2, "E2dE2dC*", "") 640 641// Builtins to support WMMA instructions on sm_70 642TARGET_BUILTIN(__hmma_m16n16k16_ld_a, "vi*iC*UiIi", "", AND(SM_70,PTX60)) 643TARGET_BUILTIN(__hmma_m16n16k16_ld_b, "vi*iC*UiIi", "", AND(SM_70,PTX60)) 644TARGET_BUILTIN(__hmma_m16n16k16_ld_c_f16, "vi*iC*UiIi", "", AND(SM_70,PTX60)) 645TARGET_BUILTIN(__hmma_m16n16k16_ld_c_f32, "vf*fC*UiIi", "", AND(SM_70,PTX60)) 646TARGET_BUILTIN(__hmma_m16n16k16_st_c_f16, "vi*i*UiIi", "", AND(SM_70,PTX60)) 647TARGET_BUILTIN(__hmma_m16n16k16_st_c_f32, "vf*f*UiIi", "", AND(SM_70,PTX60)) 648 649TARGET_BUILTIN(__hmma_m32n8k16_ld_a, "vi*iC*UiIi", "", AND(SM_70,PTX61)) 650TARGET_BUILTIN(__hmma_m32n8k16_ld_b, "vi*iC*UiIi", "", AND(SM_70,PTX61)) 651TARGET_BUILTIN(__hmma_m32n8k16_ld_c_f16, "vi*iC*UiIi", "", AND(SM_70,PTX61)) 652TARGET_BUILTIN(__hmma_m32n8k16_ld_c_f32, "vf*fC*UiIi", "", AND(SM_70,PTX61)) 653TARGET_BUILTIN(__hmma_m32n8k16_st_c_f16, "vi*i*UiIi", "", AND(SM_70,PTX61)) 654TARGET_BUILTIN(__hmma_m32n8k16_st_c_f32, "vf*f*UiIi", "", AND(SM_70,PTX61)) 655 656TARGET_BUILTIN(__hmma_m8n32k16_ld_a, "vi*iC*UiIi", "", AND(SM_70,PTX61)) 657TARGET_BUILTIN(__hmma_m8n32k16_ld_b, "vi*iC*UiIi", "", AND(SM_70,PTX61)) 658TARGET_BUILTIN(__hmma_m8n32k16_ld_c_f16, "vi*iC*UiIi", "", AND(SM_70,PTX61)) 659TARGET_BUILTIN(__hmma_m8n32k16_ld_c_f32, "vf*fC*UiIi", "", AND(SM_70,PTX61)) 660TARGET_BUILTIN(__hmma_m8n32k16_st_c_f16, "vi*i*UiIi", "", AND(SM_70,PTX61)) 661TARGET_BUILTIN(__hmma_m8n32k16_st_c_f32, "vf*f*UiIi", "", AND(SM_70,PTX61)) 662 663TARGET_BUILTIN(__hmma_m16n16k16_mma_f16f16, "vi*iC*iC*iC*IiIi", "", AND(SM_70,PTX60)) 664TARGET_BUILTIN(__hmma_m16n16k16_mma_f32f16, "vf*iC*iC*iC*IiIi", "", AND(SM_70,PTX60)) 665TARGET_BUILTIN(__hmma_m16n16k16_mma_f32f32, "vf*iC*iC*fC*IiIi", "", AND(SM_70,PTX60)) 666TARGET_BUILTIN(__hmma_m16n16k16_mma_f16f32, "vi*iC*iC*fC*IiIi", "", AND(SM_70,PTX60)) 667 668TARGET_BUILTIN(__hmma_m32n8k16_mma_f16f16, "vi*iC*iC*iC*IiIi", "", AND(SM_70,PTX61)) 669TARGET_BUILTIN(__hmma_m32n8k16_mma_f32f16, "vf*iC*iC*iC*IiIi", "", AND(SM_70,PTX61)) 670TARGET_BUILTIN(__hmma_m32n8k16_mma_f32f32, "vf*iC*iC*fC*IiIi", "", AND(SM_70,PTX61)) 671TARGET_BUILTIN(__hmma_m32n8k16_mma_f16f32, "vi*iC*iC*fC*IiIi", "", AND(SM_70,PTX61)) 672 673TARGET_BUILTIN(__hmma_m8n32k16_mma_f16f16, "vi*iC*iC*iC*IiIi", "", AND(SM_70,PTX61)) 674TARGET_BUILTIN(__hmma_m8n32k16_mma_f32f16, "vf*iC*iC*iC*IiIi", "", AND(SM_70,PTX61)) 675TARGET_BUILTIN(__hmma_m8n32k16_mma_f32f32, "vf*iC*iC*fC*IiIi", "", AND(SM_70,PTX61)) 676TARGET_BUILTIN(__hmma_m8n32k16_mma_f16f32, "vi*iC*iC*fC*IiIi", "", AND(SM_70,PTX61)) 677 678// Builtins to support integer and sub-integer WMMA instructions on sm_72/sm_75 679TARGET_BUILTIN(__bmma_m8n8k128_ld_a_b1, "vi*iC*UiIi", "", AND(SM_75,PTX63)) 680TARGET_BUILTIN(__bmma_m8n8k128_ld_b_b1, "vi*iC*UiIi", "", AND(SM_75,PTX63)) 681TARGET_BUILTIN(__bmma_m8n8k128_ld_c, "vi*iC*UiIi", "", AND(SM_75,PTX63)) 682TARGET_BUILTIN(__bmma_m8n8k128_mma_xor_popc_b1, "vi*iC*iC*iC*Ii", "", AND(SM_75,PTX63)) 683TARGET_BUILTIN(__bmma_m8n8k128_st_c_i32, "vi*iC*UiIi", "", AND(SM_75,PTX63)) 684TARGET_BUILTIN(__imma_m16n16k16_ld_a_s8, "vi*iC*UiIi", "", AND(SM_72,PTX63)) 685TARGET_BUILTIN(__imma_m16n16k16_ld_a_u8, "vi*iC*UiIi", "", AND(SM_72,PTX63)) 686TARGET_BUILTIN(__imma_m16n16k16_ld_b_s8, "vi*iC*UiIi", "", AND(SM_72,PTX63)) 687TARGET_BUILTIN(__imma_m16n16k16_ld_b_u8, "vi*iC*UiIi", "", AND(SM_72,PTX63)) 688TARGET_BUILTIN(__imma_m16n16k16_ld_c, "vi*iC*UiIi", "", AND(SM_72,PTX63)) 689TARGET_BUILTIN(__imma_m16n16k16_mma_s8, "vi*iC*iC*iC*IiIi", "", AND(SM_72,PTX63)) 690TARGET_BUILTIN(__imma_m16n16k16_mma_u8, "vi*iC*iC*iC*IiIi", "", AND(SM_72,PTX63)) 691TARGET_BUILTIN(__imma_m16n16k16_st_c_i32, "vi*iC*UiIi", "", AND(SM_72,PTX63)) 692TARGET_BUILTIN(__imma_m32n8k16_ld_a_s8, "vi*iC*UiIi", "", AND(SM_72,PTX63)) 693TARGET_BUILTIN(__imma_m32n8k16_ld_a_u8, "vi*iC*UiIi", "", AND(SM_72,PTX63)) 694TARGET_BUILTIN(__imma_m32n8k16_ld_b_s8, "vi*iC*UiIi", "", AND(SM_72,PTX63)) 695TARGET_BUILTIN(__imma_m32n8k16_ld_b_u8, "vi*iC*UiIi", "", AND(SM_72,PTX63)) 696TARGET_BUILTIN(__imma_m32n8k16_ld_c, "vi*iC*UiIi", "", AND(SM_72,PTX63)) 697TARGET_BUILTIN(__imma_m32n8k16_mma_s8, "vi*iC*iC*iC*IiIi", "", AND(SM_72,PTX63)) 698TARGET_BUILTIN(__imma_m32n8k16_mma_u8, "vi*iC*iC*iC*IiIi", "", AND(SM_72,PTX63)) 699TARGET_BUILTIN(__imma_m32n8k16_st_c_i32, "vi*iC*UiIi", "", AND(SM_72,PTX63)) 700TARGET_BUILTIN(__imma_m8n32k16_ld_a_s8, "vi*iC*UiIi", "", AND(SM_72,PTX63)) 701TARGET_BUILTIN(__imma_m8n32k16_ld_a_u8, "vi*iC*UiIi", "", AND(SM_72,PTX63)) 702TARGET_BUILTIN(__imma_m8n32k16_ld_b_s8, "vi*iC*UiIi", "", AND(SM_72,PTX63)) 703TARGET_BUILTIN(__imma_m8n32k16_ld_b_u8, "vi*iC*UiIi", "", AND(SM_72,PTX63)) 704TARGET_BUILTIN(__imma_m8n32k16_ld_c, "vi*iC*UiIi", "", AND(SM_72,PTX63)) 705TARGET_BUILTIN(__imma_m8n32k16_mma_s8, "vi*iC*iC*iC*IiIi", "", AND(SM_72,PTX63)) 706TARGET_BUILTIN(__imma_m8n32k16_mma_u8, "vi*iC*iC*iC*IiIi", "", AND(SM_72,PTX63)) 707TARGET_BUILTIN(__imma_m8n32k16_st_c_i32, "vi*iC*UiIi", "", AND(SM_72,PTX63)) 708TARGET_BUILTIN(__imma_m8n8k32_ld_a_s4, "vi*iC*UiIi", "", AND(SM_75,PTX63)) 709TARGET_BUILTIN(__imma_m8n8k32_ld_a_u4, "vi*iC*UiIi", "", AND(SM_75,PTX63)) 710TARGET_BUILTIN(__imma_m8n8k32_ld_b_s4, "vi*iC*UiIi", "", AND(SM_75,PTX63)) 711TARGET_BUILTIN(__imma_m8n8k32_ld_b_u4, "vi*iC*UiIi", "", AND(SM_75,PTX63)) 712TARGET_BUILTIN(__imma_m8n8k32_ld_c, "vi*iC*UiIi", "", AND(SM_75,PTX63)) 713TARGET_BUILTIN(__imma_m8n8k32_mma_s4, "vi*iC*iC*iC*IiIi", "", AND(SM_75,PTX63)) 714TARGET_BUILTIN(__imma_m8n8k32_mma_u4, "vi*iC*iC*iC*IiIi", "", AND(SM_75,PTX63)) 715TARGET_BUILTIN(__imma_m8n8k32_st_c_i32, "vi*iC*UiIi", "", AND(SM_75,PTX63)) 716 717#undef BUILTIN 718#undef TARGET_BUILTIN 719#pragma pop_macro("AND") 720#pragma pop_macro("SM_60") 721#pragma pop_macro("SM_70") 722#pragma pop_macro("SM_72") 723#pragma pop_macro("SM_75") 724#pragma pop_macro("PTX60") 725#pragma pop_macro("PTX61") 726#pragma pop_macro("PTX63") 727#pragma pop_macro("PTX64") 728