1 //===--- CGRecordLayout.h - LLVM Record Layout Information ------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #ifndef LLVM_CLANG_LIB_CODEGEN_CGRECORDLAYOUT_H
10 #define LLVM_CLANG_LIB_CODEGEN_CGRECORDLAYOUT_H
11 
12 #include "clang/AST/CharUnits.h"
13 #include "clang/AST/DeclCXX.h"
14 #include "clang/Basic/LLVM.h"
15 #include "llvm/ADT/DenseMap.h"
16 #include "llvm/IR/DerivedTypes.h"
17 
18 namespace llvm {
19   class StructType;
20 }
21 
22 namespace clang {
23 namespace CodeGen {
24 
25 /// Structure with information about how a bitfield should be accessed.
26 ///
27 /// Often we layout a sequence of bitfields as a contiguous sequence of bits.
28 /// When the AST record layout does this, we represent it in the LLVM IR's type
29 /// as either a sequence of i8 members or a byte array to reserve the number of
30 /// bytes touched without forcing any particular alignment beyond the basic
31 /// character alignment.
32 ///
33 /// Then accessing a particular bitfield involves converting this byte array
34 /// into a single integer of that size (i24 or i40 -- may not be power-of-two
35 /// size), loading it, and shifting and masking to extract the particular
36 /// subsequence of bits which make up that particular bitfield. This structure
37 /// encodes the information used to construct the extraction code sequences.
38 /// The CGRecordLayout also has a field index which encodes which byte-sequence
39 /// this bitfield falls within. Let's assume the following C struct:
40 ///
41 ///   struct S {
42 ///     char a, b, c;
43 ///     unsigned bits : 3;
44 ///     unsigned more_bits : 4;
45 ///     unsigned still_more_bits : 7;
46 ///   };
47 ///
48 /// This will end up as the following LLVM type. The first array is the
49 /// bitfield, and the second is the padding out to a 4-byte alignment.
50 ///
51 ///   %t = type { i8, i8, i8, i8, i8, [3 x i8] }
52 ///
53 /// When generating code to access more_bits, we'll generate something
54 /// essentially like this:
55 ///
56 ///   define i32 @foo(%t* %base) {
57 ///     %0 = gep %t* %base, i32 0, i32 3
58 ///     %2 = load i8* %1
59 ///     %3 = lshr i8 %2, 3
60 ///     %4 = and i8 %3, 15
61 ///     %5 = zext i8 %4 to i32
62 ///     ret i32 %i
63 ///   }
64 ///
65 struct CGBitFieldInfo {
66   /// The offset within a contiguous run of bitfields that are represented as
67   /// a single "field" within the LLVM struct type. This offset is in bits.
68   unsigned Offset : 16;
69 
70   /// The total size of the bit-field, in bits.
71   unsigned Size : 15;
72 
73   /// Whether the bit-field is signed.
74   unsigned IsSigned : 1;
75 
76   /// The storage size in bits which should be used when accessing this
77   /// bitfield.
78   unsigned StorageSize;
79 
80   /// The offset of the bitfield storage from the start of the struct.
81   CharUnits StorageOffset;
82 
83   /// The offset within a contiguous run of bitfields that are represented as a
84   /// single "field" within the LLVM struct type, taking into account the AAPCS
85   /// rules for volatile bitfields. This offset is in bits.
86   unsigned VolatileOffset : 16;
87 
88   /// The storage size in bits which should be used when accessing this
89   /// bitfield.
90   unsigned VolatileStorageSize;
91 
92   /// The offset of the bitfield storage from the start of the struct.
93   CharUnits VolatileStorageOffset;
94 
95   CGBitFieldInfo()
96       : Offset(), Size(), IsSigned(), StorageSize(), VolatileOffset(),
97         VolatileStorageSize() {}
98 
99   CGBitFieldInfo(unsigned Offset, unsigned Size, bool IsSigned,
100                  unsigned StorageSize, CharUnits StorageOffset)
101       : Offset(Offset), Size(Size), IsSigned(IsSigned),
102         StorageSize(StorageSize), StorageOffset(StorageOffset) {}
103 
104   void print(raw_ostream &OS) const;
105   void dump() const;
106 
107   /// Given a bit-field decl, build an appropriate helper object for
108   /// accessing that field (which is expected to have the given offset and
109   /// size).
110   static CGBitFieldInfo MakeInfo(class CodeGenTypes &Types,
111                                  const FieldDecl *FD,
112                                  uint64_t Offset, uint64_t Size,
113                                  uint64_t StorageSize,
114                                  CharUnits StorageOffset);
115 };
116 
117 /// CGRecordLayout - This class handles struct and union layout info while
118 /// lowering AST types to LLVM types.
119 ///
120 /// These layout objects are only created on demand as IR generation requires.
121 class CGRecordLayout {
122   friend class CodeGenTypes;
123 
124   CGRecordLayout(const CGRecordLayout &) = delete;
125   void operator=(const CGRecordLayout &) = delete;
126 
127 private:
128   /// The LLVM type corresponding to this record layout; used when
129   /// laying it out as a complete object.
130   llvm::StructType *CompleteObjectType;
131 
132   /// The LLVM type for the non-virtual part of this record layout;
133   /// used when laying it out as a base subobject.
134   llvm::StructType *BaseSubobjectType;
135 
136   /// Map from (non-bit-field) struct field to the corresponding llvm struct
137   /// type field no. This info is populated by record builder.
138   llvm::DenseMap<const FieldDecl *, unsigned> FieldInfo;
139 
140   /// Map from (bit-field) struct field to the corresponding llvm struct type
141   /// field no. This info is populated by record builder.
142   llvm::DenseMap<const FieldDecl *, CGBitFieldInfo> BitFields;
143 
144   // FIXME: Maybe we could use a CXXBaseSpecifier as the key and use a single
145   // map for both virtual and non-virtual bases.
146   llvm::DenseMap<const CXXRecordDecl *, unsigned> NonVirtualBases;
147 
148   /// Map from virtual bases to their field index in the complete object.
149   llvm::DenseMap<const CXXRecordDecl *, unsigned> CompleteObjectVirtualBases;
150 
151   /// False if any direct or indirect subobject of this class, when
152   /// considered as a complete object, requires a non-zero bitpattern
153   /// when zero-initialized.
154   bool IsZeroInitializable : 1;
155 
156   /// False if any direct or indirect subobject of this class, when
157   /// considered as a base subobject, requires a non-zero bitpattern
158   /// when zero-initialized.
159   bool IsZeroInitializableAsBase : 1;
160 
161 public:
162   CGRecordLayout(llvm::StructType *CompleteObjectType,
163                  llvm::StructType *BaseSubobjectType,
164                  bool IsZeroInitializable,
165                  bool IsZeroInitializableAsBase)
166     : CompleteObjectType(CompleteObjectType),
167       BaseSubobjectType(BaseSubobjectType),
168       IsZeroInitializable(IsZeroInitializable),
169       IsZeroInitializableAsBase(IsZeroInitializableAsBase) {}
170 
171   /// Return the "complete object" LLVM type associated with
172   /// this record.
173   llvm::StructType *getLLVMType() const {
174     return CompleteObjectType;
175   }
176 
177   /// Return the "base subobject" LLVM type associated with
178   /// this record.
179   llvm::StructType *getBaseSubobjectLLVMType() const {
180     return BaseSubobjectType;
181   }
182 
183   /// Check whether this struct can be C++ zero-initialized
184   /// with a zeroinitializer.
185   bool isZeroInitializable() const {
186     return IsZeroInitializable;
187   }
188 
189   /// Check whether this struct can be C++ zero-initialized
190   /// with a zeroinitializer when considered as a base subobject.
191   bool isZeroInitializableAsBase() const {
192     return IsZeroInitializableAsBase;
193   }
194 
195   /// Return llvm::StructType element number that corresponds to the
196   /// field FD.
197   unsigned getLLVMFieldNo(const FieldDecl *FD) const {
198     FD = FD->getCanonicalDecl();
199     assert(FieldInfo.count(FD) && "Invalid field for record!");
200     return FieldInfo.lookup(FD);
201   }
202 
203   unsigned getNonVirtualBaseLLVMFieldNo(const CXXRecordDecl *RD) const {
204     assert(NonVirtualBases.count(RD) && "Invalid non-virtual base!");
205     return NonVirtualBases.lookup(RD);
206   }
207 
208   /// Return the LLVM field index corresponding to the given
209   /// virtual base.  Only valid when operating on the complete object.
210   unsigned getVirtualBaseIndex(const CXXRecordDecl *base) const {
211     assert(CompleteObjectVirtualBases.count(base) && "Invalid virtual base!");
212     return CompleteObjectVirtualBases.lookup(base);
213   }
214 
215   /// Return the BitFieldInfo that corresponds to the field FD.
216   const CGBitFieldInfo &getBitFieldInfo(const FieldDecl *FD) const {
217     FD = FD->getCanonicalDecl();
218     assert(FD->isBitField() && "Invalid call for non-bit-field decl!");
219     llvm::DenseMap<const FieldDecl *, CGBitFieldInfo>::const_iterator
220       it = BitFields.find(FD);
221     assert(it != BitFields.end() && "Unable to find bitfield info");
222     return it->second;
223   }
224 
225   void print(raw_ostream &OS) const;
226   void dump() const;
227 };
228 
229 }  // end namespace CodeGen
230 }  // end namespace clang
231 
232 #endif
233