1//===-- save.S - save up to 12 callee-saved registers ---------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// Multiple entry points depending on number of registers to save
10//
11//===----------------------------------------------------------------------===//
12
13// The entry points are grouped up into 2s for rv64 and 4s for rv32 since this
14// is the minimum grouping which will maintain the required 16-byte stack
15// alignment.
16
17  .text
18
19#if __riscv_xlen == 32
20
21  .globl  __riscv_save_12
22  .type   __riscv_save_12,@function
23__riscv_save_12:
24  addi   sp, sp, -64
25  mv     t1, zero
26  sw     s11, 12(sp)
27  j      .Lriscv_save_11_8
28
29  .globl  __riscv_save_11
30  .type   __riscv_save_11,@function
31  .globl  __riscv_save_10
32  .type   __riscv_save_10,@function
33  .globl  __riscv_save_9
34  .type   __riscv_save_9,@function
35  .globl  __riscv_save_8
36  .type   __riscv_save_8,@function
37__riscv_save_11:
38__riscv_save_10:
39__riscv_save_9:
40__riscv_save_8:
41  addi   sp, sp, -64
42  li     t1, 16
43.Lriscv_save_11_8:
44  sw     s10, 16(sp)
45  sw     s9,  20(sp)
46  sw     s8,  24(sp)
47  sw     s7,  28(sp)
48  j      .Lriscv_save_7_4
49
50  .globl  __riscv_save_7
51  .type   __riscv_save_7,@function
52  .globl  __riscv_save_6
53  .type   __riscv_save_6,@function
54  .globl  __riscv_save_5
55  .type   __riscv_save_5,@function
56  .globl  __riscv_save_4
57  .type   __riscv_save_4,@function
58__riscv_save_7:
59__riscv_save_6:
60__riscv_save_5:
61__riscv_save_4:
62  addi   sp, sp, -64
63  li     t1, 32
64.Lriscv_save_7_4:
65  sw     s6, 32(sp)
66  sw     s5, 36(sp)
67  sw     s4, 40(sp)
68  sw     s3, 44(sp)
69  sw     s2, 48(sp)
70  sw     s1, 52(sp)
71  sw     s0, 56(sp)
72  sw     ra, 60(sp)
73  add    sp, sp, t1
74  jr     t0
75
76  .globl  __riscv_save_3
77  .type   __riscv_save_3,@function
78  .globl  __riscv_save_2
79  .type   __riscv_save_2,@function
80  .globl  __riscv_save_1
81  .type   __riscv_save_1,@function
82  .globl  __riscv_save_0
83  .type   __riscv_save_0,@function
84__riscv_save_3:
85__riscv_save_2:
86__riscv_save_1:
87__riscv_save_0:
88  addi    sp, sp, -16
89  sw      s2,  0(sp)
90  sw      s1,  4(sp)
91  sw      s0,  8(sp)
92  sw      ra,  12(sp)
93  jr      t0
94
95#elif __riscv_xlen == 64
96
97  .globl  __riscv_save_12
98  .type   __riscv_save_12,@function
99__riscv_save_12:
100  addi   sp, sp, -112
101  mv     t1, zero
102  sd     s11, 8(sp)
103  j      .Lriscv_save_11_10
104
105  .globl  __riscv_save_11
106  .type   __riscv_save_11,@function
107  .globl  __riscv_save_10
108  .type   __riscv_save_10,@function
109__riscv_save_11:
110__riscv_save_10:
111  addi   sp, sp, -112
112  li     t1, 16
113.Lriscv_save_11_10:
114  sd     s10, 16(sp)
115  sd     s9,  24(sp)
116  j      .Lriscv_save_9_8
117
118  .globl  __riscv_save_9
119  .type   __riscv_save_9,@function
120  .globl  __riscv_save_8
121  .type   __riscv_save_8,@function
122__riscv_save_9:
123__riscv_save_8:
124  addi   sp, sp, -112
125  li     t1, 32
126.Lriscv_save_9_8:
127  sd     s8,  32(sp)
128  sd     s7,  40(sp)
129  j      .Lriscv_save_7_6
130
131  .globl  __riscv_save_7
132  .type   __riscv_save_7,@function
133  .globl  __riscv_save_6
134  .type   __riscv_save_6,@function
135__riscv_save_7:
136__riscv_save_6:
137  addi   sp, sp, -112
138  li     t1, 48
139.Lriscv_save_7_6:
140  sd     s6,  48(sp)
141  sd     s5,  56(sp)
142  j      .Lriscv_save_5_4
143
144  .globl  __riscv_save_5
145  .type   __riscv_save_5,@function
146  .globl  __riscv_save_4
147  .type   __riscv_save_4,@function
148__riscv_save_5:
149__riscv_save_4:
150  addi   sp, sp, -112
151  li     t1, 64
152.Lriscv_save_5_4:
153  sd     s4, 64(sp)
154  sd     s3, 72(sp)
155  j      .Lriscv_save_3_2
156
157  .globl  __riscv_save_3
158  .type   __riscv_save_3,@function
159  .globl  __riscv_save_2
160  .type   __riscv_save_2,@function
161__riscv_save_3:
162__riscv_save_2:
163  addi   sp, sp, -112
164  li     t1, 80
165.Lriscv_save_3_2:
166  sd     s2, 80(sp)
167  sd     s1, 88(sp)
168  sd     s0, 96(sp)
169  sd     ra, 104(sp)
170  add    sp, sp, t1
171  jr     t0
172
173  .globl  __riscv_save_1
174  .type   __riscv_save_1,@function
175  .globl  __riscv_save_0
176  .type   __riscv_save_0,@function
177  addi   sp, sp, -16
178  sd     s0, 0(sp)
179  sd     ra, 8(sp)
180  jr     t0
181
182#else
183# error "xlen must be 32 or 64 for save-restore implementation
184#endif
185