1 //===- InputSection.cpp ---------------------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "InputSection.h"
10 #include "Config.h"
11 #include "EhFrame.h"
12 #include "InputFiles.h"
13 #include "LinkerScript.h"
14 #include "OutputSections.h"
15 #include "Relocations.h"
16 #include "SymbolTable.h"
17 #include "Symbols.h"
18 #include "SyntheticSections.h"
19 #include "Target.h"
20 #include "Thunks.h"
21 #include "lld/Common/ErrorHandler.h"
22 #include "lld/Common/Memory.h"
23 #include "llvm/Support/Compiler.h"
24 #include "llvm/Support/Compression.h"
25 #include "llvm/Support/Endian.h"
26 #include "llvm/Support/Threading.h"
27 #include "llvm/Support/xxhash.h"
28 #include <algorithm>
29 #include <mutex>
30 #include <set>
31 #include <unordered_set>
32 #include <vector>
33 
34 using namespace llvm;
35 using namespace llvm::ELF;
36 using namespace llvm::object;
37 using namespace llvm::support;
38 using namespace llvm::support::endian;
39 using namespace llvm::sys;
40 using namespace lld;
41 using namespace lld::elf;
42 
43 std::vector<InputSectionBase *> elf::inputSections;
44 DenseSet<std::pair<const Symbol *, uint64_t>> elf::ppc64noTocRelax;
45 
46 // Returns a string to construct an error message.
47 std::string lld::toString(const InputSectionBase *sec) {
48   return (toString(sec->file) + ":(" + sec->name + ")").str();
49 }
50 
51 template <class ELFT>
52 static ArrayRef<uint8_t> getSectionContents(ObjFile<ELFT> &file,
53                                             const typename ELFT::Shdr &hdr) {
54   if (hdr.sh_type == SHT_NOBITS)
55     return makeArrayRef<uint8_t>(nullptr, hdr.sh_size);
56   return check(file.getObj().getSectionContents(hdr));
57 }
58 
59 InputSectionBase::InputSectionBase(InputFile *file, uint64_t flags,
60                                    uint32_t type, uint64_t entsize,
61                                    uint32_t link, uint32_t info,
62                                    uint32_t alignment, ArrayRef<uint8_t> data,
63                                    StringRef name, Kind sectionKind)
64     : SectionBase(sectionKind, name, flags, entsize, alignment, type, info,
65                   link),
66       file(file), rawData(data) {
67   // In order to reduce memory allocation, we assume that mergeable
68   // sections are smaller than 4 GiB, which is not an unreasonable
69   // assumption as of 2017.
70   if (sectionKind == SectionBase::Merge && rawData.size() > UINT32_MAX)
71     error(toString(this) + ": section too large");
72 
73   numRelocations = 0;
74   areRelocsRela = false;
75 
76   // The ELF spec states that a value of 0 means the section has
77   // no alignment constraints.
78   uint32_t v = std::max<uint32_t>(alignment, 1);
79   if (!isPowerOf2_64(v))
80     fatal(toString(this) + ": sh_addralign is not a power of 2");
81   this->alignment = v;
82 
83   // In ELF, each section can be compressed by zlib, and if compressed,
84   // section name may be mangled by appending "z" (e.g. ".zdebug_info").
85   // If that's the case, demangle section name so that we can handle a
86   // section as if it weren't compressed.
87   if ((flags & SHF_COMPRESSED) || name.startswith(".zdebug")) {
88     if (!zlib::isAvailable())
89       error(toString(file) + ": contains a compressed section, " +
90             "but zlib is not available");
91     switch (config->ekind) {
92     case ELF32LEKind:
93       parseCompressedHeader<ELF32LE>();
94       break;
95     case ELF32BEKind:
96       parseCompressedHeader<ELF32BE>();
97       break;
98     case ELF64LEKind:
99       parseCompressedHeader<ELF64LE>();
100       break;
101     case ELF64BEKind:
102       parseCompressedHeader<ELF64BE>();
103       break;
104     default:
105       llvm_unreachable("unknown ELFT");
106     }
107   }
108 }
109 
110 // Drop SHF_GROUP bit unless we are producing a re-linkable object file.
111 // SHF_GROUP is a marker that a section belongs to some comdat group.
112 // That flag doesn't make sense in an executable.
113 static uint64_t getFlags(uint64_t flags) {
114   flags &= ~(uint64_t)SHF_INFO_LINK;
115   if (!config->relocatable)
116     flags &= ~(uint64_t)SHF_GROUP;
117   return flags;
118 }
119 
120 // GNU assembler 2.24 and LLVM 4.0.0's MC (the newest release as of
121 // March 2017) fail to infer section types for sections starting with
122 // ".init_array." or ".fini_array.". They set SHT_PROGBITS instead of
123 // SHF_INIT_ARRAY. As a result, the following assembler directive
124 // creates ".init_array.100" with SHT_PROGBITS, for example.
125 //
126 //   .section .init_array.100, "aw"
127 //
128 // This function forces SHT_{INIT,FINI}_ARRAY so that we can handle
129 // incorrect inputs as if they were correct from the beginning.
130 static uint64_t getType(uint64_t type, StringRef name) {
131   if (type == SHT_PROGBITS && name.startswith(".init_array."))
132     return SHT_INIT_ARRAY;
133   if (type == SHT_PROGBITS && name.startswith(".fini_array."))
134     return SHT_FINI_ARRAY;
135   return type;
136 }
137 
138 template <class ELFT>
139 InputSectionBase::InputSectionBase(ObjFile<ELFT> &file,
140                                    const typename ELFT::Shdr &hdr,
141                                    StringRef name, Kind sectionKind)
142     : InputSectionBase(&file, getFlags(hdr.sh_flags),
143                        getType(hdr.sh_type, name), hdr.sh_entsize, hdr.sh_link,
144                        hdr.sh_info, hdr.sh_addralign,
145                        getSectionContents(file, hdr), name, sectionKind) {
146   // We reject object files having insanely large alignments even though
147   // they are allowed by the spec. I think 4GB is a reasonable limitation.
148   // We might want to relax this in the future.
149   if (hdr.sh_addralign > UINT32_MAX)
150     fatal(toString(&file) + ": section sh_addralign is too large");
151 }
152 
153 size_t InputSectionBase::getSize() const {
154   if (auto *s = dyn_cast<SyntheticSection>(this))
155     return s->getSize();
156   if (uncompressedSize >= 0)
157     return uncompressedSize;
158   return rawData.size() - bytesDropped;
159 }
160 
161 void InputSectionBase::uncompress() const {
162   size_t size = uncompressedSize;
163   char *uncompressedBuf;
164   {
165     static std::mutex mu;
166     std::lock_guard<std::mutex> lock(mu);
167     uncompressedBuf = bAlloc.Allocate<char>(size);
168   }
169 
170   if (Error e = zlib::uncompress(toStringRef(rawData), uncompressedBuf, size))
171     fatal(toString(this) +
172           ": uncompress failed: " + llvm::toString(std::move(e)));
173   rawData = makeArrayRef((uint8_t *)uncompressedBuf, size);
174   uncompressedSize = -1;
175 }
176 
177 uint64_t InputSectionBase::getOffsetInFile() const {
178   const uint8_t *fileStart = (const uint8_t *)file->mb.getBufferStart();
179   const uint8_t *secStart = data().begin();
180   return secStart - fileStart;
181 }
182 
183 uint64_t SectionBase::getOffset(uint64_t offset) const {
184   switch (kind()) {
185   case Output: {
186     auto *os = cast<OutputSection>(this);
187     // For output sections we treat offset -1 as the end of the section.
188     return offset == uint64_t(-1) ? os->size : offset;
189   }
190   case Regular:
191   case Synthetic:
192     return cast<InputSection>(this)->getOffset(offset);
193   case EHFrame:
194     // The file crtbeginT.o has relocations pointing to the start of an empty
195     // .eh_frame that is known to be the first in the link. It does that to
196     // identify the start of the output .eh_frame.
197     return offset;
198   case Merge:
199     const MergeInputSection *ms = cast<MergeInputSection>(this);
200     if (InputSection *isec = ms->getParent())
201       return isec->getOffset(ms->getParentOffset(offset));
202     return ms->getParentOffset(offset);
203   }
204   llvm_unreachable("invalid section kind");
205 }
206 
207 uint64_t SectionBase::getVA(uint64_t offset) const {
208   const OutputSection *out = getOutputSection();
209   return (out ? out->addr : 0) + getOffset(offset);
210 }
211 
212 OutputSection *SectionBase::getOutputSection() {
213   InputSection *sec;
214   if (auto *isec = dyn_cast<InputSection>(this))
215     sec = isec;
216   else if (auto *ms = dyn_cast<MergeInputSection>(this))
217     sec = ms->getParent();
218   else if (auto *eh = dyn_cast<EhInputSection>(this))
219     sec = eh->getParent();
220   else
221     return cast<OutputSection>(this);
222   return sec ? sec->getParent() : nullptr;
223 }
224 
225 // When a section is compressed, `rawData` consists with a header followed
226 // by zlib-compressed data. This function parses a header to initialize
227 // `uncompressedSize` member and remove the header from `rawData`.
228 template <typename ELFT> void InputSectionBase::parseCompressedHeader() {
229   // Old-style header
230   if (name.startswith(".zdebug")) {
231     if (!toStringRef(rawData).startswith("ZLIB")) {
232       error(toString(this) + ": corrupted compressed section header");
233       return;
234     }
235     rawData = rawData.slice(4);
236 
237     if (rawData.size() < 8) {
238       error(toString(this) + ": corrupted compressed section header");
239       return;
240     }
241 
242     uncompressedSize = read64be(rawData.data());
243     rawData = rawData.slice(8);
244 
245     // Restore the original section name.
246     // (e.g. ".zdebug_info" -> ".debug_info")
247     name = saver.save("." + name.substr(2));
248     return;
249   }
250 
251   assert(flags & SHF_COMPRESSED);
252   flags &= ~(uint64_t)SHF_COMPRESSED;
253 
254   // New-style header
255   if (rawData.size() < sizeof(typename ELFT::Chdr)) {
256     error(toString(this) + ": corrupted compressed section");
257     return;
258   }
259 
260   auto *hdr = reinterpret_cast<const typename ELFT::Chdr *>(rawData.data());
261   if (hdr->ch_type != ELFCOMPRESS_ZLIB) {
262     error(toString(this) + ": unsupported compression type");
263     return;
264   }
265 
266   uncompressedSize = hdr->ch_size;
267   alignment = std::max<uint32_t>(hdr->ch_addralign, 1);
268   rawData = rawData.slice(sizeof(*hdr));
269 }
270 
271 InputSection *InputSectionBase::getLinkOrderDep() const {
272   assert(flags & SHF_LINK_ORDER);
273   if (!link)
274     return nullptr;
275   return cast<InputSection>(file->getSections()[link]);
276 }
277 
278 // Find a function symbol that encloses a given location.
279 template <class ELFT>
280 Defined *InputSectionBase::getEnclosingFunction(uint64_t offset) {
281   for (Symbol *b : file->getSymbols())
282     if (Defined *d = dyn_cast<Defined>(b))
283       if (d->section == this && d->type == STT_FUNC && d->value <= offset &&
284           offset < d->value + d->size)
285         return d;
286   return nullptr;
287 }
288 
289 // Returns a source location string. Used to construct an error message.
290 template <class ELFT>
291 std::string InputSectionBase::getLocation(uint64_t offset) {
292   std::string secAndOffset = (name + "+0x" + utohexstr(offset)).str();
293 
294   // We don't have file for synthetic sections.
295   if (getFile<ELFT>() == nullptr)
296     return (config->outputFile + ":(" + secAndOffset + ")")
297         .str();
298 
299   // First check if we can get desired values from debugging information.
300   if (Optional<DILineInfo> info = getFile<ELFT>()->getDILineInfo(this, offset))
301     return info->FileName + ":" + std::to_string(info->Line) + ":(" +
302            secAndOffset + ")";
303 
304   // File->sourceFile contains STT_FILE symbol that contains a
305   // source file name. If it's missing, we use an object file name.
306   std::string srcFile = std::string(getFile<ELFT>()->sourceFile);
307   if (srcFile.empty())
308     srcFile = toString(file);
309 
310   if (Defined *d = getEnclosingFunction<ELFT>(offset))
311     return srcFile + ":(function " + toString(*d) + ": " + secAndOffset + ")";
312 
313   // If there's no symbol, print out the offset in the section.
314   return (srcFile + ":(" + secAndOffset + ")");
315 }
316 
317 // This function is intended to be used for constructing an error message.
318 // The returned message looks like this:
319 //
320 //   foo.c:42 (/home/alice/possibly/very/long/path/foo.c:42)
321 //
322 //  Returns an empty string if there's no way to get line info.
323 std::string InputSectionBase::getSrcMsg(const Symbol &sym, uint64_t offset) {
324   return file->getSrcMsg(sym, *this, offset);
325 }
326 
327 // Returns a filename string along with an optional section name. This
328 // function is intended to be used for constructing an error
329 // message. The returned message looks like this:
330 //
331 //   path/to/foo.o:(function bar)
332 //
333 // or
334 //
335 //   path/to/foo.o:(function bar) in archive path/to/bar.a
336 std::string InputSectionBase::getObjMsg(uint64_t off) {
337   std::string filename = std::string(file->getName());
338 
339   std::string archive;
340   if (!file->archiveName.empty())
341     archive = " in archive " + file->archiveName;
342 
343   // Find a symbol that encloses a given location.
344   for (Symbol *b : file->getSymbols())
345     if (auto *d = dyn_cast<Defined>(b))
346       if (d->section == this && d->value <= off && off < d->value + d->size)
347         return filename + ":(" + toString(*d) + ")" + archive;
348 
349   // If there's no symbol, print out the offset in the section.
350   return (filename + ":(" + name + "+0x" + utohexstr(off) + ")" + archive)
351       .str();
352 }
353 
354 InputSection InputSection::discarded(nullptr, 0, 0, 0, ArrayRef<uint8_t>(), "");
355 
356 InputSection::InputSection(InputFile *f, uint64_t flags, uint32_t type,
357                            uint32_t alignment, ArrayRef<uint8_t> data,
358                            StringRef name, Kind k)
359     : InputSectionBase(f, flags, type,
360                        /*Entsize*/ 0, /*Link*/ 0, /*Info*/ 0, alignment, data,
361                        name, k) {}
362 
363 template <class ELFT>
364 InputSection::InputSection(ObjFile<ELFT> &f, const typename ELFT::Shdr &header,
365                            StringRef name)
366     : InputSectionBase(f, header, name, InputSectionBase::Regular) {}
367 
368 bool InputSection::classof(const SectionBase *s) {
369   return s->kind() == SectionBase::Regular ||
370          s->kind() == SectionBase::Synthetic;
371 }
372 
373 OutputSection *InputSection::getParent() const {
374   return cast_or_null<OutputSection>(parent);
375 }
376 
377 // Copy SHT_GROUP section contents. Used only for the -r option.
378 template <class ELFT> void InputSection::copyShtGroup(uint8_t *buf) {
379   // ELFT::Word is the 32-bit integral type in the target endianness.
380   using u32 = typename ELFT::Word;
381   ArrayRef<u32> from = getDataAs<u32>();
382   auto *to = reinterpret_cast<u32 *>(buf);
383 
384   // The first entry is not a section number but a flag.
385   *to++ = from[0];
386 
387   // Adjust section numbers because section numbers in an input object files are
388   // different in the output. We also need to handle combined or discarded
389   // members.
390   ArrayRef<InputSectionBase *> sections = file->getSections();
391   std::unordered_set<uint32_t> seen;
392   for (uint32_t idx : from.slice(1)) {
393     OutputSection *osec = sections[idx]->getOutputSection();
394     if (osec && seen.insert(osec->sectionIndex).second)
395       *to++ = osec->sectionIndex;
396   }
397 }
398 
399 InputSectionBase *InputSection::getRelocatedSection() const {
400   if (!file || (type != SHT_RELA && type != SHT_REL))
401     return nullptr;
402   ArrayRef<InputSectionBase *> sections = file->getSections();
403   return sections[info];
404 }
405 
406 // This is used for -r and --emit-relocs. We can't use memcpy to copy
407 // relocations because we need to update symbol table offset and section index
408 // for each relocation. So we copy relocations one by one.
409 template <class ELFT, class RelTy>
410 void InputSection::copyRelocations(uint8_t *buf, ArrayRef<RelTy> rels) {
411   InputSectionBase *sec = getRelocatedSection();
412 
413   for (const RelTy &rel : rels) {
414     RelType type = rel.getType(config->isMips64EL);
415     const ObjFile<ELFT> *file = getFile<ELFT>();
416     Symbol &sym = file->getRelocTargetSym(rel);
417 
418     auto *p = reinterpret_cast<typename ELFT::Rela *>(buf);
419     buf += sizeof(RelTy);
420 
421     if (RelTy::IsRela)
422       p->r_addend = getAddend<ELFT>(rel);
423 
424     // Output section VA is zero for -r, so r_offset is an offset within the
425     // section, but for --emit-relocs it is a virtual address.
426     p->r_offset = sec->getVA(rel.r_offset);
427     p->setSymbolAndType(in.symTab->getSymbolIndex(&sym), type,
428                         config->isMips64EL);
429 
430     if (sym.type == STT_SECTION) {
431       // We combine multiple section symbols into only one per
432       // section. This means we have to update the addend. That is
433       // trivial for Elf_Rela, but for Elf_Rel we have to write to the
434       // section data. We do that by adding to the Relocation vector.
435 
436       // .eh_frame is horribly special and can reference discarded sections. To
437       // avoid having to parse and recreate .eh_frame, we just replace any
438       // relocation in it pointing to discarded sections with R_*_NONE, which
439       // hopefully creates a frame that is ignored at runtime. Also, don't warn
440       // on .gcc_except_table and debug sections.
441       //
442       // See the comment in maybeReportUndefined for PPC32 .got2 and PPC64 .toc
443       auto *d = dyn_cast<Defined>(&sym);
444       if (!d) {
445         if (!isDebugSection(*sec) && sec->name != ".eh_frame" &&
446             sec->name != ".gcc_except_table" && sec->name != ".got2" &&
447             sec->name != ".toc") {
448           uint32_t secIdx = cast<Undefined>(sym).discardedSecIdx;
449           Elf_Shdr_Impl<ELFT> sec =
450               CHECK(file->getObj().sections(), file)[secIdx];
451           warn("relocation refers to a discarded section: " +
452                CHECK(file->getObj().getSectionName(sec), file) +
453                "\n>>> referenced by " + getObjMsg(p->r_offset));
454         }
455         p->setSymbolAndType(0, 0, false);
456         continue;
457       }
458       SectionBase *section = d->section->repl;
459       if (!section->isLive()) {
460         p->setSymbolAndType(0, 0, false);
461         continue;
462       }
463 
464       int64_t addend = getAddend<ELFT>(rel);
465       const uint8_t *bufLoc = sec->data().begin() + rel.r_offset;
466       if (!RelTy::IsRela)
467         addend = target->getImplicitAddend(bufLoc, type);
468 
469       if (config->emachine == EM_MIPS &&
470           target->getRelExpr(type, sym, bufLoc) == R_MIPS_GOTREL) {
471         // Some MIPS relocations depend on "gp" value. By default,
472         // this value has 0x7ff0 offset from a .got section. But
473         // relocatable files produced by a compiler or a linker
474         // might redefine this default value and we must use it
475         // for a calculation of the relocation result. When we
476         // generate EXE or DSO it's trivial. Generating a relocatable
477         // output is more difficult case because the linker does
478         // not calculate relocations in this mode and loses
479         // individual "gp" values used by each input object file.
480         // As a workaround we add the "gp" value to the relocation
481         // addend and save it back to the file.
482         addend += sec->getFile<ELFT>()->mipsGp0;
483       }
484 
485       if (RelTy::IsRela)
486         p->r_addend = sym.getVA(addend) - section->getOutputSection()->addr;
487       else if (config->relocatable && type != target->noneRel)
488         sec->relocations.push_back({R_ABS, type, rel.r_offset, addend, &sym});
489     } else if (config->emachine == EM_PPC && type == R_PPC_PLTREL24 &&
490                p->r_addend >= 0x8000) {
491       // Similar to R_MIPS_GPREL{16,32}. If the addend of R_PPC_PLTREL24
492       // indicates that r30 is relative to the input section .got2
493       // (r_addend>=0x8000), after linking, r30 should be relative to the output
494       // section .got2 . To compensate for the shift, adjust r_addend by
495       // ppc32Got2OutSecOff.
496       p->r_addend += sec->file->ppc32Got2OutSecOff;
497     }
498   }
499 }
500 
501 // The ARM and AArch64 ABI handle pc-relative relocations to undefined weak
502 // references specially. The general rule is that the value of the symbol in
503 // this context is the address of the place P. A further special case is that
504 // branch relocations to an undefined weak reference resolve to the next
505 // instruction.
506 static uint32_t getARMUndefinedRelativeWeakVA(RelType type, uint32_t a,
507                                               uint32_t p) {
508   switch (type) {
509   // Unresolved branch relocations to weak references resolve to next
510   // instruction, this will be either 2 or 4 bytes on from P.
511   case R_ARM_THM_JUMP11:
512     return p + 2 + a;
513   case R_ARM_CALL:
514   case R_ARM_JUMP24:
515   case R_ARM_PC24:
516   case R_ARM_PLT32:
517   case R_ARM_PREL31:
518   case R_ARM_THM_JUMP19:
519   case R_ARM_THM_JUMP24:
520     return p + 4 + a;
521   case R_ARM_THM_CALL:
522     // We don't want an interworking BLX to ARM
523     return p + 5 + a;
524   // Unresolved non branch pc-relative relocations
525   // R_ARM_TARGET2 which can be resolved relatively is not present as it never
526   // targets a weak-reference.
527   case R_ARM_MOVW_PREL_NC:
528   case R_ARM_MOVT_PREL:
529   case R_ARM_REL32:
530   case R_ARM_THM_ALU_PREL_11_0:
531   case R_ARM_THM_MOVW_PREL_NC:
532   case R_ARM_THM_MOVT_PREL:
533   case R_ARM_THM_PC12:
534     return p + a;
535   // p + a is unrepresentable as negative immediates can't be encoded.
536   case R_ARM_THM_PC8:
537     return p;
538   }
539   llvm_unreachable("ARM pc-relative relocation expected\n");
540 }
541 
542 // The comment above getARMUndefinedRelativeWeakVA applies to this function.
543 static uint64_t getAArch64UndefinedRelativeWeakVA(uint64_t type, uint64_t a,
544                                                   uint64_t p) {
545   switch (type) {
546   // Unresolved branch relocations to weak references resolve to next
547   // instruction, this is 4 bytes on from P.
548   case R_AARCH64_CALL26:
549   case R_AARCH64_CONDBR19:
550   case R_AARCH64_JUMP26:
551   case R_AARCH64_TSTBR14:
552     return p + 4 + a;
553   // Unresolved non branch pc-relative relocations
554   case R_AARCH64_PREL16:
555   case R_AARCH64_PREL32:
556   case R_AARCH64_PREL64:
557   case R_AARCH64_ADR_PREL_LO21:
558   case R_AARCH64_LD_PREL_LO19:
559   case R_AARCH64_PLT32:
560     return p + a;
561   }
562   llvm_unreachable("AArch64 pc-relative relocation expected\n");
563 }
564 
565 // ARM SBREL relocations are of the form S + A - B where B is the static base
566 // The ARM ABI defines base to be "addressing origin of the output segment
567 // defining the symbol S". We defined the "addressing origin"/static base to be
568 // the base of the PT_LOAD segment containing the Sym.
569 // The procedure call standard only defines a Read Write Position Independent
570 // RWPI variant so in practice we should expect the static base to be the base
571 // of the RW segment.
572 static uint64_t getARMStaticBase(const Symbol &sym) {
573   OutputSection *os = sym.getOutputSection();
574   if (!os || !os->ptLoad || !os->ptLoad->firstSec)
575     fatal("SBREL relocation to " + sym.getName() + " without static base");
576   return os->ptLoad->firstSec->addr;
577 }
578 
579 // For R_RISCV_PC_INDIRECT (R_RISCV_PCREL_LO12_{I,S}), the symbol actually
580 // points the corresponding R_RISCV_PCREL_HI20 relocation, and the target VA
581 // is calculated using PCREL_HI20's symbol.
582 //
583 // This function returns the R_RISCV_PCREL_HI20 relocation from
584 // R_RISCV_PCREL_LO12's symbol and addend.
585 static Relocation *getRISCVPCRelHi20(const Symbol *sym, uint64_t addend) {
586   const Defined *d = cast<Defined>(sym);
587   if (!d->section) {
588     error("R_RISCV_PCREL_LO12 relocation points to an absolute symbol: " +
589           sym->getName());
590     return nullptr;
591   }
592   InputSection *isec = cast<InputSection>(d->section);
593 
594   if (addend != 0)
595     warn("Non-zero addend in R_RISCV_PCREL_LO12 relocation to " +
596          isec->getObjMsg(d->value) + " is ignored");
597 
598   // Relocations are sorted by offset, so we can use std::equal_range to do
599   // binary search.
600   Relocation r;
601   r.offset = d->value;
602   auto range =
603       std::equal_range(isec->relocations.begin(), isec->relocations.end(), r,
604                        [](const Relocation &lhs, const Relocation &rhs) {
605                          return lhs.offset < rhs.offset;
606                        });
607 
608   for (auto it = range.first; it != range.second; ++it)
609     if (it->type == R_RISCV_PCREL_HI20 || it->type == R_RISCV_GOT_HI20 ||
610         it->type == R_RISCV_TLS_GD_HI20 || it->type == R_RISCV_TLS_GOT_HI20)
611       return &*it;
612 
613   error("R_RISCV_PCREL_LO12 relocation points to " + isec->getObjMsg(d->value) +
614         " without an associated R_RISCV_PCREL_HI20 relocation");
615   return nullptr;
616 }
617 
618 // A TLS symbol's virtual address is relative to the TLS segment. Add a
619 // target-specific adjustment to produce a thread-pointer-relative offset.
620 static int64_t getTlsTpOffset(const Symbol &s) {
621   // On targets that support TLSDESC, _TLS_MODULE_BASE_@tpoff = 0.
622   if (&s == ElfSym::tlsModuleBase)
623     return 0;
624 
625   // There are 2 TLS layouts. Among targets we support, x86 uses TLS Variant 2
626   // while most others use Variant 1. At run time TP will be aligned to p_align.
627 
628   // Variant 1. TP will be followed by an optional gap (which is the size of 2
629   // pointers on ARM/AArch64, 0 on other targets), followed by alignment
630   // padding, then the static TLS blocks. The alignment padding is added so that
631   // (TP + gap + padding) is congruent to p_vaddr modulo p_align.
632   //
633   // Variant 2. Static TLS blocks, followed by alignment padding are placed
634   // before TP. The alignment padding is added so that (TP - padding -
635   // p_memsz) is congruent to p_vaddr modulo p_align.
636   PhdrEntry *tls = Out::tlsPhdr;
637   switch (config->emachine) {
638     // Variant 1.
639   case EM_ARM:
640   case EM_AARCH64:
641     return s.getVA(0) + config->wordsize * 2 +
642            ((tls->p_vaddr - config->wordsize * 2) & (tls->p_align - 1));
643   case EM_MIPS:
644   case EM_PPC:
645   case EM_PPC64:
646     // Adjusted Variant 1. TP is placed with a displacement of 0x7000, which is
647     // to allow a signed 16-bit offset to reach 0x1000 of TCB/thread-library
648     // data and 0xf000 of the program's TLS segment.
649     return s.getVA(0) + (tls->p_vaddr & (tls->p_align - 1)) - 0x7000;
650   case EM_RISCV:
651     return s.getVA(0) + (tls->p_vaddr & (tls->p_align - 1));
652 
653     // Variant 2.
654   case EM_HEXAGON:
655   case EM_SPARCV9:
656   case EM_386:
657   case EM_X86_64:
658     return s.getVA(0) - tls->p_memsz -
659            ((-tls->p_vaddr - tls->p_memsz) & (tls->p_align - 1));
660   default:
661     llvm_unreachable("unhandled Config->EMachine");
662   }
663 }
664 
665 uint64_t InputSectionBase::getRelocTargetVA(const InputFile *file, RelType type,
666                                             int64_t a, uint64_t p,
667                                             const Symbol &sym, RelExpr expr) {
668   switch (expr) {
669   case R_ABS:
670   case R_DTPREL:
671   case R_RELAX_TLS_LD_TO_LE_ABS:
672   case R_RELAX_GOT_PC_NOPIC:
673   case R_RISCV_ADD:
674     return sym.getVA(a);
675   case R_ADDEND:
676     return a;
677   case R_ARM_SBREL:
678     return sym.getVA(a) - getARMStaticBase(sym);
679   case R_GOT:
680   case R_RELAX_TLS_GD_TO_IE_ABS:
681     return sym.getGotVA() + a;
682   case R_GOTONLY_PC:
683     return in.got->getVA() + a - p;
684   case R_GOTPLTONLY_PC:
685     return in.gotPlt->getVA() + a - p;
686   case R_GOTREL:
687   case R_PPC64_RELAX_TOC:
688     return sym.getVA(a) - in.got->getVA();
689   case R_GOTPLTREL:
690     return sym.getVA(a) - in.gotPlt->getVA();
691   case R_GOTPLT:
692   case R_RELAX_TLS_GD_TO_IE_GOTPLT:
693     return sym.getGotVA() + a - in.gotPlt->getVA();
694   case R_TLSLD_GOT_OFF:
695   case R_GOT_OFF:
696   case R_RELAX_TLS_GD_TO_IE_GOT_OFF:
697     return sym.getGotOffset() + a;
698   case R_AARCH64_GOT_PAGE_PC:
699   case R_AARCH64_RELAX_TLS_GD_TO_IE_PAGE_PC:
700     return getAArch64Page(sym.getGotVA() + a) - getAArch64Page(p);
701   case R_AARCH64_GOT_PAGE:
702     return sym.getGotVA() + a - getAArch64Page(in.got->getVA());
703   case R_GOT_PC:
704   case R_RELAX_TLS_GD_TO_IE:
705     return sym.getGotVA() + a - p;
706   case R_MIPS_GOTREL:
707     return sym.getVA(a) - in.mipsGot->getGp(file);
708   case R_MIPS_GOT_GP:
709     return in.mipsGot->getGp(file) + a;
710   case R_MIPS_GOT_GP_PC: {
711     // R_MIPS_LO16 expression has R_MIPS_GOT_GP_PC type iif the target
712     // is _gp_disp symbol. In that case we should use the following
713     // formula for calculation "AHL + GP - P + 4". For details see p. 4-19 at
714     // ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf
715     // microMIPS variants of these relocations use slightly different
716     // expressions: AHL + GP - P + 3 for %lo() and AHL + GP - P - 1 for %hi()
717     // to correctly handle less-significant bit of the microMIPS symbol.
718     uint64_t v = in.mipsGot->getGp(file) + a - p;
719     if (type == R_MIPS_LO16 || type == R_MICROMIPS_LO16)
720       v += 4;
721     if (type == R_MICROMIPS_LO16 || type == R_MICROMIPS_HI16)
722       v -= 1;
723     return v;
724   }
725   case R_MIPS_GOT_LOCAL_PAGE:
726     // If relocation against MIPS local symbol requires GOT entry, this entry
727     // should be initialized by 'page address'. This address is high 16-bits
728     // of sum the symbol's value and the addend.
729     return in.mipsGot->getVA() + in.mipsGot->getPageEntryOffset(file, sym, a) -
730            in.mipsGot->getGp(file);
731   case R_MIPS_GOT_OFF:
732   case R_MIPS_GOT_OFF32:
733     // In case of MIPS if a GOT relocation has non-zero addend this addend
734     // should be applied to the GOT entry content not to the GOT entry offset.
735     // That is why we use separate expression type.
736     return in.mipsGot->getVA() + in.mipsGot->getSymEntryOffset(file, sym, a) -
737            in.mipsGot->getGp(file);
738   case R_MIPS_TLSGD:
739     return in.mipsGot->getVA() + in.mipsGot->getGlobalDynOffset(file, sym) -
740            in.mipsGot->getGp(file);
741   case R_MIPS_TLSLD:
742     return in.mipsGot->getVA() + in.mipsGot->getTlsIndexOffset(file) -
743            in.mipsGot->getGp(file);
744   case R_AARCH64_PAGE_PC: {
745     uint64_t val = sym.isUndefWeak() ? p + a : sym.getVA(a);
746     return getAArch64Page(val) - getAArch64Page(p);
747   }
748   case R_RISCV_PC_INDIRECT: {
749     if (const Relocation *hiRel = getRISCVPCRelHi20(&sym, a))
750       return getRelocTargetVA(file, hiRel->type, hiRel->addend, sym.getVA(),
751                               *hiRel->sym, hiRel->expr);
752     return 0;
753   }
754   case R_PC:
755   case R_ARM_PCA: {
756     uint64_t dest;
757     if (expr == R_ARM_PCA)
758       // Some PC relative ARM (Thumb) relocations align down the place.
759       p = p & 0xfffffffc;
760     if (sym.isUndefWeak()) {
761       // On ARM and AArch64 a branch to an undefined weak resolves to the
762       // next instruction, otherwise the place.
763       if (config->emachine == EM_ARM)
764         dest = getARMUndefinedRelativeWeakVA(type, a, p);
765       else if (config->emachine == EM_AARCH64)
766         dest = getAArch64UndefinedRelativeWeakVA(type, a, p);
767       else if (config->emachine == EM_PPC)
768         dest = p;
769       else
770         dest = sym.getVA(a);
771     } else {
772       dest = sym.getVA(a);
773     }
774     return dest - p;
775   }
776   case R_PLT:
777     return sym.getPltVA() + a;
778   case R_PLT_PC:
779   case R_PPC64_CALL_PLT:
780     return sym.getPltVA() + a - p;
781   case R_PPC32_PLTREL:
782     // R_PPC_PLTREL24 uses the addend (usually 0 or 0x8000) to indicate r30
783     // stores _GLOBAL_OFFSET_TABLE_ or .got2+0x8000. The addend is ignored for
784     // target VA computation.
785     return sym.getPltVA() - p;
786   case R_PPC64_CALL: {
787     uint64_t symVA = sym.getVA(a);
788     // If we have an undefined weak symbol, we might get here with a symbol
789     // address of zero. That could overflow, but the code must be unreachable,
790     // so don't bother doing anything at all.
791     if (!symVA)
792       return 0;
793 
794     // PPC64 V2 ABI describes two entry points to a function. The global entry
795     // point is used for calls where the caller and callee (may) have different
796     // TOC base pointers and r2 needs to be modified to hold the TOC base for
797     // the callee. For local calls the caller and callee share the same
798     // TOC base and so the TOC pointer initialization code should be skipped by
799     // branching to the local entry point.
800     return symVA - p + getPPC64GlobalEntryToLocalEntryOffset(sym.stOther);
801   }
802   case R_PPC64_TOCBASE:
803     return getPPC64TocBase() + a;
804   case R_RELAX_GOT_PC:
805   case R_PPC64_RELAX_GOT_PC:
806     return sym.getVA(a) - p;
807   case R_RELAX_TLS_GD_TO_LE:
808   case R_RELAX_TLS_IE_TO_LE:
809   case R_RELAX_TLS_LD_TO_LE:
810   case R_TPREL:
811     // It is not very clear what to return if the symbol is undefined. With
812     // --noinhibit-exec, even a non-weak undefined reference may reach here.
813     // Just return A, which matches R_ABS, and the behavior of some dynamic
814     // loaders.
815     if (sym.isUndefined() || sym.isLazy())
816       return a;
817     return getTlsTpOffset(sym) + a;
818   case R_RELAX_TLS_GD_TO_LE_NEG:
819   case R_TPREL_NEG:
820     if (sym.isUndefined())
821       return a;
822     return -getTlsTpOffset(sym) + a;
823   case R_SIZE:
824     return sym.getSize() + a;
825   case R_TLSDESC:
826     return in.got->getGlobalDynAddr(sym) + a;
827   case R_TLSDESC_PC:
828     return in.got->getGlobalDynAddr(sym) + a - p;
829   case R_AARCH64_TLSDESC_PAGE:
830     return getAArch64Page(in.got->getGlobalDynAddr(sym) + a) -
831            getAArch64Page(p);
832   case R_TLSGD_GOT:
833     return in.got->getGlobalDynOffset(sym) + a;
834   case R_TLSGD_GOTPLT:
835     return in.got->getVA() + in.got->getGlobalDynOffset(sym) + a - in.gotPlt->getVA();
836   case R_TLSGD_PC:
837     return in.got->getGlobalDynAddr(sym) + a - p;
838   case R_TLSLD_GOTPLT:
839     return in.got->getVA() + in.got->getTlsIndexOff() + a - in.gotPlt->getVA();
840   case R_TLSLD_GOT:
841     return in.got->getTlsIndexOff() + a;
842   case R_TLSLD_PC:
843     return in.got->getTlsIndexVA() + a - p;
844   default:
845     llvm_unreachable("invalid expression");
846   }
847 }
848 
849 // This function applies relocations to sections without SHF_ALLOC bit.
850 // Such sections are never mapped to memory at runtime. Debug sections are
851 // an example. Relocations in non-alloc sections are much easier to
852 // handle than in allocated sections because it will never need complex
853 // treatment such as GOT or PLT (because at runtime no one refers them).
854 // So, we handle relocations for non-alloc sections directly in this
855 // function as a performance optimization.
856 template <class ELFT, class RelTy>
857 void InputSection::relocateNonAlloc(uint8_t *buf, ArrayRef<RelTy> rels) {
858   const unsigned bits = sizeof(typename ELFT::uint) * 8;
859   const bool isDebug = isDebugSection(*this);
860   const bool isDebugLocOrRanges =
861       isDebug && (name == ".debug_loc" || name == ".debug_ranges");
862   const bool isDebugLine = isDebug && name == ".debug_line";
863   Optional<uint64_t> tombstone;
864   for (const auto &patAndValue : llvm::reverse(config->deadRelocInNonAlloc))
865     if (patAndValue.first.match(this->name)) {
866       tombstone = patAndValue.second;
867       break;
868     }
869 
870   for (const RelTy &rel : rels) {
871     RelType type = rel.getType(config->isMips64EL);
872 
873     // GCC 8.0 or earlier have a bug that they emit R_386_GOTPC relocations
874     // against _GLOBAL_OFFSET_TABLE_ for .debug_info. The bug has been fixed
875     // in 2017 (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82630), but we
876     // need to keep this bug-compatible code for a while.
877     if (config->emachine == EM_386 && type == R_386_GOTPC)
878       continue;
879 
880     uint64_t offset = rel.r_offset;
881     uint8_t *bufLoc = buf + offset;
882     int64_t addend = getAddend<ELFT>(rel);
883     if (!RelTy::IsRela)
884       addend += target->getImplicitAddend(bufLoc, type);
885 
886     Symbol &sym = getFile<ELFT>()->getRelocTargetSym(rel);
887     RelExpr expr = target->getRelExpr(type, sym, bufLoc);
888     if (expr == R_NONE)
889       continue;
890 
891     if (expr == R_SIZE) {
892       target->relocateNoSym(bufLoc, type,
893                             SignExtend64<bits>(sym.getSize() + addend));
894       continue;
895     }
896 
897     // R_ABS/R_DTPREL and some other relocations can be used from non-SHF_ALLOC
898     // sections.
899     if (expr != R_ABS && expr != R_DTPREL && expr != R_GOTPLTREL &&
900         expr != R_RISCV_ADD) {
901       std::string msg = getLocation<ELFT>(offset) +
902                         ": has non-ABS relocation " + toString(type) +
903                         " against symbol '" + toString(sym) + "'";
904       if (expr != R_PC && expr != R_ARM_PCA) {
905         error(msg);
906         return;
907       }
908 
909       // If the control reaches here, we found a PC-relative relocation in a
910       // non-ALLOC section. Since non-ALLOC section is not loaded into memory
911       // at runtime, the notion of PC-relative doesn't make sense here. So,
912       // this is a usage error. However, GNU linkers historically accept such
913       // relocations without any errors and relocate them as if they were at
914       // address 0. For bug-compatibilty, we accept them with warnings. We
915       // know Steel Bank Common Lisp as of 2018 have this bug.
916       warn(msg);
917       target->relocateNoSym(
918           bufLoc, type,
919           SignExtend64<bits>(sym.getVA(addend - offset - outSecOff)));
920       continue;
921     }
922 
923     if (tombstone ||
924         (isDebug && (type == target->symbolicRel || expr == R_DTPREL))) {
925       // Resolve relocations in .debug_* referencing (discarded symbols or ICF
926       // folded section symbols) to a tombstone value. Resolving to addend is
927       // unsatisfactory because the result address range may collide with a
928       // valid range of low address, or leave multiple CUs claiming ownership of
929       // the same range of code, which may confuse consumers.
930       //
931       // To address the problems, we use -1 as a tombstone value for most
932       // .debug_* sections. We have to ignore the addend because we don't want
933       // to resolve an address attribute (which may have a non-zero addend) to
934       // -1+addend (wrap around to a low address).
935       //
936       // R_DTPREL type relocations represent an offset into the dynamic thread
937       // vector. The computed value is st_value plus a non-negative offset.
938       // Negative values are invalid, so -1 can be used as the tombstone value.
939       //
940       // If the referenced symbol is discarded (made Undefined), or the
941       // section defining the referenced symbol is garbage collected,
942       // sym.getOutputSection() is nullptr. `ds->section->repl != ds->section`
943       // catches the ICF folded case. However, resolving a relocation in
944       // .debug_line to -1 would stop debugger users from setting breakpoints on
945       // the folded-in function, so exclude .debug_line.
946       //
947       // For pre-DWARF-v5 .debug_loc and .debug_ranges, -1 is a reserved value
948       // (base address selection entry), use 1 (which is used by GNU ld for
949       // .debug_ranges).
950       //
951       // TODO To reduce disruption, we use 0 instead of -1 as the tombstone
952       // value. Enable -1 in a future release.
953       auto *ds = dyn_cast<Defined>(&sym);
954       if (!sym.getOutputSection() ||
955           (ds && ds->section->repl != ds->section && !isDebugLine)) {
956         // If -z dead-reloc-in-nonalloc= is specified, respect it.
957         const uint64_t value = tombstone ? SignExtend64<bits>(*tombstone)
958                                          : (isDebugLocOrRanges ? 1 : 0);
959         target->relocateNoSym(bufLoc, type, value);
960         continue;
961       }
962     }
963     target->relocateNoSym(bufLoc, type, SignExtend64<bits>(sym.getVA(addend)));
964   }
965 }
966 
967 // This is used when '-r' is given.
968 // For REL targets, InputSection::copyRelocations() may store artificial
969 // relocations aimed to update addends. They are handled in relocateAlloc()
970 // for allocatable sections, and this function does the same for
971 // non-allocatable sections, such as sections with debug information.
972 static void relocateNonAllocForRelocatable(InputSection *sec, uint8_t *buf) {
973   const unsigned bits = config->is64 ? 64 : 32;
974 
975   for (const Relocation &rel : sec->relocations) {
976     // InputSection::copyRelocations() adds only R_ABS relocations.
977     assert(rel.expr == R_ABS);
978     uint8_t *bufLoc = buf + rel.offset;
979     uint64_t targetVA = SignExtend64(rel.sym->getVA(rel.addend), bits);
980     target->relocate(bufLoc, rel, targetVA);
981   }
982 }
983 
984 template <class ELFT>
985 void InputSectionBase::relocate(uint8_t *buf, uint8_t *bufEnd) {
986   if (flags & SHF_EXECINSTR)
987     adjustSplitStackFunctionPrologues<ELFT>(buf, bufEnd);
988 
989   if (flags & SHF_ALLOC) {
990     relocateAlloc(buf, bufEnd);
991     return;
992   }
993 
994   auto *sec = cast<InputSection>(this);
995   if (config->relocatable)
996     relocateNonAllocForRelocatable(sec, buf);
997   else if (sec->areRelocsRela)
998     sec->relocateNonAlloc<ELFT>(buf, sec->template relas<ELFT>());
999   else
1000     sec->relocateNonAlloc<ELFT>(buf, sec->template rels<ELFT>());
1001 }
1002 
1003 void InputSectionBase::relocateAlloc(uint8_t *buf, uint8_t *bufEnd) {
1004   assert(flags & SHF_ALLOC);
1005   const unsigned bits = config->wordsize * 8;
1006   uint64_t lastPPCRelaxedRelocOff = UINT64_C(-1);
1007 
1008   for (const Relocation &rel : relocations) {
1009     if (rel.expr == R_NONE)
1010       continue;
1011     uint64_t offset = rel.offset;
1012     uint8_t *bufLoc = buf + offset;
1013     RelType type = rel.type;
1014 
1015     uint64_t addrLoc = getOutputSection()->addr + offset;
1016     if (auto *sec = dyn_cast<InputSection>(this))
1017       addrLoc += sec->outSecOff;
1018     RelExpr expr = rel.expr;
1019     uint64_t targetVA = SignExtend64(
1020         getRelocTargetVA(file, type, rel.addend, addrLoc, *rel.sym, expr),
1021         bits);
1022 
1023     switch (expr) {
1024     case R_RELAX_GOT_PC:
1025     case R_RELAX_GOT_PC_NOPIC:
1026       target->relaxGot(bufLoc, rel, targetVA);
1027       break;
1028     case R_PPC64_RELAX_GOT_PC: {
1029       // The R_PPC64_PCREL_OPT relocation must appear immediately after
1030       // R_PPC64_GOT_PCREL34 in the relocations table at the same offset.
1031       // We can only relax R_PPC64_PCREL_OPT if we have also relaxed
1032       // the associated R_PPC64_GOT_PCREL34 since only the latter has an
1033       // associated symbol. So save the offset when relaxing R_PPC64_GOT_PCREL34
1034       // and only relax the other if the saved offset matches.
1035       if (type == R_PPC64_GOT_PCREL34)
1036         lastPPCRelaxedRelocOff = offset;
1037       if (type == R_PPC64_PCREL_OPT && offset != lastPPCRelaxedRelocOff)
1038         break;
1039       target->relaxGot(bufLoc, rel, targetVA);
1040       break;
1041     }
1042     case R_PPC64_RELAX_TOC:
1043       // rel.sym refers to the STT_SECTION symbol associated to the .toc input
1044       // section. If an R_PPC64_TOC16_LO (.toc + addend) references the TOC
1045       // entry, there may be R_PPC64_TOC16_HA not paired with
1046       // R_PPC64_TOC16_LO_DS. Don't relax. This loses some relaxation
1047       // opportunities but is safe.
1048       if (ppc64noTocRelax.count({rel.sym, rel.addend}) ||
1049           !tryRelaxPPC64TocIndirection(rel, bufLoc))
1050         target->relocate(bufLoc, rel, targetVA);
1051       break;
1052     case R_RELAX_TLS_IE_TO_LE:
1053       target->relaxTlsIeToLe(bufLoc, rel, targetVA);
1054       break;
1055     case R_RELAX_TLS_LD_TO_LE:
1056     case R_RELAX_TLS_LD_TO_LE_ABS:
1057       target->relaxTlsLdToLe(bufLoc, rel, targetVA);
1058       break;
1059     case R_RELAX_TLS_GD_TO_LE:
1060     case R_RELAX_TLS_GD_TO_LE_NEG:
1061       target->relaxTlsGdToLe(bufLoc, rel, targetVA);
1062       break;
1063     case R_AARCH64_RELAX_TLS_GD_TO_IE_PAGE_PC:
1064     case R_RELAX_TLS_GD_TO_IE:
1065     case R_RELAX_TLS_GD_TO_IE_ABS:
1066     case R_RELAX_TLS_GD_TO_IE_GOT_OFF:
1067     case R_RELAX_TLS_GD_TO_IE_GOTPLT:
1068       target->relaxTlsGdToIe(bufLoc, rel, targetVA);
1069       break;
1070     case R_PPC64_CALL:
1071       // If this is a call to __tls_get_addr, it may be part of a TLS
1072       // sequence that has been relaxed and turned into a nop. In this
1073       // case, we don't want to handle it as a call.
1074       if (read32(bufLoc) == 0x60000000) // nop
1075         break;
1076 
1077       // Patch a nop (0x60000000) to a ld.
1078       if (rel.sym->needsTocRestore) {
1079         // gcc/gfortran 5.4, 6.3 and earlier versions do not add nop for
1080         // recursive calls even if the function is preemptible. This is not
1081         // wrong in the common case where the function is not preempted at
1082         // runtime. Just ignore.
1083         if ((bufLoc + 8 > bufEnd || read32(bufLoc + 4) != 0x60000000) &&
1084             rel.sym->file != file) {
1085           // Use substr(6) to remove the "__plt_" prefix.
1086           errorOrWarn(getErrorLocation(bufLoc) + "call to " +
1087                       lld::toString(*rel.sym).substr(6) +
1088                       " lacks nop, can't restore toc");
1089           break;
1090         }
1091         write32(bufLoc + 4, 0xe8410018); // ld %r2, 24(%r1)
1092       }
1093       target->relocate(bufLoc, rel, targetVA);
1094       break;
1095     default:
1096       target->relocate(bufLoc, rel, targetVA);
1097       break;
1098     }
1099   }
1100 
1101   // Apply jumpInstrMods.  jumpInstrMods are created when the opcode of
1102   // a jmp insn must be modified to shrink the jmp insn or to flip the jmp
1103   // insn.  This is primarily used to relax and optimize jumps created with
1104   // basic block sections.
1105   if (isa<InputSection>(this)) {
1106     for (const JumpInstrMod &jumpMod : jumpInstrMods) {
1107       uint64_t offset = jumpMod.offset;
1108       uint8_t *bufLoc = buf + offset;
1109       target->applyJumpInstrMod(bufLoc, jumpMod.original, jumpMod.size);
1110     }
1111   }
1112 }
1113 
1114 // For each function-defining prologue, find any calls to __morestack,
1115 // and replace them with calls to __morestack_non_split.
1116 static void switchMorestackCallsToMorestackNonSplit(
1117     DenseSet<Defined *> &prologues, std::vector<Relocation *> &morestackCalls) {
1118 
1119   // If the target adjusted a function's prologue, all calls to
1120   // __morestack inside that function should be switched to
1121   // __morestack_non_split.
1122   Symbol *moreStackNonSplit = symtab->find("__morestack_non_split");
1123   if (!moreStackNonSplit) {
1124     error("Mixing split-stack objects requires a definition of "
1125           "__morestack_non_split");
1126     return;
1127   }
1128 
1129   // Sort both collections to compare addresses efficiently.
1130   llvm::sort(morestackCalls, [](const Relocation *l, const Relocation *r) {
1131     return l->offset < r->offset;
1132   });
1133   std::vector<Defined *> functions(prologues.begin(), prologues.end());
1134   llvm::sort(functions, [](const Defined *l, const Defined *r) {
1135     return l->value < r->value;
1136   });
1137 
1138   auto it = morestackCalls.begin();
1139   for (Defined *f : functions) {
1140     // Find the first call to __morestack within the function.
1141     while (it != morestackCalls.end() && (*it)->offset < f->value)
1142       ++it;
1143     // Adjust all calls inside the function.
1144     while (it != morestackCalls.end() && (*it)->offset < f->value + f->size) {
1145       (*it)->sym = moreStackNonSplit;
1146       ++it;
1147     }
1148   }
1149 }
1150 
1151 static bool enclosingPrologueAttempted(uint64_t offset,
1152                                        const DenseSet<Defined *> &prologues) {
1153   for (Defined *f : prologues)
1154     if (f->value <= offset && offset < f->value + f->size)
1155       return true;
1156   return false;
1157 }
1158 
1159 // If a function compiled for split stack calls a function not
1160 // compiled for split stack, then the caller needs its prologue
1161 // adjusted to ensure that the called function will have enough stack
1162 // available. Find those functions, and adjust their prologues.
1163 template <class ELFT>
1164 void InputSectionBase::adjustSplitStackFunctionPrologues(uint8_t *buf,
1165                                                          uint8_t *end) {
1166   if (!getFile<ELFT>()->splitStack)
1167     return;
1168   DenseSet<Defined *> prologues;
1169   std::vector<Relocation *> morestackCalls;
1170 
1171   for (Relocation &rel : relocations) {
1172     // Local symbols can't possibly be cross-calls, and should have been
1173     // resolved long before this line.
1174     if (rel.sym->isLocal())
1175       continue;
1176 
1177     // Ignore calls into the split-stack api.
1178     if (rel.sym->getName().startswith("__morestack")) {
1179       if (rel.sym->getName().equals("__morestack"))
1180         morestackCalls.push_back(&rel);
1181       continue;
1182     }
1183 
1184     // A relocation to non-function isn't relevant. Sometimes
1185     // __morestack is not marked as a function, so this check comes
1186     // after the name check.
1187     if (rel.sym->type != STT_FUNC)
1188       continue;
1189 
1190     // If the callee's-file was compiled with split stack, nothing to do.  In
1191     // this context, a "Defined" symbol is one "defined by the binary currently
1192     // being produced". So an "undefined" symbol might be provided by a shared
1193     // library. It is not possible to tell how such symbols were compiled, so be
1194     // conservative.
1195     if (Defined *d = dyn_cast<Defined>(rel.sym))
1196       if (InputSection *isec = cast_or_null<InputSection>(d->section))
1197         if (!isec || !isec->getFile<ELFT>() || isec->getFile<ELFT>()->splitStack)
1198           continue;
1199 
1200     if (enclosingPrologueAttempted(rel.offset, prologues))
1201       continue;
1202 
1203     if (Defined *f = getEnclosingFunction<ELFT>(rel.offset)) {
1204       prologues.insert(f);
1205       if (target->adjustPrologueForCrossSplitStack(buf + f->value, end,
1206                                                    f->stOther))
1207         continue;
1208       if (!getFile<ELFT>()->someNoSplitStack)
1209         error(lld::toString(this) + ": " + f->getName() +
1210               " (with -fsplit-stack) calls " + rel.sym->getName() +
1211               " (without -fsplit-stack), but couldn't adjust its prologue");
1212     }
1213   }
1214 
1215   if (target->needsMoreStackNonSplit)
1216     switchMorestackCallsToMorestackNonSplit(prologues, morestackCalls);
1217 }
1218 
1219 template <class ELFT> void InputSection::writeTo(uint8_t *buf) {
1220   if (type == SHT_NOBITS)
1221     return;
1222 
1223   if (auto *s = dyn_cast<SyntheticSection>(this)) {
1224     s->writeTo(buf + outSecOff);
1225     return;
1226   }
1227 
1228   // If -r or --emit-relocs is given, then an InputSection
1229   // may be a relocation section.
1230   if (type == SHT_RELA) {
1231     copyRelocations<ELFT>(buf + outSecOff, getDataAs<typename ELFT::Rela>());
1232     return;
1233   }
1234   if (type == SHT_REL) {
1235     copyRelocations<ELFT>(buf + outSecOff, getDataAs<typename ELFT::Rel>());
1236     return;
1237   }
1238 
1239   // If -r is given, we may have a SHT_GROUP section.
1240   if (type == SHT_GROUP) {
1241     copyShtGroup<ELFT>(buf + outSecOff);
1242     return;
1243   }
1244 
1245   // If this is a compressed section, uncompress section contents directly
1246   // to the buffer.
1247   if (uncompressedSize >= 0) {
1248     size_t size = uncompressedSize;
1249     if (Error e = zlib::uncompress(toStringRef(rawData),
1250                                    (char *)(buf + outSecOff), size))
1251       fatal(toString(this) +
1252             ": uncompress failed: " + llvm::toString(std::move(e)));
1253     uint8_t *bufEnd = buf + outSecOff + size;
1254     relocate<ELFT>(buf + outSecOff, bufEnd);
1255     return;
1256   }
1257 
1258   // Copy section contents from source object file to output file
1259   // and then apply relocations.
1260   memcpy(buf + outSecOff, data().data(), data().size());
1261   uint8_t *bufEnd = buf + outSecOff + data().size();
1262   relocate<ELFT>(buf + outSecOff, bufEnd);
1263 }
1264 
1265 void InputSection::replace(InputSection *other) {
1266   alignment = std::max(alignment, other->alignment);
1267 
1268   // When a section is replaced with another section that was allocated to
1269   // another partition, the replacement section (and its associated sections)
1270   // need to be placed in the main partition so that both partitions will be
1271   // able to access it.
1272   if (partition != other->partition) {
1273     partition = 1;
1274     for (InputSection *isec : dependentSections)
1275       isec->partition = 1;
1276   }
1277 
1278   other->repl = repl;
1279   other->markDead();
1280 }
1281 
1282 template <class ELFT>
1283 EhInputSection::EhInputSection(ObjFile<ELFT> &f,
1284                                const typename ELFT::Shdr &header,
1285                                StringRef name)
1286     : InputSectionBase(f, header, name, InputSectionBase::EHFrame) {}
1287 
1288 SyntheticSection *EhInputSection::getParent() const {
1289   return cast_or_null<SyntheticSection>(parent);
1290 }
1291 
1292 // Returns the index of the first relocation that points to a region between
1293 // Begin and Begin+Size.
1294 template <class IntTy, class RelTy>
1295 static unsigned getReloc(IntTy begin, IntTy size, const ArrayRef<RelTy> &rels,
1296                          unsigned &relocI) {
1297   // Start search from RelocI for fast access. That works because the
1298   // relocations are sorted in .eh_frame.
1299   for (unsigned n = rels.size(); relocI < n; ++relocI) {
1300     const RelTy &rel = rels[relocI];
1301     if (rel.r_offset < begin)
1302       continue;
1303 
1304     if (rel.r_offset < begin + size)
1305       return relocI;
1306     return -1;
1307   }
1308   return -1;
1309 }
1310 
1311 // .eh_frame is a sequence of CIE or FDE records.
1312 // This function splits an input section into records and returns them.
1313 template <class ELFT> void EhInputSection::split() {
1314   if (areRelocsRela)
1315     split<ELFT>(relas<ELFT>());
1316   else
1317     split<ELFT>(rels<ELFT>());
1318 }
1319 
1320 template <class ELFT, class RelTy>
1321 void EhInputSection::split(ArrayRef<RelTy> rels) {
1322   unsigned relI = 0;
1323   for (size_t off = 0, end = data().size(); off != end;) {
1324     size_t size = readEhRecordSize(this, off);
1325     pieces.emplace_back(off, this, size, getReloc(off, size, rels, relI));
1326     // The empty record is the end marker.
1327     if (size == 4)
1328       break;
1329     off += size;
1330   }
1331 }
1332 
1333 static size_t findNull(StringRef s, size_t entSize) {
1334   // Optimize the common case.
1335   if (entSize == 1)
1336     return s.find(0);
1337 
1338   for (unsigned i = 0, n = s.size(); i != n; i += entSize) {
1339     const char *b = s.begin() + i;
1340     if (std::all_of(b, b + entSize, [](char c) { return c == 0; }))
1341       return i;
1342   }
1343   return StringRef::npos;
1344 }
1345 
1346 SyntheticSection *MergeInputSection::getParent() const {
1347   return cast_or_null<SyntheticSection>(parent);
1348 }
1349 
1350 // Split SHF_STRINGS section. Such section is a sequence of
1351 // null-terminated strings.
1352 void MergeInputSection::splitStrings(ArrayRef<uint8_t> data, size_t entSize) {
1353   size_t off = 0;
1354   bool isAlloc = flags & SHF_ALLOC;
1355   StringRef s = toStringRef(data);
1356 
1357   while (!s.empty()) {
1358     size_t end = findNull(s, entSize);
1359     if (end == StringRef::npos)
1360       fatal(toString(this) + ": string is not null terminated");
1361     size_t size = end + entSize;
1362 
1363     pieces.emplace_back(off, xxHash64(s.substr(0, size)), !isAlloc);
1364     s = s.substr(size);
1365     off += size;
1366   }
1367 }
1368 
1369 // Split non-SHF_STRINGS section. Such section is a sequence of
1370 // fixed size records.
1371 void MergeInputSection::splitNonStrings(ArrayRef<uint8_t> data,
1372                                         size_t entSize) {
1373   size_t size = data.size();
1374   assert((size % entSize) == 0);
1375   bool isAlloc = flags & SHF_ALLOC;
1376 
1377   for (size_t i = 0; i != size; i += entSize)
1378     pieces.emplace_back(i, xxHash64(data.slice(i, entSize)), !isAlloc);
1379 }
1380 
1381 template <class ELFT>
1382 MergeInputSection::MergeInputSection(ObjFile<ELFT> &f,
1383                                      const typename ELFT::Shdr &header,
1384                                      StringRef name)
1385     : InputSectionBase(f, header, name, InputSectionBase::Merge) {}
1386 
1387 MergeInputSection::MergeInputSection(uint64_t flags, uint32_t type,
1388                                      uint64_t entsize, ArrayRef<uint8_t> data,
1389                                      StringRef name)
1390     : InputSectionBase(nullptr, flags, type, entsize, /*Link*/ 0, /*Info*/ 0,
1391                        /*Alignment*/ entsize, data, name, SectionBase::Merge) {}
1392 
1393 // This function is called after we obtain a complete list of input sections
1394 // that need to be linked. This is responsible to split section contents
1395 // into small chunks for further processing.
1396 //
1397 // Note that this function is called from parallelForEach. This must be
1398 // thread-safe (i.e. no memory allocation from the pools).
1399 void MergeInputSection::splitIntoPieces() {
1400   assert(pieces.empty());
1401 
1402   if (flags & SHF_STRINGS)
1403     splitStrings(data(), entsize);
1404   else
1405     splitNonStrings(data(), entsize);
1406 }
1407 
1408 SectionPiece *MergeInputSection::getSectionPiece(uint64_t offset) {
1409   if (this->data().size() <= offset)
1410     fatal(toString(this) + ": offset is outside the section");
1411 
1412   // If Offset is not at beginning of a section piece, it is not in the map.
1413   // In that case we need to  do a binary search of the original section piece vector.
1414   auto it = partition_point(
1415       pieces, [=](SectionPiece p) { return p.inputOff <= offset; });
1416   return &it[-1];
1417 }
1418 
1419 // Returns the offset in an output section for a given input offset.
1420 // Because contents of a mergeable section is not contiguous in output,
1421 // it is not just an addition to a base output offset.
1422 uint64_t MergeInputSection::getParentOffset(uint64_t offset) const {
1423   // If Offset is not at beginning of a section piece, it is not in the map.
1424   // In that case we need to search from the original section piece vector.
1425   const SectionPiece &piece =
1426       *(const_cast<MergeInputSection *>(this)->getSectionPiece (offset));
1427   uint64_t addend = offset - piece.inputOff;
1428   return piece.outputOff + addend;
1429 }
1430 
1431 template InputSection::InputSection(ObjFile<ELF32LE> &, const ELF32LE::Shdr &,
1432                                     StringRef);
1433 template InputSection::InputSection(ObjFile<ELF32BE> &, const ELF32BE::Shdr &,
1434                                     StringRef);
1435 template InputSection::InputSection(ObjFile<ELF64LE> &, const ELF64LE::Shdr &,
1436                                     StringRef);
1437 template InputSection::InputSection(ObjFile<ELF64BE> &, const ELF64BE::Shdr &,
1438                                     StringRef);
1439 
1440 template std::string InputSectionBase::getLocation<ELF32LE>(uint64_t);
1441 template std::string InputSectionBase::getLocation<ELF32BE>(uint64_t);
1442 template std::string InputSectionBase::getLocation<ELF64LE>(uint64_t);
1443 template std::string InputSectionBase::getLocation<ELF64BE>(uint64_t);
1444 
1445 template void InputSection::writeTo<ELF32LE>(uint8_t *);
1446 template void InputSection::writeTo<ELF32BE>(uint8_t *);
1447 template void InputSection::writeTo<ELF64LE>(uint8_t *);
1448 template void InputSection::writeTo<ELF64BE>(uint8_t *);
1449 
1450 template MergeInputSection::MergeInputSection(ObjFile<ELF32LE> &,
1451                                               const ELF32LE::Shdr &, StringRef);
1452 template MergeInputSection::MergeInputSection(ObjFile<ELF32BE> &,
1453                                               const ELF32BE::Shdr &, StringRef);
1454 template MergeInputSection::MergeInputSection(ObjFile<ELF64LE> &,
1455                                               const ELF64LE::Shdr &, StringRef);
1456 template MergeInputSection::MergeInputSection(ObjFile<ELF64BE> &,
1457                                               const ELF64BE::Shdr &, StringRef);
1458 
1459 template EhInputSection::EhInputSection(ObjFile<ELF32LE> &,
1460                                         const ELF32LE::Shdr &, StringRef);
1461 template EhInputSection::EhInputSection(ObjFile<ELF32BE> &,
1462                                         const ELF32BE::Shdr &, StringRef);
1463 template EhInputSection::EhInputSection(ObjFile<ELF64LE> &,
1464                                         const ELF64LE::Shdr &, StringRef);
1465 template EhInputSection::EhInputSection(ObjFile<ELF64BE> &,
1466                                         const ELF64BE::Shdr &, StringRef);
1467 
1468 template void EhInputSection::split<ELF32LE>();
1469 template void EhInputSection::split<ELF32BE>();
1470 template void EhInputSection::split<ELF64LE>();
1471 template void EhInputSection::split<ELF64BE>();
1472