1 //===- Relocations.cpp ----------------------------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains platform-independent functions to process relocations. 10 // I'll describe the overview of this file here. 11 // 12 // Simple relocations are easy to handle for the linker. For example, 13 // for R_X86_64_PC64 relocs, the linker just has to fix up locations 14 // with the relative offsets to the target symbols. It would just be 15 // reading records from relocation sections and applying them to output. 16 // 17 // But not all relocations are that easy to handle. For example, for 18 // R_386_GOTOFF relocs, the linker has to create new GOT entries for 19 // symbols if they don't exist, and fix up locations with GOT entry 20 // offsets from the beginning of GOT section. So there is more than 21 // fixing addresses in relocation processing. 22 // 23 // ELF defines a large number of complex relocations. 24 // 25 // The functions in this file analyze relocations and do whatever needs 26 // to be done. It includes, but not limited to, the following. 27 // 28 // - create GOT/PLT entries 29 // - create new relocations in .dynsym to let the dynamic linker resolve 30 // them at runtime (since ELF supports dynamic linking, not all 31 // relocations can be resolved at link-time) 32 // - create COPY relocs and reserve space in .bss 33 // - replace expensive relocs (in terms of runtime cost) with cheap ones 34 // - error out infeasible combinations such as PIC and non-relative relocs 35 // 36 // Note that the functions in this file don't actually apply relocations 37 // because it doesn't know about the output file nor the output file buffer. 38 // It instead stores Relocation objects to InputSection's Relocations 39 // vector to let it apply later in InputSection::writeTo. 40 // 41 //===----------------------------------------------------------------------===// 42 43 #include "Relocations.h" 44 #include "Config.h" 45 #include "InputFiles.h" 46 #include "LinkerScript.h" 47 #include "OutputSections.h" 48 #include "SymbolTable.h" 49 #include "Symbols.h" 50 #include "SyntheticSections.h" 51 #include "Target.h" 52 #include "Thunks.h" 53 #include "lld/Common/ErrorHandler.h" 54 #include "lld/Common/Memory.h" 55 #include "llvm/ADT/SmallSet.h" 56 #include "llvm/Demangle/Demangle.h" 57 #include "llvm/Support/Endian.h" 58 #include <algorithm> 59 60 using namespace llvm; 61 using namespace llvm::ELF; 62 using namespace llvm::object; 63 using namespace llvm::support::endian; 64 using namespace lld; 65 using namespace lld::elf; 66 67 static std::optional<std::string> getLinkerScriptLocation(const Symbol &sym) { 68 for (SectionCommand *cmd : script->sectionCommands) 69 if (auto *assign = dyn_cast<SymbolAssignment>(cmd)) 70 if (assign->sym == &sym) 71 return assign->location; 72 return std::nullopt; 73 } 74 75 static std::string getDefinedLocation(const Symbol &sym) { 76 const char msg[] = "\n>>> defined in "; 77 if (sym.file) 78 return msg + toString(sym.file); 79 if (std::optional<std::string> loc = getLinkerScriptLocation(sym)) 80 return msg + *loc; 81 return ""; 82 } 83 84 // Construct a message in the following format. 85 // 86 // >>> defined in /home/alice/src/foo.o 87 // >>> referenced by bar.c:12 (/home/alice/src/bar.c:12) 88 // >>> /home/alice/src/bar.o:(.text+0x1) 89 static std::string getLocation(InputSectionBase &s, const Symbol &sym, 90 uint64_t off) { 91 std::string msg = getDefinedLocation(sym) + "\n>>> referenced by "; 92 std::string src = s.getSrcMsg(sym, off); 93 if (!src.empty()) 94 msg += src + "\n>>> "; 95 return msg + s.getObjMsg(off); 96 } 97 98 void elf::reportRangeError(uint8_t *loc, const Relocation &rel, const Twine &v, 99 int64_t min, uint64_t max) { 100 ErrorPlace errPlace = getErrorPlace(loc); 101 std::string hint; 102 if (rel.sym && !rel.sym->isSection()) 103 hint = "; references " + lld::toString(*rel.sym); 104 if (!errPlace.srcLoc.empty()) 105 hint += "\n>>> referenced by " + errPlace.srcLoc; 106 if (rel.sym && !rel.sym->isSection()) 107 hint += getDefinedLocation(*rel.sym); 108 109 if (errPlace.isec && errPlace.isec->name.startswith(".debug")) 110 hint += "; consider recompiling with -fdebug-types-section to reduce size " 111 "of debug sections"; 112 113 errorOrWarn(errPlace.loc + "relocation " + lld::toString(rel.type) + 114 " out of range: " + v.str() + " is not in [" + Twine(min).str() + 115 ", " + Twine(max).str() + "]" + hint); 116 } 117 118 void elf::reportRangeError(uint8_t *loc, int64_t v, int n, const Symbol &sym, 119 const Twine &msg) { 120 ErrorPlace errPlace = getErrorPlace(loc); 121 std::string hint; 122 if (!sym.getName().empty()) 123 hint = "; references " + lld::toString(sym) + getDefinedLocation(sym); 124 errorOrWarn(errPlace.loc + msg + " is out of range: " + Twine(v) + 125 " is not in [" + Twine(llvm::minIntN(n)) + ", " + 126 Twine(llvm::maxIntN(n)) + "]" + hint); 127 } 128 129 // Build a bitmask with one bit set for each 64 subset of RelExpr. 130 static constexpr uint64_t buildMask() { return 0; } 131 132 template <typename... Tails> 133 static constexpr uint64_t buildMask(int head, Tails... tails) { 134 return (0 <= head && head < 64 ? uint64_t(1) << head : 0) | 135 buildMask(tails...); 136 } 137 138 // Return true if `Expr` is one of `Exprs`. 139 // There are more than 64 but less than 128 RelExprs, so we divide the set of 140 // exprs into [0, 64) and [64, 128) and represent each range as a constant 141 // 64-bit mask. Then we decide which mask to test depending on the value of 142 // expr and use a simple shift and bitwise-and to test for membership. 143 template <RelExpr... Exprs> static bool oneof(RelExpr expr) { 144 assert(0 <= expr && (int)expr < 128 && 145 "RelExpr is too large for 128-bit mask!"); 146 147 if (expr >= 64) 148 return (uint64_t(1) << (expr - 64)) & buildMask((Exprs - 64)...); 149 return (uint64_t(1) << expr) & buildMask(Exprs...); 150 } 151 152 static RelType getMipsPairType(RelType type, bool isLocal) { 153 switch (type) { 154 case R_MIPS_HI16: 155 return R_MIPS_LO16; 156 case R_MIPS_GOT16: 157 // In case of global symbol, the R_MIPS_GOT16 relocation does not 158 // have a pair. Each global symbol has a unique entry in the GOT 159 // and a corresponding instruction with help of the R_MIPS_GOT16 160 // relocation loads an address of the symbol. In case of local 161 // symbol, the R_MIPS_GOT16 relocation creates a GOT entry to hold 162 // the high 16 bits of the symbol's value. A paired R_MIPS_LO16 163 // relocations handle low 16 bits of the address. That allows 164 // to allocate only one GOT entry for every 64 KBytes of local data. 165 return isLocal ? R_MIPS_LO16 : R_MIPS_NONE; 166 case R_MICROMIPS_GOT16: 167 return isLocal ? R_MICROMIPS_LO16 : R_MIPS_NONE; 168 case R_MIPS_PCHI16: 169 return R_MIPS_PCLO16; 170 case R_MICROMIPS_HI16: 171 return R_MICROMIPS_LO16; 172 default: 173 return R_MIPS_NONE; 174 } 175 } 176 177 // True if non-preemptable symbol always has the same value regardless of where 178 // the DSO is loaded. 179 static bool isAbsolute(const Symbol &sym) { 180 if (sym.isUndefWeak()) 181 return true; 182 if (const auto *dr = dyn_cast<Defined>(&sym)) 183 return dr->section == nullptr; // Absolute symbol. 184 return false; 185 } 186 187 static bool isAbsoluteValue(const Symbol &sym) { 188 return isAbsolute(sym) || sym.isTls(); 189 } 190 191 // Returns true if Expr refers a PLT entry. 192 static bool needsPlt(RelExpr expr) { 193 return oneof<R_PLT, R_PLT_PC, R_PLT_GOTPLT, R_PPC32_PLTREL, R_PPC64_CALL_PLT>( 194 expr); 195 } 196 197 // Returns true if Expr refers a GOT entry. Note that this function 198 // returns false for TLS variables even though they need GOT, because 199 // TLS variables uses GOT differently than the regular variables. 200 static bool needsGot(RelExpr expr) { 201 return oneof<R_GOT, R_GOT_OFF, R_MIPS_GOT_LOCAL_PAGE, R_MIPS_GOT_OFF, 202 R_MIPS_GOT_OFF32, R_AARCH64_GOT_PAGE_PC, R_GOT_PC, R_GOTPLT, 203 R_AARCH64_GOT_PAGE>(expr); 204 } 205 206 // True if this expression is of the form Sym - X, where X is a position in the 207 // file (PC, or GOT for example). 208 static bool isRelExpr(RelExpr expr) { 209 return oneof<R_PC, R_GOTREL, R_GOTPLTREL, R_MIPS_GOTREL, R_PPC64_CALL, 210 R_PPC64_RELAX_TOC, R_AARCH64_PAGE_PC, R_RELAX_GOT_PC, 211 R_RISCV_PC_INDIRECT, R_PPC64_RELAX_GOT_PC>(expr); 212 } 213 214 215 static RelExpr toPlt(RelExpr expr) { 216 switch (expr) { 217 case R_PPC64_CALL: 218 return R_PPC64_CALL_PLT; 219 case R_PC: 220 return R_PLT_PC; 221 case R_ABS: 222 return R_PLT; 223 default: 224 return expr; 225 } 226 } 227 228 static RelExpr fromPlt(RelExpr expr) { 229 // We decided not to use a plt. Optimize a reference to the plt to a 230 // reference to the symbol itself. 231 switch (expr) { 232 case R_PLT_PC: 233 case R_PPC32_PLTREL: 234 return R_PC; 235 case R_PPC64_CALL_PLT: 236 return R_PPC64_CALL; 237 case R_PLT: 238 return R_ABS; 239 case R_PLT_GOTPLT: 240 return R_GOTPLTREL; 241 default: 242 return expr; 243 } 244 } 245 246 // Returns true if a given shared symbol is in a read-only segment in a DSO. 247 template <class ELFT> static bool isReadOnly(SharedSymbol &ss) { 248 using Elf_Phdr = typename ELFT::Phdr; 249 250 // Determine if the symbol is read-only by scanning the DSO's program headers. 251 const auto &file = cast<SharedFile>(*ss.file); 252 for (const Elf_Phdr &phdr : 253 check(file.template getObj<ELFT>().program_headers())) 254 if ((phdr.p_type == ELF::PT_LOAD || phdr.p_type == ELF::PT_GNU_RELRO) && 255 !(phdr.p_flags & ELF::PF_W) && ss.value >= phdr.p_vaddr && 256 ss.value < phdr.p_vaddr + phdr.p_memsz) 257 return true; 258 return false; 259 } 260 261 // Returns symbols at the same offset as a given symbol, including SS itself. 262 // 263 // If two or more symbols are at the same offset, and at least one of 264 // them are copied by a copy relocation, all of them need to be copied. 265 // Otherwise, they would refer to different places at runtime. 266 template <class ELFT> 267 static SmallSet<SharedSymbol *, 4> getSymbolsAt(SharedSymbol &ss) { 268 using Elf_Sym = typename ELFT::Sym; 269 270 const auto &file = cast<SharedFile>(*ss.file); 271 272 SmallSet<SharedSymbol *, 4> ret; 273 for (const Elf_Sym &s : file.template getGlobalELFSyms<ELFT>()) { 274 if (s.st_shndx == SHN_UNDEF || s.st_shndx == SHN_ABS || 275 s.getType() == STT_TLS || s.st_value != ss.value) 276 continue; 277 StringRef name = check(s.getName(file.getStringTable())); 278 Symbol *sym = symtab.find(name); 279 if (auto *alias = dyn_cast_or_null<SharedSymbol>(sym)) 280 ret.insert(alias); 281 } 282 283 // The loop does not check SHT_GNU_verneed, so ret does not contain 284 // non-default version symbols. If ss has a non-default version, ret won't 285 // contain ss. Just add ss unconditionally. If a non-default version alias is 286 // separately copy relocated, it and ss will have different addresses. 287 // Fortunately this case is impractical and fails with GNU ld as well. 288 ret.insert(&ss); 289 return ret; 290 } 291 292 // When a symbol is copy relocated or we create a canonical plt entry, it is 293 // effectively a defined symbol. In the case of copy relocation the symbol is 294 // in .bss and in the case of a canonical plt entry it is in .plt. This function 295 // replaces the existing symbol with a Defined pointing to the appropriate 296 // location. 297 static void replaceWithDefined(Symbol &sym, SectionBase &sec, uint64_t value, 298 uint64_t size) { 299 Symbol old = sym; 300 Defined(sym.file, StringRef(), sym.binding, sym.stOther, sym.type, value, 301 size, &sec) 302 .overwrite(sym); 303 304 sym.verdefIndex = old.verdefIndex; 305 sym.exportDynamic = true; 306 sym.isUsedInRegularObj = true; 307 // A copy relocated alias may need a GOT entry. 308 sym.flags.store(old.flags.load(std::memory_order_relaxed) & NEEDS_GOT, 309 std::memory_order_relaxed); 310 } 311 312 // Reserve space in .bss or .bss.rel.ro for copy relocation. 313 // 314 // The copy relocation is pretty much a hack. If you use a copy relocation 315 // in your program, not only the symbol name but the symbol's size, RW/RO 316 // bit and alignment become part of the ABI. In addition to that, if the 317 // symbol has aliases, the aliases become part of the ABI. That's subtle, 318 // but if you violate that implicit ABI, that can cause very counter- 319 // intuitive consequences. 320 // 321 // So, what is the copy relocation? It's for linking non-position 322 // independent code to DSOs. In an ideal world, all references to data 323 // exported by DSOs should go indirectly through GOT. But if object files 324 // are compiled as non-PIC, all data references are direct. There is no 325 // way for the linker to transform the code to use GOT, as machine 326 // instructions are already set in stone in object files. This is where 327 // the copy relocation takes a role. 328 // 329 // A copy relocation instructs the dynamic linker to copy data from a DSO 330 // to a specified address (which is usually in .bss) at load-time. If the 331 // static linker (that's us) finds a direct data reference to a DSO 332 // symbol, it creates a copy relocation, so that the symbol can be 333 // resolved as if it were in .bss rather than in a DSO. 334 // 335 // As you can see in this function, we create a copy relocation for the 336 // dynamic linker, and the relocation contains not only symbol name but 337 // various other information about the symbol. So, such attributes become a 338 // part of the ABI. 339 // 340 // Note for application developers: I can give you a piece of advice if 341 // you are writing a shared library. You probably should export only 342 // functions from your library. You shouldn't export variables. 343 // 344 // As an example what can happen when you export variables without knowing 345 // the semantics of copy relocations, assume that you have an exported 346 // variable of type T. It is an ABI-breaking change to add new members at 347 // end of T even though doing that doesn't change the layout of the 348 // existing members. That's because the space for the new members are not 349 // reserved in .bss unless you recompile the main program. That means they 350 // are likely to overlap with other data that happens to be laid out next 351 // to the variable in .bss. This kind of issue is sometimes very hard to 352 // debug. What's a solution? Instead of exporting a variable V from a DSO, 353 // define an accessor getV(). 354 template <class ELFT> static void addCopyRelSymbol(SharedSymbol &ss) { 355 // Copy relocation against zero-sized symbol doesn't make sense. 356 uint64_t symSize = ss.getSize(); 357 if (symSize == 0 || ss.alignment == 0) 358 fatal("cannot create a copy relocation for symbol " + toString(ss)); 359 360 // See if this symbol is in a read-only segment. If so, preserve the symbol's 361 // memory protection by reserving space in the .bss.rel.ro section. 362 bool isRO = isReadOnly<ELFT>(ss); 363 BssSection *sec = 364 make<BssSection>(isRO ? ".bss.rel.ro" : ".bss", symSize, ss.alignment); 365 OutputSection *osec = (isRO ? in.bssRelRo : in.bss)->getParent(); 366 367 // At this point, sectionBases has been migrated to sections. Append sec to 368 // sections. 369 if (osec->commands.empty() || 370 !isa<InputSectionDescription>(osec->commands.back())) 371 osec->commands.push_back(make<InputSectionDescription>("")); 372 auto *isd = cast<InputSectionDescription>(osec->commands.back()); 373 isd->sections.push_back(sec); 374 osec->commitSection(sec); 375 376 // Look through the DSO's dynamic symbol table for aliases and create a 377 // dynamic symbol for each one. This causes the copy relocation to correctly 378 // interpose any aliases. 379 for (SharedSymbol *sym : getSymbolsAt<ELFT>(ss)) 380 replaceWithDefined(*sym, *sec, 0, sym->size); 381 382 mainPart->relaDyn->addSymbolReloc(target->copyRel, *sec, 0, ss); 383 } 384 385 // .eh_frame sections are mergeable input sections, so their input 386 // offsets are not linearly mapped to output section. For each input 387 // offset, we need to find a section piece containing the offset and 388 // add the piece's base address to the input offset to compute the 389 // output offset. That isn't cheap. 390 // 391 // This class is to speed up the offset computation. When we process 392 // relocations, we access offsets in the monotonically increasing 393 // order. So we can optimize for that access pattern. 394 // 395 // For sections other than .eh_frame, this class doesn't do anything. 396 namespace { 397 class OffsetGetter { 398 public: 399 OffsetGetter() = default; 400 explicit OffsetGetter(InputSectionBase &sec) { 401 if (auto *eh = dyn_cast<EhInputSection>(&sec)) { 402 cies = eh->cies; 403 fdes = eh->fdes; 404 i = cies.begin(); 405 j = fdes.begin(); 406 } 407 } 408 409 // Translates offsets in input sections to offsets in output sections. 410 // Given offset must increase monotonically. We assume that Piece is 411 // sorted by inputOff. 412 uint64_t get(uint64_t off) { 413 if (cies.empty()) 414 return off; 415 416 while (j != fdes.end() && j->inputOff <= off) 417 ++j; 418 auto it = j; 419 if (j == fdes.begin() || j[-1].inputOff + j[-1].size <= off) { 420 while (i != cies.end() && i->inputOff <= off) 421 ++i; 422 if (i == cies.begin() || i[-1].inputOff + i[-1].size <= off) 423 fatal(".eh_frame: relocation is not in any piece"); 424 it = i; 425 } 426 427 // Offset -1 means that the piece is dead (i.e. garbage collected). 428 if (it[-1].outputOff == -1) 429 return -1; 430 return it[-1].outputOff + (off - it[-1].inputOff); 431 } 432 433 private: 434 ArrayRef<EhSectionPiece> cies, fdes; 435 ArrayRef<EhSectionPiece>::iterator i, j; 436 }; 437 438 // This class encapsulates states needed to scan relocations for one 439 // InputSectionBase. 440 class RelocationScanner { 441 public: 442 template <class ELFT> void scanSection(InputSectionBase &s); 443 444 private: 445 InputSectionBase *sec; 446 OffsetGetter getter; 447 448 // End of relocations, used by Mips/PPC64. 449 const void *end = nullptr; 450 451 template <class RelTy> RelType getMipsN32RelType(RelTy *&rel) const; 452 template <class ELFT, class RelTy> 453 int64_t computeMipsAddend(const RelTy &rel, RelExpr expr, bool isLocal) const; 454 bool isStaticLinkTimeConstant(RelExpr e, RelType type, const Symbol &sym, 455 uint64_t relOff) const; 456 void processAux(RelExpr expr, RelType type, uint64_t offset, Symbol &sym, 457 int64_t addend) const; 458 template <class ELFT, class RelTy> void scanOne(RelTy *&i); 459 template <class ELFT, class RelTy> void scan(ArrayRef<RelTy> rels); 460 }; 461 } // namespace 462 463 // MIPS has an odd notion of "paired" relocations to calculate addends. 464 // For example, if a relocation is of R_MIPS_HI16, there must be a 465 // R_MIPS_LO16 relocation after that, and an addend is calculated using 466 // the two relocations. 467 template <class ELFT, class RelTy> 468 int64_t RelocationScanner::computeMipsAddend(const RelTy &rel, RelExpr expr, 469 bool isLocal) const { 470 if (expr == R_MIPS_GOTREL && isLocal) 471 return sec->getFile<ELFT>()->mipsGp0; 472 473 // The ABI says that the paired relocation is used only for REL. 474 // See p. 4-17 at ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf 475 if (RelTy::IsRela) 476 return 0; 477 478 RelType type = rel.getType(config->isMips64EL); 479 uint32_t pairTy = getMipsPairType(type, isLocal); 480 if (pairTy == R_MIPS_NONE) 481 return 0; 482 483 const uint8_t *buf = sec->content().data(); 484 uint32_t symIndex = rel.getSymbol(config->isMips64EL); 485 486 // To make things worse, paired relocations might not be contiguous in 487 // the relocation table, so we need to do linear search. *sigh* 488 for (const RelTy *ri = &rel; ri != static_cast<const RelTy *>(end); ++ri) 489 if (ri->getType(config->isMips64EL) == pairTy && 490 ri->getSymbol(config->isMips64EL) == symIndex) 491 return target->getImplicitAddend(buf + ri->r_offset, pairTy); 492 493 warn("can't find matching " + toString(pairTy) + " relocation for " + 494 toString(type)); 495 return 0; 496 } 497 498 // Custom error message if Sym is defined in a discarded section. 499 template <class ELFT> 500 static std::string maybeReportDiscarded(Undefined &sym) { 501 auto *file = dyn_cast_or_null<ObjFile<ELFT>>(sym.file); 502 if (!file || !sym.discardedSecIdx || 503 file->getSections()[sym.discardedSecIdx] != &InputSection::discarded) 504 return ""; 505 ArrayRef<typename ELFT::Shdr> objSections = 506 file->template getELFShdrs<ELFT>(); 507 508 std::string msg; 509 if (sym.type == ELF::STT_SECTION) { 510 msg = "relocation refers to a discarded section: "; 511 msg += CHECK( 512 file->getObj().getSectionName(objSections[sym.discardedSecIdx]), file); 513 } else { 514 msg = "relocation refers to a symbol in a discarded section: " + 515 toString(sym); 516 } 517 msg += "\n>>> defined in " + toString(file); 518 519 Elf_Shdr_Impl<ELFT> elfSec = objSections[sym.discardedSecIdx - 1]; 520 if (elfSec.sh_type != SHT_GROUP) 521 return msg; 522 523 // If the discarded section is a COMDAT. 524 StringRef signature = file->getShtGroupSignature(objSections, elfSec); 525 if (const InputFile *prevailing = 526 symtab.comdatGroups.lookup(CachedHashStringRef(signature))) { 527 msg += "\n>>> section group signature: " + signature.str() + 528 "\n>>> prevailing definition is in " + toString(prevailing); 529 if (sym.nonPrevailing) { 530 msg += "\n>>> or the symbol in the prevailing group had STB_WEAK " 531 "binding and the symbol in a non-prevailing group had STB_GLOBAL " 532 "binding. Mixing groups with STB_WEAK and STB_GLOBAL binding " 533 "signature is not supported"; 534 } 535 } 536 return msg; 537 } 538 539 namespace { 540 // Undefined diagnostics are collected in a vector and emitted once all of 541 // them are known, so that some postprocessing on the list of undefined symbols 542 // can happen before lld emits diagnostics. 543 struct UndefinedDiag { 544 Undefined *sym; 545 struct Loc { 546 InputSectionBase *sec; 547 uint64_t offset; 548 }; 549 std::vector<Loc> locs; 550 bool isWarning; 551 }; 552 553 std::vector<UndefinedDiag> undefs; 554 std::mutex relocMutex; 555 } 556 557 // Check whether the definition name def is a mangled function name that matches 558 // the reference name ref. 559 static bool canSuggestExternCForCXX(StringRef ref, StringRef def) { 560 llvm::ItaniumPartialDemangler d; 561 std::string name = def.str(); 562 if (d.partialDemangle(name.c_str())) 563 return false; 564 char *buf = d.getFunctionName(nullptr, nullptr); 565 if (!buf) 566 return false; 567 bool ret = ref == buf; 568 free(buf); 569 return ret; 570 } 571 572 // Suggest an alternative spelling of an "undefined symbol" diagnostic. Returns 573 // the suggested symbol, which is either in the symbol table, or in the same 574 // file of sym. 575 static const Symbol *getAlternativeSpelling(const Undefined &sym, 576 std::string &pre_hint, 577 std::string &post_hint) { 578 DenseMap<StringRef, const Symbol *> map; 579 if (sym.file && sym.file->kind() == InputFile::ObjKind) { 580 auto *file = cast<ELFFileBase>(sym.file); 581 // If sym is a symbol defined in a discarded section, maybeReportDiscarded() 582 // will give an error. Don't suggest an alternative spelling. 583 if (file && sym.discardedSecIdx != 0 && 584 file->getSections()[sym.discardedSecIdx] == &InputSection::discarded) 585 return nullptr; 586 587 // Build a map of local defined symbols. 588 for (const Symbol *s : sym.file->getSymbols()) 589 if (s->isLocal() && s->isDefined() && !s->getName().empty()) 590 map.try_emplace(s->getName(), s); 591 } 592 593 auto suggest = [&](StringRef newName) -> const Symbol * { 594 // If defined locally. 595 if (const Symbol *s = map.lookup(newName)) 596 return s; 597 598 // If in the symbol table and not undefined. 599 if (const Symbol *s = symtab.find(newName)) 600 if (!s->isUndefined()) 601 return s; 602 603 return nullptr; 604 }; 605 606 // This loop enumerates all strings of Levenshtein distance 1 as typo 607 // correction candidates and suggests the one that exists as a non-undefined 608 // symbol. 609 StringRef name = sym.getName(); 610 for (size_t i = 0, e = name.size(); i != e + 1; ++i) { 611 // Insert a character before name[i]. 612 std::string newName = (name.substr(0, i) + "0" + name.substr(i)).str(); 613 for (char c = '0'; c <= 'z'; ++c) { 614 newName[i] = c; 615 if (const Symbol *s = suggest(newName)) 616 return s; 617 } 618 if (i == e) 619 break; 620 621 // Substitute name[i]. 622 newName = std::string(name); 623 for (char c = '0'; c <= 'z'; ++c) { 624 newName[i] = c; 625 if (const Symbol *s = suggest(newName)) 626 return s; 627 } 628 629 // Transpose name[i] and name[i+1]. This is of edit distance 2 but it is 630 // common. 631 if (i + 1 < e) { 632 newName[i] = name[i + 1]; 633 newName[i + 1] = name[i]; 634 if (const Symbol *s = suggest(newName)) 635 return s; 636 } 637 638 // Delete name[i]. 639 newName = (name.substr(0, i) + name.substr(i + 1)).str(); 640 if (const Symbol *s = suggest(newName)) 641 return s; 642 } 643 644 // Case mismatch, e.g. Foo vs FOO. 645 for (auto &it : map) 646 if (name.equals_insensitive(it.first)) 647 return it.second; 648 for (Symbol *sym : symtab.getSymbols()) 649 if (!sym->isUndefined() && name.equals_insensitive(sym->getName())) 650 return sym; 651 652 // The reference may be a mangled name while the definition is not. Suggest a 653 // missing extern "C". 654 if (name.startswith("_Z")) { 655 std::string buf = name.str(); 656 llvm::ItaniumPartialDemangler d; 657 if (!d.partialDemangle(buf.c_str())) 658 if (char *buf = d.getFunctionName(nullptr, nullptr)) { 659 const Symbol *s = suggest(buf); 660 free(buf); 661 if (s) { 662 pre_hint = ": extern \"C\" "; 663 return s; 664 } 665 } 666 } else { 667 const Symbol *s = nullptr; 668 for (auto &it : map) 669 if (canSuggestExternCForCXX(name, it.first)) { 670 s = it.second; 671 break; 672 } 673 if (!s) 674 for (Symbol *sym : symtab.getSymbols()) 675 if (canSuggestExternCForCXX(name, sym->getName())) { 676 s = sym; 677 break; 678 } 679 if (s) { 680 pre_hint = " to declare "; 681 post_hint = " as extern \"C\"?"; 682 return s; 683 } 684 } 685 686 return nullptr; 687 } 688 689 static void reportUndefinedSymbol(const UndefinedDiag &undef, 690 bool correctSpelling) { 691 Undefined &sym = *undef.sym; 692 693 auto visibility = [&]() -> std::string { 694 switch (sym.visibility()) { 695 case STV_INTERNAL: 696 return "internal "; 697 case STV_HIDDEN: 698 return "hidden "; 699 case STV_PROTECTED: 700 return "protected "; 701 default: 702 return ""; 703 } 704 }; 705 706 std::string msg; 707 switch (config->ekind) { 708 case ELF32LEKind: 709 msg = maybeReportDiscarded<ELF32LE>(sym); 710 break; 711 case ELF32BEKind: 712 msg = maybeReportDiscarded<ELF32BE>(sym); 713 break; 714 case ELF64LEKind: 715 msg = maybeReportDiscarded<ELF64LE>(sym); 716 break; 717 case ELF64BEKind: 718 msg = maybeReportDiscarded<ELF64BE>(sym); 719 break; 720 default: 721 llvm_unreachable(""); 722 } 723 if (msg.empty()) 724 msg = "undefined " + visibility() + "symbol: " + toString(sym); 725 726 const size_t maxUndefReferences = 3; 727 size_t i = 0; 728 for (UndefinedDiag::Loc l : undef.locs) { 729 if (i >= maxUndefReferences) 730 break; 731 InputSectionBase &sec = *l.sec; 732 uint64_t offset = l.offset; 733 734 msg += "\n>>> referenced by "; 735 std::string src = sec.getSrcMsg(sym, offset); 736 if (!src.empty()) 737 msg += src + "\n>>> "; 738 msg += sec.getObjMsg(offset); 739 i++; 740 } 741 742 if (i < undef.locs.size()) 743 msg += ("\n>>> referenced " + Twine(undef.locs.size() - i) + " more times") 744 .str(); 745 746 if (correctSpelling) { 747 std::string pre_hint = ": ", post_hint; 748 if (const Symbol *corrected = 749 getAlternativeSpelling(sym, pre_hint, post_hint)) { 750 msg += "\n>>> did you mean" + pre_hint + toString(*corrected) + post_hint; 751 if (corrected->file) 752 msg += "\n>>> defined in: " + toString(corrected->file); 753 } 754 } 755 756 if (sym.getName().startswith("_ZTV")) 757 msg += 758 "\n>>> the vtable symbol may be undefined because the class is missing " 759 "its key function (see https://lld.llvm.org/missingkeyfunction)"; 760 if (config->gcSections && config->zStartStopGC && 761 sym.getName().startswith("__start_")) { 762 msg += "\n>>> the encapsulation symbol needs to be retained under " 763 "--gc-sections properly; consider -z nostart-stop-gc " 764 "(see https://lld.llvm.org/ELF/start-stop-gc)"; 765 } 766 767 if (undef.isWarning) 768 warn(msg); 769 else 770 error(msg, ErrorTag::SymbolNotFound, {sym.getName()}); 771 } 772 773 void elf::reportUndefinedSymbols() { 774 // Find the first "undefined symbol" diagnostic for each diagnostic, and 775 // collect all "referenced from" lines at the first diagnostic. 776 DenseMap<Symbol *, UndefinedDiag *> firstRef; 777 for (UndefinedDiag &undef : undefs) { 778 assert(undef.locs.size() == 1); 779 if (UndefinedDiag *canon = firstRef.lookup(undef.sym)) { 780 canon->locs.push_back(undef.locs[0]); 781 undef.locs.clear(); 782 } else 783 firstRef[undef.sym] = &undef; 784 } 785 786 // Enable spell corrector for the first 2 diagnostics. 787 for (const auto &[i, undef] : llvm::enumerate(undefs)) 788 if (!undef.locs.empty()) 789 reportUndefinedSymbol(undef, i < 2); 790 undefs.clear(); 791 } 792 793 // Report an undefined symbol if necessary. 794 // Returns true if the undefined symbol will produce an error message. 795 static bool maybeReportUndefined(Undefined &sym, InputSectionBase &sec, 796 uint64_t offset) { 797 std::lock_guard<std::mutex> lock(relocMutex); 798 // If versioned, issue an error (even if the symbol is weak) because we don't 799 // know the defining filename which is required to construct a Verneed entry. 800 if (sym.hasVersionSuffix) { 801 undefs.push_back({&sym, {{&sec, offset}}, false}); 802 return true; 803 } 804 if (sym.isWeak()) 805 return false; 806 807 bool canBeExternal = !sym.isLocal() && sym.visibility() == STV_DEFAULT; 808 if (config->unresolvedSymbols == UnresolvedPolicy::Ignore && canBeExternal) 809 return false; 810 811 // clang (as of 2019-06-12) / gcc (as of 8.2.1) PPC64 may emit a .rela.toc 812 // which references a switch table in a discarded .rodata/.text section. The 813 // .toc and the .rela.toc are incorrectly not placed in the comdat. The ELF 814 // spec says references from outside the group to a STB_LOCAL symbol are not 815 // allowed. Work around the bug. 816 // 817 // PPC32 .got2 is similar but cannot be fixed. Multiple .got2 is infeasible 818 // because .LC0-.LTOC is not representable if the two labels are in different 819 // .got2 820 if (sym.discardedSecIdx != 0 && (sec.name == ".got2" || sec.name == ".toc")) 821 return false; 822 823 bool isWarning = 824 (config->unresolvedSymbols == UnresolvedPolicy::Warn && canBeExternal) || 825 config->noinhibitExec; 826 undefs.push_back({&sym, {{&sec, offset}}, isWarning}); 827 return !isWarning; 828 } 829 830 // MIPS N32 ABI treats series of successive relocations with the same offset 831 // as a single relocation. The similar approach used by N64 ABI, but this ABI 832 // packs all relocations into the single relocation record. Here we emulate 833 // this for the N32 ABI. Iterate over relocation with the same offset and put 834 // theirs types into the single bit-set. 835 template <class RelTy> 836 RelType RelocationScanner::getMipsN32RelType(RelTy *&rel) const { 837 RelType type = 0; 838 uint64_t offset = rel->r_offset; 839 840 int n = 0; 841 while (rel != static_cast<const RelTy *>(end) && rel->r_offset == offset) 842 type |= (rel++)->getType(config->isMips64EL) << (8 * n++); 843 return type; 844 } 845 846 template <bool shard = false> 847 static void addRelativeReloc(InputSectionBase &isec, uint64_t offsetInSec, 848 Symbol &sym, int64_t addend, RelExpr expr, 849 RelType type) { 850 Partition &part = isec.getPartition(); 851 852 // Add a relative relocation. If relrDyn section is enabled, and the 853 // relocation offset is guaranteed to be even, add the relocation to 854 // the relrDyn section, otherwise add it to the relaDyn section. 855 // relrDyn sections don't support odd offsets. Also, relrDyn sections 856 // don't store the addend values, so we must write it to the relocated 857 // address. 858 if (part.relrDyn && isec.addralign >= 2 && offsetInSec % 2 == 0) { 859 isec.addReloc({expr, type, offsetInSec, addend, &sym}); 860 if (shard) 861 part.relrDyn->relocsVec[parallel::getThreadIndex()].push_back( 862 {&isec, offsetInSec}); 863 else 864 part.relrDyn->relocs.push_back({&isec, offsetInSec}); 865 return; 866 } 867 part.relaDyn->addRelativeReloc<shard>(target->relativeRel, isec, offsetInSec, 868 sym, addend, type, expr); 869 } 870 871 template <class PltSection, class GotPltSection> 872 static void addPltEntry(PltSection &plt, GotPltSection &gotPlt, 873 RelocationBaseSection &rel, RelType type, Symbol &sym) { 874 plt.addEntry(sym); 875 gotPlt.addEntry(sym); 876 rel.addReloc({type, &gotPlt, sym.getGotPltOffset(), 877 sym.isPreemptible ? DynamicReloc::AgainstSymbol 878 : DynamicReloc::AddendOnlyWithTargetVA, 879 sym, 0, R_ABS}); 880 } 881 882 static void addGotEntry(Symbol &sym) { 883 in.got->addEntry(sym); 884 uint64_t off = sym.getGotOffset(); 885 886 // If preemptible, emit a GLOB_DAT relocation. 887 if (sym.isPreemptible) { 888 mainPart->relaDyn->addReloc({target->gotRel, in.got.get(), off, 889 DynamicReloc::AgainstSymbol, sym, 0, R_ABS}); 890 return; 891 } 892 893 // Otherwise, the value is either a link-time constant or the load base 894 // plus a constant. 895 if (!config->isPic || isAbsolute(sym)) 896 in.got->addConstant({R_ABS, target->symbolicRel, off, 0, &sym}); 897 else 898 addRelativeReloc(*in.got, off, sym, 0, R_ABS, target->symbolicRel); 899 } 900 901 static void addTpOffsetGotEntry(Symbol &sym) { 902 in.got->addEntry(sym); 903 uint64_t off = sym.getGotOffset(); 904 if (!sym.isPreemptible && !config->isPic) { 905 in.got->addConstant({R_TPREL, target->symbolicRel, off, 0, &sym}); 906 return; 907 } 908 mainPart->relaDyn->addAddendOnlyRelocIfNonPreemptible( 909 target->tlsGotRel, *in.got, off, sym, target->symbolicRel); 910 } 911 912 // Return true if we can define a symbol in the executable that 913 // contains the value/function of a symbol defined in a shared 914 // library. 915 static bool canDefineSymbolInExecutable(Symbol &sym) { 916 // If the symbol has default visibility the symbol defined in the 917 // executable will preempt it. 918 // Note that we want the visibility of the shared symbol itself, not 919 // the visibility of the symbol in the output file we are producing. 920 if (!sym.dsoProtected) 921 return true; 922 923 // If we are allowed to break address equality of functions, defining 924 // a plt entry will allow the program to call the function in the 925 // .so, but the .so and the executable will no agree on the address 926 // of the function. Similar logic for objects. 927 return ((sym.isFunc() && config->ignoreFunctionAddressEquality) || 928 (sym.isObject() && config->ignoreDataAddressEquality)); 929 } 930 931 // Returns true if a given relocation can be computed at link-time. 932 // This only handles relocation types expected in processAux. 933 // 934 // For instance, we know the offset from a relocation to its target at 935 // link-time if the relocation is PC-relative and refers a 936 // non-interposable function in the same executable. This function 937 // will return true for such relocation. 938 // 939 // If this function returns false, that means we need to emit a 940 // dynamic relocation so that the relocation will be fixed at load-time. 941 bool RelocationScanner::isStaticLinkTimeConstant(RelExpr e, RelType type, 942 const Symbol &sym, 943 uint64_t relOff) const { 944 // These expressions always compute a constant 945 if (oneof<R_GOTPLT, R_GOT_OFF, R_RELAX_HINT, R_MIPS_GOT_LOCAL_PAGE, 946 R_MIPS_GOTREL, R_MIPS_GOT_OFF, R_MIPS_GOT_OFF32, R_MIPS_GOT_GP_PC, 947 R_AARCH64_GOT_PAGE_PC, R_GOT_PC, R_GOTONLY_PC, R_GOTPLTONLY_PC, 948 R_PLT_PC, R_PLT_GOTPLT, R_PPC32_PLTREL, R_PPC64_CALL_PLT, 949 R_PPC64_RELAX_TOC, R_RISCV_ADD, R_AARCH64_GOT_PAGE>(e)) 950 return true; 951 952 // These never do, except if the entire file is position dependent or if 953 // only the low bits are used. 954 if (e == R_GOT || e == R_PLT) 955 return target->usesOnlyLowPageBits(type) || !config->isPic; 956 957 if (sym.isPreemptible) 958 return false; 959 if (!config->isPic) 960 return true; 961 962 // The size of a non preemptible symbol is a constant. 963 if (e == R_SIZE) 964 return true; 965 966 // For the target and the relocation, we want to know if they are 967 // absolute or relative. 968 bool absVal = isAbsoluteValue(sym); 969 bool relE = isRelExpr(e); 970 if (absVal && !relE) 971 return true; 972 if (!absVal && relE) 973 return true; 974 if (!absVal && !relE) 975 return target->usesOnlyLowPageBits(type); 976 977 assert(absVal && relE); 978 979 // Allow R_PLT_PC (optimized to R_PC here) to a hidden undefined weak symbol 980 // in PIC mode. This is a little strange, but it allows us to link function 981 // calls to such symbols (e.g. glibc/stdlib/exit.c:__run_exit_handlers). 982 // Normally such a call will be guarded with a comparison, which will load a 983 // zero from the GOT. 984 if (sym.isUndefWeak()) 985 return true; 986 987 // We set the final symbols values for linker script defined symbols later. 988 // They always can be computed as a link time constant. 989 if (sym.scriptDefined) 990 return true; 991 992 error("relocation " + toString(type) + " cannot refer to absolute symbol: " + 993 toString(sym) + getLocation(*sec, sym, relOff)); 994 return true; 995 } 996 997 // The reason we have to do this early scan is as follows 998 // * To mmap the output file, we need to know the size 999 // * For that, we need to know how many dynamic relocs we will have. 1000 // It might be possible to avoid this by outputting the file with write: 1001 // * Write the allocated output sections, computing addresses. 1002 // * Apply relocations, recording which ones require a dynamic reloc. 1003 // * Write the dynamic relocations. 1004 // * Write the rest of the file. 1005 // This would have some drawbacks. For example, we would only know if .rela.dyn 1006 // is needed after applying relocations. If it is, it will go after rw and rx 1007 // sections. Given that it is ro, we will need an extra PT_LOAD. This 1008 // complicates things for the dynamic linker and means we would have to reserve 1009 // space for the extra PT_LOAD even if we end up not using it. 1010 void RelocationScanner::processAux(RelExpr expr, RelType type, uint64_t offset, 1011 Symbol &sym, int64_t addend) const { 1012 // If non-ifunc non-preemptible, change PLT to direct call and optimize GOT 1013 // indirection. 1014 const bool isIfunc = sym.isGnuIFunc(); 1015 if (!sym.isPreemptible && (!isIfunc || config->zIfuncNoplt)) { 1016 if (expr != R_GOT_PC) { 1017 // The 0x8000 bit of r_addend of R_PPC_PLTREL24 is used to choose call 1018 // stub type. It should be ignored if optimized to R_PC. 1019 if (config->emachine == EM_PPC && expr == R_PPC32_PLTREL) 1020 addend &= ~0x8000; 1021 // R_HEX_GD_PLT_B22_PCREL (call a@GDPLT) is transformed into 1022 // call __tls_get_addr even if the symbol is non-preemptible. 1023 if (!(config->emachine == EM_HEXAGON && 1024 (type == R_HEX_GD_PLT_B22_PCREL || 1025 type == R_HEX_GD_PLT_B22_PCREL_X || 1026 type == R_HEX_GD_PLT_B32_PCREL_X))) 1027 expr = fromPlt(expr); 1028 } else if (!isAbsoluteValue(sym)) { 1029 expr = 1030 target->adjustGotPcExpr(type, addend, sec->content().data() + offset); 1031 } 1032 } 1033 1034 // We were asked not to generate PLT entries for ifuncs. Instead, pass the 1035 // direct relocation on through. 1036 if (LLVM_UNLIKELY(isIfunc) && config->zIfuncNoplt) { 1037 std::lock_guard<std::mutex> lock(relocMutex); 1038 sym.exportDynamic = true; 1039 mainPart->relaDyn->addSymbolReloc(type, *sec, offset, sym, addend, type); 1040 return; 1041 } 1042 1043 if (needsGot(expr)) { 1044 if (config->emachine == EM_MIPS) { 1045 // MIPS ABI has special rules to process GOT entries and doesn't 1046 // require relocation entries for them. A special case is TLS 1047 // relocations. In that case dynamic loader applies dynamic 1048 // relocations to initialize TLS GOT entries. 1049 // See "Global Offset Table" in Chapter 5 in the following document 1050 // for detailed description: 1051 // ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf 1052 in.mipsGot->addEntry(*sec->file, sym, addend, expr); 1053 } else { 1054 sym.setFlags(NEEDS_GOT); 1055 } 1056 } else if (needsPlt(expr)) { 1057 sym.setFlags(NEEDS_PLT); 1058 } else if (LLVM_UNLIKELY(isIfunc)) { 1059 sym.setFlags(HAS_DIRECT_RELOC); 1060 } 1061 1062 // If the relocation is known to be a link-time constant, we know no dynamic 1063 // relocation will be created, pass the control to relocateAlloc() or 1064 // relocateNonAlloc() to resolve it. 1065 // 1066 // The behavior of an undefined weak reference is implementation defined. For 1067 // non-link-time constants, we resolve relocations statically (let 1068 // relocate{,Non}Alloc() resolve them) for -no-pie and try producing dynamic 1069 // relocations for -pie and -shared. 1070 // 1071 // The general expectation of -no-pie static linking is that there is no 1072 // dynamic relocation (except IRELATIVE). Emitting dynamic relocations for 1073 // -shared matches the spirit of its -z undefs default. -pie has freedom on 1074 // choices, and we choose dynamic relocations to be consistent with the 1075 // handling of GOT-generating relocations. 1076 if (isStaticLinkTimeConstant(expr, type, sym, offset) || 1077 (!config->isPic && sym.isUndefWeak())) { 1078 sec->addReloc({expr, type, offset, addend, &sym}); 1079 return; 1080 } 1081 1082 bool canWrite = (sec->flags & SHF_WRITE) || !config->zText; 1083 if (canWrite) { 1084 RelType rel = target->getDynRel(type); 1085 if (expr == R_GOT || (rel == target->symbolicRel && !sym.isPreemptible)) { 1086 addRelativeReloc<true>(*sec, offset, sym, addend, expr, type); 1087 return; 1088 } else if (rel != 0) { 1089 if (config->emachine == EM_MIPS && rel == target->symbolicRel) 1090 rel = target->relativeRel; 1091 std::lock_guard<std::mutex> lock(relocMutex); 1092 sec->getPartition().relaDyn->addSymbolReloc(rel, *sec, offset, sym, 1093 addend, type); 1094 1095 // MIPS ABI turns using of GOT and dynamic relocations inside out. 1096 // While regular ABI uses dynamic relocations to fill up GOT entries 1097 // MIPS ABI requires dynamic linker to fills up GOT entries using 1098 // specially sorted dynamic symbol table. This affects even dynamic 1099 // relocations against symbols which do not require GOT entries 1100 // creation explicitly, i.e. do not have any GOT-relocations. So if 1101 // a preemptible symbol has a dynamic relocation we anyway have 1102 // to create a GOT entry for it. 1103 // If a non-preemptible symbol has a dynamic relocation against it, 1104 // dynamic linker takes it st_value, adds offset and writes down 1105 // result of the dynamic relocation. In case of preemptible symbol 1106 // dynamic linker performs symbol resolution, writes the symbol value 1107 // to the GOT entry and reads the GOT entry when it needs to perform 1108 // a dynamic relocation. 1109 // ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf p.4-19 1110 if (config->emachine == EM_MIPS) 1111 in.mipsGot->addEntry(*sec->file, sym, addend, expr); 1112 return; 1113 } 1114 } 1115 1116 // When producing an executable, we can perform copy relocations (for 1117 // STT_OBJECT) and canonical PLT (for STT_FUNC). 1118 if (!config->shared) { 1119 if (!canDefineSymbolInExecutable(sym)) { 1120 errorOrWarn("cannot preempt symbol: " + toString(sym) + 1121 getLocation(*sec, sym, offset)); 1122 return; 1123 } 1124 1125 if (sym.isObject()) { 1126 // Produce a copy relocation. 1127 if (auto *ss = dyn_cast<SharedSymbol>(&sym)) { 1128 if (!config->zCopyreloc) 1129 error("unresolvable relocation " + toString(type) + 1130 " against symbol '" + toString(*ss) + 1131 "'; recompile with -fPIC or remove '-z nocopyreloc'" + 1132 getLocation(*sec, sym, offset)); 1133 sym.setFlags(NEEDS_COPY); 1134 } 1135 sec->addReloc({expr, type, offset, addend, &sym}); 1136 return; 1137 } 1138 1139 // This handles a non PIC program call to function in a shared library. In 1140 // an ideal world, we could just report an error saying the relocation can 1141 // overflow at runtime. In the real world with glibc, crt1.o has a 1142 // R_X86_64_PC32 pointing to libc.so. 1143 // 1144 // The general idea on how to handle such cases is to create a PLT entry and 1145 // use that as the function value. 1146 // 1147 // For the static linking part, we just return a plt expr and everything 1148 // else will use the PLT entry as the address. 1149 // 1150 // The remaining problem is making sure pointer equality still works. We 1151 // need the help of the dynamic linker for that. We let it know that we have 1152 // a direct reference to a so symbol by creating an undefined symbol with a 1153 // non zero st_value. Seeing that, the dynamic linker resolves the symbol to 1154 // the value of the symbol we created. This is true even for got entries, so 1155 // pointer equality is maintained. To avoid an infinite loop, the only entry 1156 // that points to the real function is a dedicated got entry used by the 1157 // plt. That is identified by special relocation types (R_X86_64_JUMP_SLOT, 1158 // R_386_JMP_SLOT, etc). 1159 1160 // For position independent executable on i386, the plt entry requires ebx 1161 // to be set. This causes two problems: 1162 // * If some code has a direct reference to a function, it was probably 1163 // compiled without -fPIE/-fPIC and doesn't maintain ebx. 1164 // * If a library definition gets preempted to the executable, it will have 1165 // the wrong ebx value. 1166 if (sym.isFunc()) { 1167 if (config->pie && config->emachine == EM_386) 1168 errorOrWarn("symbol '" + toString(sym) + 1169 "' cannot be preempted; recompile with -fPIE" + 1170 getLocation(*sec, sym, offset)); 1171 sym.setFlags(NEEDS_COPY | NEEDS_PLT); 1172 sec->addReloc({expr, type, offset, addend, &sym}); 1173 return; 1174 } 1175 } 1176 1177 errorOrWarn("relocation " + toString(type) + " cannot be used against " + 1178 (sym.getName().empty() ? "local symbol" 1179 : "symbol '" + toString(sym) + "'") + 1180 "; recompile with -fPIC" + getLocation(*sec, sym, offset)); 1181 } 1182 1183 // This function is similar to the `handleTlsRelocation`. MIPS does not 1184 // support any relaxations for TLS relocations so by factoring out MIPS 1185 // handling in to the separate function we can simplify the code and do not 1186 // pollute other `handleTlsRelocation` by MIPS `ifs` statements. 1187 // Mips has a custom MipsGotSection that handles the writing of GOT entries 1188 // without dynamic relocations. 1189 static unsigned handleMipsTlsRelocation(RelType type, Symbol &sym, 1190 InputSectionBase &c, uint64_t offset, 1191 int64_t addend, RelExpr expr) { 1192 if (expr == R_MIPS_TLSLD) { 1193 in.mipsGot->addTlsIndex(*c.file); 1194 c.addReloc({expr, type, offset, addend, &sym}); 1195 return 1; 1196 } 1197 if (expr == R_MIPS_TLSGD) { 1198 in.mipsGot->addDynTlsEntry(*c.file, sym); 1199 c.addReloc({expr, type, offset, addend, &sym}); 1200 return 1; 1201 } 1202 return 0; 1203 } 1204 1205 // Notes about General Dynamic and Local Dynamic TLS models below. They may 1206 // require the generation of a pair of GOT entries that have associated dynamic 1207 // relocations. The pair of GOT entries created are of the form GOT[e0] Module 1208 // Index (Used to find pointer to TLS block at run-time) GOT[e1] Offset of 1209 // symbol in TLS block. 1210 // 1211 // Returns the number of relocations processed. 1212 static unsigned handleTlsRelocation(RelType type, Symbol &sym, 1213 InputSectionBase &c, uint64_t offset, 1214 int64_t addend, RelExpr expr) { 1215 if (expr == R_TPREL || expr == R_TPREL_NEG) { 1216 if (config->shared) { 1217 errorOrWarn("relocation " + toString(type) + " against " + toString(sym) + 1218 " cannot be used with -shared" + getLocation(c, sym, offset)); 1219 return 1; 1220 } 1221 return 0; 1222 } 1223 1224 if (config->emachine == EM_MIPS) 1225 return handleMipsTlsRelocation(type, sym, c, offset, addend, expr); 1226 1227 if (oneof<R_AARCH64_TLSDESC_PAGE, R_TLSDESC, R_TLSDESC_CALL, R_TLSDESC_PC, 1228 R_TLSDESC_GOTPLT>(expr) && 1229 config->shared) { 1230 if (expr != R_TLSDESC_CALL) { 1231 sym.setFlags(NEEDS_TLSDESC); 1232 c.addReloc({expr, type, offset, addend, &sym}); 1233 } 1234 return 1; 1235 } 1236 1237 // ARM, Hexagon and RISC-V do not support GD/LD to IE/LE relaxation. For 1238 // PPC64, if the file has missing R_PPC64_TLSGD/R_PPC64_TLSLD, disable 1239 // relaxation as well. 1240 bool toExecRelax = !config->shared && config->emachine != EM_ARM && 1241 config->emachine != EM_HEXAGON && 1242 config->emachine != EM_RISCV && 1243 !c.file->ppc64DisableTLSRelax; 1244 1245 // If we are producing an executable and the symbol is non-preemptable, it 1246 // must be defined and the code sequence can be relaxed to use Local-Exec. 1247 // 1248 // ARM and RISC-V do not support any relaxations for TLS relocations, however, 1249 // we can omit the DTPMOD dynamic relocations and resolve them at link time 1250 // because them are always 1. This may be necessary for static linking as 1251 // DTPMOD may not be expected at load time. 1252 bool isLocalInExecutable = !sym.isPreemptible && !config->shared; 1253 1254 // Local Dynamic is for access to module local TLS variables, while still 1255 // being suitable for being dynamically loaded via dlopen. GOT[e0] is the 1256 // module index, with a special value of 0 for the current module. GOT[e1] is 1257 // unused. There only needs to be one module index entry. 1258 if (oneof<R_TLSLD_GOT, R_TLSLD_GOTPLT, R_TLSLD_PC, R_TLSLD_HINT>( 1259 expr)) { 1260 // Local-Dynamic relocs can be relaxed to Local-Exec. 1261 if (toExecRelax) { 1262 c.addReloc({target->adjustTlsExpr(type, R_RELAX_TLS_LD_TO_LE), type, 1263 offset, addend, &sym}); 1264 return target->getTlsGdRelaxSkip(type); 1265 } 1266 if (expr == R_TLSLD_HINT) 1267 return 1; 1268 ctx.needsTlsLd.store(true, std::memory_order_relaxed); 1269 c.addReloc({expr, type, offset, addend, &sym}); 1270 return 1; 1271 } 1272 1273 // Local-Dynamic relocs can be relaxed to Local-Exec. 1274 if (expr == R_DTPREL) { 1275 if (toExecRelax) 1276 expr = target->adjustTlsExpr(type, R_RELAX_TLS_LD_TO_LE); 1277 c.addReloc({expr, type, offset, addend, &sym}); 1278 return 1; 1279 } 1280 1281 // Local-Dynamic sequence where offset of tls variable relative to dynamic 1282 // thread pointer is stored in the got. This cannot be relaxed to Local-Exec. 1283 if (expr == R_TLSLD_GOT_OFF) { 1284 sym.setFlags(NEEDS_GOT_DTPREL); 1285 c.addReloc({expr, type, offset, addend, &sym}); 1286 return 1; 1287 } 1288 1289 if (oneof<R_AARCH64_TLSDESC_PAGE, R_TLSDESC, R_TLSDESC_CALL, R_TLSDESC_PC, 1290 R_TLSDESC_GOTPLT, R_TLSGD_GOT, R_TLSGD_GOTPLT, R_TLSGD_PC>(expr)) { 1291 if (!toExecRelax) { 1292 sym.setFlags(NEEDS_TLSGD); 1293 c.addReloc({expr, type, offset, addend, &sym}); 1294 return 1; 1295 } 1296 1297 // Global-Dynamic relocs can be relaxed to Initial-Exec or Local-Exec 1298 // depending on the symbol being locally defined or not. 1299 if (sym.isPreemptible) { 1300 sym.setFlags(NEEDS_TLSGD_TO_IE); 1301 c.addReloc({target->adjustTlsExpr(type, R_RELAX_TLS_GD_TO_IE), type, 1302 offset, addend, &sym}); 1303 } else { 1304 c.addReloc({target->adjustTlsExpr(type, R_RELAX_TLS_GD_TO_LE), type, 1305 offset, addend, &sym}); 1306 } 1307 return target->getTlsGdRelaxSkip(type); 1308 } 1309 1310 if (oneof<R_GOT, R_GOTPLT, R_GOT_PC, R_AARCH64_GOT_PAGE_PC, R_GOT_OFF, 1311 R_TLSIE_HINT>(expr)) { 1312 ctx.hasTlsIe.store(true, std::memory_order_relaxed); 1313 // Initial-Exec relocs can be relaxed to Local-Exec if the symbol is locally 1314 // defined. 1315 if (toExecRelax && isLocalInExecutable) { 1316 c.addReloc({R_RELAX_TLS_IE_TO_LE, type, offset, addend, &sym}); 1317 } else if (expr != R_TLSIE_HINT) { 1318 sym.setFlags(NEEDS_TLSIE); 1319 // R_GOT needs a relative relocation for PIC on i386 and Hexagon. 1320 if (expr == R_GOT && config->isPic && !target->usesOnlyLowPageBits(type)) 1321 addRelativeReloc<true>(c, offset, sym, addend, expr, type); 1322 else 1323 c.addReloc({expr, type, offset, addend, &sym}); 1324 } 1325 return 1; 1326 } 1327 1328 return 0; 1329 } 1330 1331 template <class ELFT, class RelTy> void RelocationScanner::scanOne(RelTy *&i) { 1332 const RelTy &rel = *i; 1333 uint32_t symIndex = rel.getSymbol(config->isMips64EL); 1334 Symbol &sym = sec->getFile<ELFT>()->getSymbol(symIndex); 1335 RelType type; 1336 if (config->mipsN32Abi) { 1337 type = getMipsN32RelType(i); 1338 } else { 1339 type = rel.getType(config->isMips64EL); 1340 ++i; 1341 } 1342 // Get an offset in an output section this relocation is applied to. 1343 uint64_t offset = getter.get(rel.r_offset); 1344 if (offset == uint64_t(-1)) 1345 return; 1346 1347 RelExpr expr = target->getRelExpr(type, sym, sec->content().data() + offset); 1348 int64_t addend = RelTy::IsRela 1349 ? getAddend<ELFT>(rel) 1350 : target->getImplicitAddend( 1351 sec->content().data() + rel.r_offset, type); 1352 if (LLVM_UNLIKELY(config->emachine == EM_MIPS)) 1353 addend += computeMipsAddend<ELFT>(rel, expr, sym.isLocal()); 1354 else if (config->emachine == EM_PPC64 && config->isPic && type == R_PPC64_TOC) 1355 addend += getPPC64TocBase(); 1356 1357 // Ignore R_*_NONE and other marker relocations. 1358 if (expr == R_NONE) 1359 return; 1360 1361 // Error if the target symbol is undefined. Symbol index 0 may be used by 1362 // marker relocations, e.g. R_*_NONE and R_ARM_V4BX. Don't error on them. 1363 if (sym.isUndefined() && symIndex != 0 && 1364 maybeReportUndefined(cast<Undefined>(sym), *sec, offset)) 1365 return; 1366 1367 if (config->emachine == EM_PPC64) { 1368 // We can separate the small code model relocations into 2 categories: 1369 // 1) Those that access the compiler generated .toc sections. 1370 // 2) Those that access the linker allocated got entries. 1371 // lld allocates got entries to symbols on demand. Since we don't try to 1372 // sort the got entries in any way, we don't have to track which objects 1373 // have got-based small code model relocs. The .toc sections get placed 1374 // after the end of the linker allocated .got section and we do sort those 1375 // so sections addressed with small code model relocations come first. 1376 if (type == R_PPC64_TOC16 || type == R_PPC64_TOC16_DS) 1377 sec->file->ppc64SmallCodeModelTocRelocs = true; 1378 1379 // Record the TOC entry (.toc + addend) as not relaxable. See the comment in 1380 // InputSectionBase::relocateAlloc(). 1381 if (type == R_PPC64_TOC16_LO && sym.isSection() && isa<Defined>(sym) && 1382 cast<Defined>(sym).section->name == ".toc") 1383 ppc64noTocRelax.insert({&sym, addend}); 1384 1385 if ((type == R_PPC64_TLSGD && expr == R_TLSDESC_CALL) || 1386 (type == R_PPC64_TLSLD && expr == R_TLSLD_HINT)) { 1387 if (i == end) { 1388 errorOrWarn("R_PPC64_TLSGD/R_PPC64_TLSLD may not be the last " 1389 "relocation" + 1390 getLocation(*sec, sym, offset)); 1391 return; 1392 } 1393 1394 // Offset the 4-byte aligned R_PPC64_TLSGD by one byte in the NOTOC case, 1395 // so we can discern it later from the toc-case. 1396 if (i->getType(/*isMips64EL=*/false) == R_PPC64_REL24_NOTOC) 1397 ++offset; 1398 } 1399 } 1400 1401 // If the relocation does not emit a GOT or GOTPLT entry but its computation 1402 // uses their addresses, we need GOT or GOTPLT to be created. 1403 // 1404 // The 5 types that relative GOTPLT are all x86 and x86-64 specific. 1405 if (oneof<R_GOTPLTONLY_PC, R_GOTPLTREL, R_GOTPLT, R_PLT_GOTPLT, 1406 R_TLSDESC_GOTPLT, R_TLSGD_GOTPLT>(expr)) { 1407 in.gotPlt->hasGotPltOffRel.store(true, std::memory_order_relaxed); 1408 } else if (oneof<R_GOTONLY_PC, R_GOTREL, R_PPC32_PLTREL, R_PPC64_TOCBASE, 1409 R_PPC64_RELAX_TOC>(expr)) { 1410 in.got->hasGotOffRel.store(true, std::memory_order_relaxed); 1411 } 1412 1413 // Process TLS relocations, including relaxing TLS relocations. Note that 1414 // R_TPREL and R_TPREL_NEG relocations are resolved in processAux. 1415 if (sym.isTls()) { 1416 if (unsigned processed = 1417 handleTlsRelocation(type, sym, *sec, offset, addend, expr)) { 1418 i += processed - 1; 1419 return; 1420 } 1421 } 1422 1423 processAux(expr, type, offset, sym, addend); 1424 } 1425 1426 // R_PPC64_TLSGD/R_PPC64_TLSLD is required to mark `bl __tls_get_addr` for 1427 // General Dynamic/Local Dynamic code sequences. If a GD/LD GOT relocation is 1428 // found but no R_PPC64_TLSGD/R_PPC64_TLSLD is seen, we assume that the 1429 // instructions are generated by very old IBM XL compilers. Work around the 1430 // issue by disabling GD/LD to IE/LE relaxation. 1431 template <class RelTy> 1432 static void checkPPC64TLSRelax(InputSectionBase &sec, ArrayRef<RelTy> rels) { 1433 // Skip if sec is synthetic (sec.file is null) or if sec has been marked. 1434 if (!sec.file || sec.file->ppc64DisableTLSRelax) 1435 return; 1436 bool hasGDLD = false; 1437 for (const RelTy &rel : rels) { 1438 RelType type = rel.getType(false); 1439 switch (type) { 1440 case R_PPC64_TLSGD: 1441 case R_PPC64_TLSLD: 1442 return; // Found a marker 1443 case R_PPC64_GOT_TLSGD16: 1444 case R_PPC64_GOT_TLSGD16_HA: 1445 case R_PPC64_GOT_TLSGD16_HI: 1446 case R_PPC64_GOT_TLSGD16_LO: 1447 case R_PPC64_GOT_TLSLD16: 1448 case R_PPC64_GOT_TLSLD16_HA: 1449 case R_PPC64_GOT_TLSLD16_HI: 1450 case R_PPC64_GOT_TLSLD16_LO: 1451 hasGDLD = true; 1452 break; 1453 } 1454 } 1455 if (hasGDLD) { 1456 sec.file->ppc64DisableTLSRelax = true; 1457 warn(toString(sec.file) + 1458 ": disable TLS relaxation due to R_PPC64_GOT_TLS* relocations without " 1459 "R_PPC64_TLSGD/R_PPC64_TLSLD relocations"); 1460 } 1461 } 1462 1463 template <class ELFT, class RelTy> 1464 void RelocationScanner::scan(ArrayRef<RelTy> rels) { 1465 // Not all relocations end up in Sec->Relocations, but a lot do. 1466 sec->relocations.reserve(rels.size()); 1467 1468 if (config->emachine == EM_PPC64) 1469 checkPPC64TLSRelax<RelTy>(*sec, rels); 1470 1471 // For EhInputSection, OffsetGetter expects the relocations to be sorted by 1472 // r_offset. In rare cases (.eh_frame pieces are reordered by a linker 1473 // script), the relocations may be unordered. 1474 SmallVector<RelTy, 0> storage; 1475 if (isa<EhInputSection>(sec)) 1476 rels = sortRels(rels, storage); 1477 1478 end = static_cast<const void *>(rels.end()); 1479 for (auto i = rels.begin(); i != end;) 1480 scanOne<ELFT>(i); 1481 1482 // Sort relocations by offset for more efficient searching for 1483 // R_RISCV_PCREL_HI20 and R_PPC64_ADDR64. 1484 if (config->emachine == EM_RISCV || 1485 (config->emachine == EM_PPC64 && sec->name == ".toc")) 1486 llvm::stable_sort(sec->relocs(), 1487 [](const Relocation &lhs, const Relocation &rhs) { 1488 return lhs.offset < rhs.offset; 1489 }); 1490 } 1491 1492 template <class ELFT> void RelocationScanner::scanSection(InputSectionBase &s) { 1493 sec = &s; 1494 getter = OffsetGetter(s); 1495 const RelsOrRelas<ELFT> rels = s.template relsOrRelas<ELFT>(); 1496 if (rels.areRelocsRel()) 1497 scan<ELFT>(rels.rels); 1498 else 1499 scan<ELFT>(rels.relas); 1500 } 1501 1502 template <class ELFT> void elf::scanRelocations() { 1503 // Scan all relocations. Each relocation goes through a series of tests to 1504 // determine if it needs special treatment, such as creating GOT, PLT, 1505 // copy relocations, etc. Note that relocations for non-alloc sections are 1506 // directly processed by InputSection::relocateNonAlloc. 1507 1508 // Deterministic parallellism needs sorting relocations which is unsuitable 1509 // for -z nocombreloc. MIPS and PPC64 use global states which are not suitable 1510 // for parallelism. 1511 bool serial = !config->zCombreloc || config->emachine == EM_MIPS || 1512 config->emachine == EM_PPC64; 1513 parallel::TaskGroup tg; 1514 for (ELFFileBase *f : ctx.objectFiles) { 1515 auto fn = [f]() { 1516 RelocationScanner scanner; 1517 for (InputSectionBase *s : f->getSections()) { 1518 if (s && s->kind() == SectionBase::Regular && s->isLive() && 1519 (s->flags & SHF_ALLOC) && 1520 !(s->type == SHT_ARM_EXIDX && config->emachine == EM_ARM)) 1521 scanner.template scanSection<ELFT>(*s); 1522 } 1523 }; 1524 if (serial) 1525 fn(); 1526 else 1527 tg.execute(fn); 1528 } 1529 1530 // Both the main thread and thread pool index 0 use getThreadIndex()==0. Be 1531 // careful that they don't concurrently run scanSections. When serial is 1532 // true, fn() has finished at this point, so running execute is safe. 1533 tg.execute([] { 1534 RelocationScanner scanner; 1535 for (Partition &part : partitions) { 1536 for (EhInputSection *sec : part.ehFrame->sections) 1537 scanner.template scanSection<ELFT>(*sec); 1538 if (part.armExidx && part.armExidx->isLive()) 1539 for (InputSection *sec : part.armExidx->exidxSections) 1540 scanner.template scanSection<ELFT>(*sec); 1541 } 1542 }); 1543 } 1544 1545 static bool handleNonPreemptibleIfunc(Symbol &sym, uint16_t flags) { 1546 // Handle a reference to a non-preemptible ifunc. These are special in a 1547 // few ways: 1548 // 1549 // - Unlike most non-preemptible symbols, non-preemptible ifuncs do not have 1550 // a fixed value. But assuming that all references to the ifunc are 1551 // GOT-generating or PLT-generating, the handling of an ifunc is 1552 // relatively straightforward. We create a PLT entry in Iplt, which is 1553 // usually at the end of .plt, which makes an indirect call using a 1554 // matching GOT entry in igotPlt, which is usually at the end of .got.plt. 1555 // The GOT entry is relocated using an IRELATIVE relocation in relaIplt, 1556 // which is usually at the end of .rela.plt. Unlike most relocations in 1557 // .rela.plt, which may be evaluated lazily without -z now, dynamic 1558 // loaders evaluate IRELATIVE relocs eagerly, which means that for 1559 // IRELATIVE relocs only, GOT-generating relocations can point directly to 1560 // .got.plt without requiring a separate GOT entry. 1561 // 1562 // - Despite the fact that an ifunc does not have a fixed value, compilers 1563 // that are not passed -fPIC will assume that they do, and will emit 1564 // direct (non-GOT-generating, non-PLT-generating) relocations to the 1565 // symbol. This means that if a direct relocation to the symbol is 1566 // seen, the linker must set a value for the symbol, and this value must 1567 // be consistent no matter what type of reference is made to the symbol. 1568 // This can be done by creating a PLT entry for the symbol in the way 1569 // described above and making it canonical, that is, making all references 1570 // point to the PLT entry instead of the resolver. In lld we also store 1571 // the address of the PLT entry in the dynamic symbol table, which means 1572 // that the symbol will also have the same value in other modules. 1573 // Because the value loaded from the GOT needs to be consistent with 1574 // the value computed using a direct relocation, a non-preemptible ifunc 1575 // may end up with two GOT entries, one in .got.plt that points to the 1576 // address returned by the resolver and is used only by the PLT entry, 1577 // and another in .got that points to the PLT entry and is used by 1578 // GOT-generating relocations. 1579 // 1580 // - The fact that these symbols do not have a fixed value makes them an 1581 // exception to the general rule that a statically linked executable does 1582 // not require any form of dynamic relocation. To handle these relocations 1583 // correctly, the IRELATIVE relocations are stored in an array which a 1584 // statically linked executable's startup code must enumerate using the 1585 // linker-defined symbols __rela?_iplt_{start,end}. 1586 if (!sym.isGnuIFunc() || sym.isPreemptible || config->zIfuncNoplt) 1587 return false; 1588 // Skip unreferenced non-preemptible ifunc. 1589 if (!(flags & (NEEDS_GOT | NEEDS_PLT | HAS_DIRECT_RELOC))) 1590 return true; 1591 1592 sym.isInIplt = true; 1593 1594 // Create an Iplt and the associated IRELATIVE relocation pointing to the 1595 // original section/value pairs. For non-GOT non-PLT relocation case below, we 1596 // may alter section/value, so create a copy of the symbol to make 1597 // section/value fixed. 1598 auto *directSym = makeDefined(cast<Defined>(sym)); 1599 directSym->allocateAux(); 1600 addPltEntry(*in.iplt, *in.igotPlt, *in.relaIplt, target->iRelativeRel, 1601 *directSym); 1602 sym.allocateAux(); 1603 symAux.back().pltIdx = symAux[directSym->auxIdx].pltIdx; 1604 1605 if (flags & HAS_DIRECT_RELOC) { 1606 // Change the value to the IPLT and redirect all references to it. 1607 auto &d = cast<Defined>(sym); 1608 d.section = in.iplt.get(); 1609 d.value = d.getPltIdx() * target->ipltEntrySize; 1610 d.size = 0; 1611 // It's important to set the symbol type here so that dynamic loaders 1612 // don't try to call the PLT as if it were an ifunc resolver. 1613 d.type = STT_FUNC; 1614 1615 if (flags & NEEDS_GOT) 1616 addGotEntry(sym); 1617 } else if (flags & NEEDS_GOT) { 1618 // Redirect GOT accesses to point to the Igot. 1619 sym.gotInIgot = true; 1620 } 1621 return true; 1622 } 1623 1624 void elf::postScanRelocations() { 1625 auto fn = [](Symbol &sym) { 1626 auto flags = sym.flags.load(std::memory_order_relaxed); 1627 if (handleNonPreemptibleIfunc(sym, flags)) 1628 return; 1629 if (!sym.needsDynReloc()) 1630 return; 1631 sym.allocateAux(); 1632 1633 if (flags & NEEDS_GOT) 1634 addGotEntry(sym); 1635 if (flags & NEEDS_PLT) 1636 addPltEntry(*in.plt, *in.gotPlt, *in.relaPlt, target->pltRel, sym); 1637 if (flags & NEEDS_COPY) { 1638 if (sym.isObject()) { 1639 invokeELFT(addCopyRelSymbol, cast<SharedSymbol>(sym)); 1640 // NEEDS_COPY is cleared for sym and its aliases so that in 1641 // later iterations aliases won't cause redundant copies. 1642 assert(!sym.hasFlag(NEEDS_COPY)); 1643 } else { 1644 assert(sym.isFunc() && sym.hasFlag(NEEDS_PLT)); 1645 if (!sym.isDefined()) { 1646 replaceWithDefined(sym, *in.plt, 1647 target->pltHeaderSize + 1648 target->pltEntrySize * sym.getPltIdx(), 1649 0); 1650 sym.setFlags(NEEDS_COPY); 1651 if (config->emachine == EM_PPC) { 1652 // PPC32 canonical PLT entries are at the beginning of .glink 1653 cast<Defined>(sym).value = in.plt->headerSize; 1654 in.plt->headerSize += 16; 1655 cast<PPC32GlinkSection>(*in.plt).canonical_plts.push_back(&sym); 1656 } 1657 } 1658 } 1659 } 1660 1661 if (!sym.isTls()) 1662 return; 1663 bool isLocalInExecutable = !sym.isPreemptible && !config->shared; 1664 GotSection *got = in.got.get(); 1665 1666 if (flags & NEEDS_TLSDESC) { 1667 got->addTlsDescEntry(sym); 1668 mainPart->relaDyn->addAddendOnlyRelocIfNonPreemptible( 1669 target->tlsDescRel, *got, got->getTlsDescOffset(sym), sym, 1670 target->tlsDescRel); 1671 } 1672 if (flags & NEEDS_TLSGD) { 1673 got->addDynTlsEntry(sym); 1674 uint64_t off = got->getGlobalDynOffset(sym); 1675 if (isLocalInExecutable) 1676 // Write one to the GOT slot. 1677 got->addConstant({R_ADDEND, target->symbolicRel, off, 1, &sym}); 1678 else 1679 mainPart->relaDyn->addSymbolReloc(target->tlsModuleIndexRel, *got, off, 1680 sym); 1681 1682 // If the symbol is preemptible we need the dynamic linker to write 1683 // the offset too. 1684 uint64_t offsetOff = off + config->wordsize; 1685 if (sym.isPreemptible) 1686 mainPart->relaDyn->addSymbolReloc(target->tlsOffsetRel, *got, offsetOff, 1687 sym); 1688 else 1689 got->addConstant({R_ABS, target->tlsOffsetRel, offsetOff, 0, &sym}); 1690 } 1691 if (flags & NEEDS_TLSGD_TO_IE) { 1692 got->addEntry(sym); 1693 mainPart->relaDyn->addSymbolReloc(target->tlsGotRel, *got, 1694 sym.getGotOffset(), sym); 1695 } 1696 if (flags & NEEDS_GOT_DTPREL) { 1697 got->addEntry(sym); 1698 got->addConstant( 1699 {R_ABS, target->tlsOffsetRel, sym.getGotOffset(), 0, &sym}); 1700 } 1701 1702 if ((flags & NEEDS_TLSIE) && !(flags & NEEDS_TLSGD_TO_IE)) 1703 addTpOffsetGotEntry(sym); 1704 }; 1705 1706 GotSection *got = in.got.get(); 1707 if (ctx.needsTlsLd.load(std::memory_order_relaxed) && got->addTlsIndex()) { 1708 static Undefined dummy(nullptr, "", STB_LOCAL, 0, 0); 1709 if (config->shared) 1710 mainPart->relaDyn->addReloc( 1711 {target->tlsModuleIndexRel, got, got->getTlsIndexOff()}); 1712 else 1713 got->addConstant( 1714 {R_ADDEND, target->symbolicRel, got->getTlsIndexOff(), 1, &dummy}); 1715 } 1716 1717 assert(symAux.size() == 1); 1718 for (Symbol *sym : symtab.getSymbols()) 1719 fn(*sym); 1720 1721 // Local symbols may need the aforementioned non-preemptible ifunc and GOT 1722 // handling. They don't need regular PLT. 1723 for (ELFFileBase *file : ctx.objectFiles) 1724 for (Symbol *sym : file->getLocalSymbols()) 1725 fn(*sym); 1726 } 1727 1728 static bool mergeCmp(const InputSection *a, const InputSection *b) { 1729 // std::merge requires a strict weak ordering. 1730 if (a->outSecOff < b->outSecOff) 1731 return true; 1732 1733 // FIXME dyn_cast<ThunkSection> is non-null for any SyntheticSection. 1734 if (a->outSecOff == b->outSecOff && a != b) { 1735 auto *ta = dyn_cast<ThunkSection>(a); 1736 auto *tb = dyn_cast<ThunkSection>(b); 1737 1738 // Check if Thunk is immediately before any specific Target 1739 // InputSection for example Mips LA25 Thunks. 1740 if (ta && ta->getTargetInputSection() == b) 1741 return true; 1742 1743 // Place Thunk Sections without specific targets before 1744 // non-Thunk Sections. 1745 if (ta && !tb && !ta->getTargetInputSection()) 1746 return true; 1747 } 1748 1749 return false; 1750 } 1751 1752 // Call Fn on every executable InputSection accessed via the linker script 1753 // InputSectionDescription::Sections. 1754 static void forEachInputSectionDescription( 1755 ArrayRef<OutputSection *> outputSections, 1756 llvm::function_ref<void(OutputSection *, InputSectionDescription *)> fn) { 1757 for (OutputSection *os : outputSections) { 1758 if (!(os->flags & SHF_ALLOC) || !(os->flags & SHF_EXECINSTR)) 1759 continue; 1760 for (SectionCommand *bc : os->commands) 1761 if (auto *isd = dyn_cast<InputSectionDescription>(bc)) 1762 fn(os, isd); 1763 } 1764 } 1765 1766 // Thunk Implementation 1767 // 1768 // Thunks (sometimes called stubs, veneers or branch islands) are small pieces 1769 // of code that the linker inserts inbetween a caller and a callee. The thunks 1770 // are added at link time rather than compile time as the decision on whether 1771 // a thunk is needed, such as the caller and callee being out of range, can only 1772 // be made at link time. 1773 // 1774 // It is straightforward to tell given the current state of the program when a 1775 // thunk is needed for a particular call. The more difficult part is that 1776 // the thunk needs to be placed in the program such that the caller can reach 1777 // the thunk and the thunk can reach the callee; furthermore, adding thunks to 1778 // the program alters addresses, which can mean more thunks etc. 1779 // 1780 // In lld we have a synthetic ThunkSection that can hold many Thunks. 1781 // The decision to have a ThunkSection act as a container means that we can 1782 // more easily handle the most common case of a single block of contiguous 1783 // Thunks by inserting just a single ThunkSection. 1784 // 1785 // The implementation of Thunks in lld is split across these areas 1786 // Relocations.cpp : Framework for creating and placing thunks 1787 // Thunks.cpp : The code generated for each supported thunk 1788 // Target.cpp : Target specific hooks that the framework uses to decide when 1789 // a thunk is used 1790 // Synthetic.cpp : Implementation of ThunkSection 1791 // Writer.cpp : Iteratively call framework until no more Thunks added 1792 // 1793 // Thunk placement requirements: 1794 // Mips LA25 thunks. These must be placed immediately before the callee section 1795 // We can assume that the caller is in range of the Thunk. These are modelled 1796 // by Thunks that return the section they must precede with 1797 // getTargetInputSection(). 1798 // 1799 // ARM interworking and range extension thunks. These thunks must be placed 1800 // within range of the caller. All implemented ARM thunks can always reach the 1801 // callee as they use an indirect jump via a register that has no range 1802 // restrictions. 1803 // 1804 // Thunk placement algorithm: 1805 // For Mips LA25 ThunkSections; the placement is explicit, it has to be before 1806 // getTargetInputSection(). 1807 // 1808 // For thunks that must be placed within range of the caller there are many 1809 // possible choices given that the maximum range from the caller is usually 1810 // much larger than the average InputSection size. Desirable properties include: 1811 // - Maximize reuse of thunks by multiple callers 1812 // - Minimize number of ThunkSections to simplify insertion 1813 // - Handle impact of already added Thunks on addresses 1814 // - Simple to understand and implement 1815 // 1816 // In lld for the first pass, we pre-create one or more ThunkSections per 1817 // InputSectionDescription at Target specific intervals. A ThunkSection is 1818 // placed so that the estimated end of the ThunkSection is within range of the 1819 // start of the InputSectionDescription or the previous ThunkSection. For 1820 // example: 1821 // InputSectionDescription 1822 // Section 0 1823 // ... 1824 // Section N 1825 // ThunkSection 0 1826 // Section N + 1 1827 // ... 1828 // Section N + K 1829 // Thunk Section 1 1830 // 1831 // The intention is that we can add a Thunk to a ThunkSection that is well 1832 // spaced enough to service a number of callers without having to do a lot 1833 // of work. An important principle is that it is not an error if a Thunk cannot 1834 // be placed in a pre-created ThunkSection; when this happens we create a new 1835 // ThunkSection placed next to the caller. This allows us to handle the vast 1836 // majority of thunks simply, but also handle rare cases where the branch range 1837 // is smaller than the target specific spacing. 1838 // 1839 // The algorithm is expected to create all the thunks that are needed in a 1840 // single pass, with a small number of programs needing a second pass due to 1841 // the insertion of thunks in the first pass increasing the offset between 1842 // callers and callees that were only just in range. 1843 // 1844 // A consequence of allowing new ThunkSections to be created outside of the 1845 // pre-created ThunkSections is that in rare cases calls to Thunks that were in 1846 // range in pass K, are out of range in some pass > K due to the insertion of 1847 // more Thunks in between the caller and callee. When this happens we retarget 1848 // the relocation back to the original target and create another Thunk. 1849 1850 // Remove ThunkSections that are empty, this should only be the initial set 1851 // precreated on pass 0. 1852 1853 // Insert the Thunks for OutputSection OS into their designated place 1854 // in the Sections vector, and recalculate the InputSection output section 1855 // offsets. 1856 // This may invalidate any output section offsets stored outside of InputSection 1857 void ThunkCreator::mergeThunks(ArrayRef<OutputSection *> outputSections) { 1858 forEachInputSectionDescription( 1859 outputSections, [&](OutputSection *os, InputSectionDescription *isd) { 1860 if (isd->thunkSections.empty()) 1861 return; 1862 1863 // Remove any zero sized precreated Thunks. 1864 llvm::erase_if(isd->thunkSections, 1865 [](const std::pair<ThunkSection *, uint32_t> &ts) { 1866 return ts.first->getSize() == 0; 1867 }); 1868 1869 // ISD->ThunkSections contains all created ThunkSections, including 1870 // those inserted in previous passes. Extract the Thunks created this 1871 // pass and order them in ascending outSecOff. 1872 std::vector<ThunkSection *> newThunks; 1873 for (std::pair<ThunkSection *, uint32_t> ts : isd->thunkSections) 1874 if (ts.second == pass) 1875 newThunks.push_back(ts.first); 1876 llvm::stable_sort(newThunks, 1877 [](const ThunkSection *a, const ThunkSection *b) { 1878 return a->outSecOff < b->outSecOff; 1879 }); 1880 1881 // Merge sorted vectors of Thunks and InputSections by outSecOff 1882 SmallVector<InputSection *, 0> tmp; 1883 tmp.reserve(isd->sections.size() + newThunks.size()); 1884 1885 std::merge(isd->sections.begin(), isd->sections.end(), 1886 newThunks.begin(), newThunks.end(), std::back_inserter(tmp), 1887 mergeCmp); 1888 1889 isd->sections = std::move(tmp); 1890 }); 1891 } 1892 1893 static int64_t getPCBias(RelType type) { 1894 if (config->emachine != EM_ARM) 1895 return 0; 1896 switch (type) { 1897 case R_ARM_THM_JUMP19: 1898 case R_ARM_THM_JUMP24: 1899 case R_ARM_THM_CALL: 1900 return 4; 1901 default: 1902 return 8; 1903 } 1904 } 1905 1906 // Find or create a ThunkSection within the InputSectionDescription (ISD) that 1907 // is in range of Src. An ISD maps to a range of InputSections described by a 1908 // linker script section pattern such as { .text .text.* }. 1909 ThunkSection *ThunkCreator::getISDThunkSec(OutputSection *os, 1910 InputSection *isec, 1911 InputSectionDescription *isd, 1912 const Relocation &rel, 1913 uint64_t src) { 1914 // See the comment in getThunk for -pcBias below. 1915 const int64_t pcBias = getPCBias(rel.type); 1916 for (std::pair<ThunkSection *, uint32_t> tp : isd->thunkSections) { 1917 ThunkSection *ts = tp.first; 1918 uint64_t tsBase = os->addr + ts->outSecOff - pcBias; 1919 uint64_t tsLimit = tsBase + ts->getSize(); 1920 if (target->inBranchRange(rel.type, src, 1921 (src > tsLimit) ? tsBase : tsLimit)) 1922 return ts; 1923 } 1924 1925 // No suitable ThunkSection exists. This can happen when there is a branch 1926 // with lower range than the ThunkSection spacing or when there are too 1927 // many Thunks. Create a new ThunkSection as close to the InputSection as 1928 // possible. Error if InputSection is so large we cannot place ThunkSection 1929 // anywhere in Range. 1930 uint64_t thunkSecOff = isec->outSecOff; 1931 if (!target->inBranchRange(rel.type, src, 1932 os->addr + thunkSecOff + rel.addend)) { 1933 thunkSecOff = isec->outSecOff + isec->getSize(); 1934 if (!target->inBranchRange(rel.type, src, 1935 os->addr + thunkSecOff + rel.addend)) 1936 fatal("InputSection too large for range extension thunk " + 1937 isec->getObjMsg(src - (os->addr + isec->outSecOff))); 1938 } 1939 return addThunkSection(os, isd, thunkSecOff); 1940 } 1941 1942 // Add a Thunk that needs to be placed in a ThunkSection that immediately 1943 // precedes its Target. 1944 ThunkSection *ThunkCreator::getISThunkSec(InputSection *isec) { 1945 ThunkSection *ts = thunkedSections.lookup(isec); 1946 if (ts) 1947 return ts; 1948 1949 // Find InputSectionRange within Target Output Section (TOS) that the 1950 // InputSection (IS) that we need to precede is in. 1951 OutputSection *tos = isec->getParent(); 1952 for (SectionCommand *bc : tos->commands) { 1953 auto *isd = dyn_cast<InputSectionDescription>(bc); 1954 if (!isd || isd->sections.empty()) 1955 continue; 1956 1957 InputSection *first = isd->sections.front(); 1958 InputSection *last = isd->sections.back(); 1959 1960 if (isec->outSecOff < first->outSecOff || last->outSecOff < isec->outSecOff) 1961 continue; 1962 1963 ts = addThunkSection(tos, isd, isec->outSecOff); 1964 thunkedSections[isec] = ts; 1965 return ts; 1966 } 1967 1968 return nullptr; 1969 } 1970 1971 // Create one or more ThunkSections per OS that can be used to place Thunks. 1972 // We attempt to place the ThunkSections using the following desirable 1973 // properties: 1974 // - Within range of the maximum number of callers 1975 // - Minimise the number of ThunkSections 1976 // 1977 // We follow a simple but conservative heuristic to place ThunkSections at 1978 // offsets that are multiples of a Target specific branch range. 1979 // For an InputSectionDescription that is smaller than the range, a single 1980 // ThunkSection at the end of the range will do. 1981 // 1982 // For an InputSectionDescription that is more than twice the size of the range, 1983 // we place the last ThunkSection at range bytes from the end of the 1984 // InputSectionDescription in order to increase the likelihood that the 1985 // distance from a thunk to its target will be sufficiently small to 1986 // allow for the creation of a short thunk. 1987 void ThunkCreator::createInitialThunkSections( 1988 ArrayRef<OutputSection *> outputSections) { 1989 uint32_t thunkSectionSpacing = target->getThunkSectionSpacing(); 1990 1991 forEachInputSectionDescription( 1992 outputSections, [&](OutputSection *os, InputSectionDescription *isd) { 1993 if (isd->sections.empty()) 1994 return; 1995 1996 uint32_t isdBegin = isd->sections.front()->outSecOff; 1997 uint32_t isdEnd = 1998 isd->sections.back()->outSecOff + isd->sections.back()->getSize(); 1999 uint32_t lastThunkLowerBound = -1; 2000 if (isdEnd - isdBegin > thunkSectionSpacing * 2) 2001 lastThunkLowerBound = isdEnd - thunkSectionSpacing; 2002 2003 uint32_t isecLimit; 2004 uint32_t prevIsecLimit = isdBegin; 2005 uint32_t thunkUpperBound = isdBegin + thunkSectionSpacing; 2006 2007 for (const InputSection *isec : isd->sections) { 2008 isecLimit = isec->outSecOff + isec->getSize(); 2009 if (isecLimit > thunkUpperBound) { 2010 addThunkSection(os, isd, prevIsecLimit); 2011 thunkUpperBound = prevIsecLimit + thunkSectionSpacing; 2012 } 2013 if (isecLimit > lastThunkLowerBound) 2014 break; 2015 prevIsecLimit = isecLimit; 2016 } 2017 addThunkSection(os, isd, isecLimit); 2018 }); 2019 } 2020 2021 ThunkSection *ThunkCreator::addThunkSection(OutputSection *os, 2022 InputSectionDescription *isd, 2023 uint64_t off) { 2024 auto *ts = make<ThunkSection>(os, off); 2025 ts->partition = os->partition; 2026 if ((config->fixCortexA53Errata843419 || config->fixCortexA8) && 2027 !isd->sections.empty()) { 2028 // The errata fixes are sensitive to addresses modulo 4 KiB. When we add 2029 // thunks we disturb the base addresses of sections placed after the thunks 2030 // this makes patches we have generated redundant, and may cause us to 2031 // generate more patches as different instructions are now in sensitive 2032 // locations. When we generate more patches we may force more branches to 2033 // go out of range, causing more thunks to be generated. In pathological 2034 // cases this can cause the address dependent content pass not to converge. 2035 // We fix this by rounding up the size of the ThunkSection to 4KiB, this 2036 // limits the insertion of a ThunkSection on the addresses modulo 4 KiB, 2037 // which means that adding Thunks to the section does not invalidate 2038 // errata patches for following code. 2039 // Rounding up the size to 4KiB has consequences for code-size and can 2040 // trip up linker script defined assertions. For example the linux kernel 2041 // has an assertion that what LLD represents as an InputSectionDescription 2042 // does not exceed 4 KiB even if the overall OutputSection is > 128 Mib. 2043 // We use the heuristic of rounding up the size when both of the following 2044 // conditions are true: 2045 // 1.) The OutputSection is larger than the ThunkSectionSpacing. This 2046 // accounts for the case where no single InputSectionDescription is 2047 // larger than the OutputSection size. This is conservative but simple. 2048 // 2.) The InputSectionDescription is larger than 4 KiB. This will prevent 2049 // any assertion failures that an InputSectionDescription is < 4 KiB 2050 // in size. 2051 uint64_t isdSize = isd->sections.back()->outSecOff + 2052 isd->sections.back()->getSize() - 2053 isd->sections.front()->outSecOff; 2054 if (os->size > target->getThunkSectionSpacing() && isdSize > 4096) 2055 ts->roundUpSizeForErrata = true; 2056 } 2057 isd->thunkSections.push_back({ts, pass}); 2058 return ts; 2059 } 2060 2061 static bool isThunkSectionCompatible(InputSection *source, 2062 SectionBase *target) { 2063 // We can't reuse thunks in different loadable partitions because they might 2064 // not be loaded. But partition 1 (the main partition) will always be loaded. 2065 if (source->partition != target->partition) 2066 return target->partition == 1; 2067 return true; 2068 } 2069 2070 std::pair<Thunk *, bool> ThunkCreator::getThunk(InputSection *isec, 2071 Relocation &rel, uint64_t src) { 2072 std::vector<Thunk *> *thunkVec = nullptr; 2073 // Arm and Thumb have a PC Bias of 8 and 4 respectively, this is cancelled 2074 // out in the relocation addend. We compensate for the PC bias so that 2075 // an Arm and Thumb relocation to the same destination get the same keyAddend, 2076 // which is usually 0. 2077 const int64_t pcBias = getPCBias(rel.type); 2078 const int64_t keyAddend = rel.addend + pcBias; 2079 2080 // We use a ((section, offset), addend) pair to find the thunk position if 2081 // possible so that we create only one thunk for aliased symbols or ICFed 2082 // sections. There may be multiple relocations sharing the same (section, 2083 // offset + addend) pair. We may revert the relocation back to its original 2084 // non-Thunk target, so we cannot fold offset + addend. 2085 if (auto *d = dyn_cast<Defined>(rel.sym)) 2086 if (!d->isInPlt() && d->section) 2087 thunkVec = &thunkedSymbolsBySectionAndAddend[{{d->section, d->value}, 2088 keyAddend}]; 2089 if (!thunkVec) 2090 thunkVec = &thunkedSymbols[{rel.sym, keyAddend}]; 2091 2092 // Check existing Thunks for Sym to see if they can be reused 2093 for (Thunk *t : *thunkVec) 2094 if (isThunkSectionCompatible(isec, t->getThunkTargetSym()->section) && 2095 t->isCompatibleWith(*isec, rel) && 2096 target->inBranchRange(rel.type, src, 2097 t->getThunkTargetSym()->getVA(-pcBias))) 2098 return std::make_pair(t, false); 2099 2100 // No existing compatible Thunk in range, create a new one 2101 Thunk *t = addThunk(*isec, rel); 2102 thunkVec->push_back(t); 2103 return std::make_pair(t, true); 2104 } 2105 2106 // Return true if the relocation target is an in range Thunk. 2107 // Return false if the relocation is not to a Thunk. If the relocation target 2108 // was originally to a Thunk, but is no longer in range we revert the 2109 // relocation back to its original non-Thunk target. 2110 bool ThunkCreator::normalizeExistingThunk(Relocation &rel, uint64_t src) { 2111 if (Thunk *t = thunks.lookup(rel.sym)) { 2112 if (target->inBranchRange(rel.type, src, rel.sym->getVA(rel.addend))) 2113 return true; 2114 rel.sym = &t->destination; 2115 rel.addend = t->addend; 2116 if (rel.sym->isInPlt()) 2117 rel.expr = toPlt(rel.expr); 2118 } 2119 return false; 2120 } 2121 2122 // Process all relocations from the InputSections that have been assigned 2123 // to InputSectionDescriptions and redirect through Thunks if needed. The 2124 // function should be called iteratively until it returns false. 2125 // 2126 // PreConditions: 2127 // All InputSections that may need a Thunk are reachable from 2128 // OutputSectionCommands. 2129 // 2130 // All OutputSections have an address and all InputSections have an offset 2131 // within the OutputSection. 2132 // 2133 // The offsets between caller (relocation place) and callee 2134 // (relocation target) will not be modified outside of createThunks(). 2135 // 2136 // PostConditions: 2137 // If return value is true then ThunkSections have been inserted into 2138 // OutputSections. All relocations that needed a Thunk based on the information 2139 // available to createThunks() on entry have been redirected to a Thunk. Note 2140 // that adding Thunks changes offsets between caller and callee so more Thunks 2141 // may be required. 2142 // 2143 // If return value is false then no more Thunks are needed, and createThunks has 2144 // made no changes. If the target requires range extension thunks, currently 2145 // ARM, then any future change in offset between caller and callee risks a 2146 // relocation out of range error. 2147 bool ThunkCreator::createThunks(uint32_t pass, 2148 ArrayRef<OutputSection *> outputSections) { 2149 this->pass = pass; 2150 bool addressesChanged = false; 2151 2152 if (pass == 0 && target->getThunkSectionSpacing()) 2153 createInitialThunkSections(outputSections); 2154 2155 // Create all the Thunks and insert them into synthetic ThunkSections. The 2156 // ThunkSections are later inserted back into InputSectionDescriptions. 2157 // We separate the creation of ThunkSections from the insertion of the 2158 // ThunkSections as ThunkSections are not always inserted into the same 2159 // InputSectionDescription as the caller. 2160 forEachInputSectionDescription( 2161 outputSections, [&](OutputSection *os, InputSectionDescription *isd) { 2162 for (InputSection *isec : isd->sections) 2163 for (Relocation &rel : isec->relocs()) { 2164 uint64_t src = isec->getVA(rel.offset); 2165 2166 // If we are a relocation to an existing Thunk, check if it is 2167 // still in range. If not then Rel will be altered to point to its 2168 // original target so another Thunk can be generated. 2169 if (pass > 0 && normalizeExistingThunk(rel, src)) 2170 continue; 2171 2172 if (!target->needsThunk(rel.expr, rel.type, isec->file, src, 2173 *rel.sym, rel.addend)) 2174 continue; 2175 2176 Thunk *t; 2177 bool isNew; 2178 std::tie(t, isNew) = getThunk(isec, rel, src); 2179 2180 if (isNew) { 2181 // Find or create a ThunkSection for the new Thunk 2182 ThunkSection *ts; 2183 if (auto *tis = t->getTargetInputSection()) 2184 ts = getISThunkSec(tis); 2185 else 2186 ts = getISDThunkSec(os, isec, isd, rel, src); 2187 ts->addThunk(t); 2188 thunks[t->getThunkTargetSym()] = t; 2189 } 2190 2191 // Redirect relocation to Thunk, we never go via the PLT to a Thunk 2192 rel.sym = t->getThunkTargetSym(); 2193 rel.expr = fromPlt(rel.expr); 2194 2195 // On AArch64 and PPC, a jump/call relocation may be encoded as 2196 // STT_SECTION + non-zero addend, clear the addend after 2197 // redirection. 2198 if (config->emachine != EM_MIPS) 2199 rel.addend = -getPCBias(rel.type); 2200 } 2201 2202 for (auto &p : isd->thunkSections) 2203 addressesChanged |= p.first->assignOffsets(); 2204 }); 2205 2206 for (auto &p : thunkedSections) 2207 addressesChanged |= p.second->assignOffsets(); 2208 2209 // Merge all created synthetic ThunkSections back into OutputSection 2210 mergeThunks(outputSections); 2211 return addressesChanged; 2212 } 2213 2214 // The following aid in the conversion of call x@GDPLT to call __tls_get_addr 2215 // hexagonNeedsTLSSymbol scans for relocations would require a call to 2216 // __tls_get_addr. 2217 // hexagonTLSSymbolUpdate rebinds the relocation to __tls_get_addr. 2218 bool elf::hexagonNeedsTLSSymbol(ArrayRef<OutputSection *> outputSections) { 2219 bool needTlsSymbol = false; 2220 forEachInputSectionDescription( 2221 outputSections, [&](OutputSection *os, InputSectionDescription *isd) { 2222 for (InputSection *isec : isd->sections) 2223 for (Relocation &rel : isec->relocs()) 2224 if (rel.sym->type == llvm::ELF::STT_TLS && rel.expr == R_PLT_PC) { 2225 needTlsSymbol = true; 2226 return; 2227 } 2228 }); 2229 return needTlsSymbol; 2230 } 2231 2232 void elf::hexagonTLSSymbolUpdate(ArrayRef<OutputSection *> outputSections) { 2233 Symbol *sym = symtab.find("__tls_get_addr"); 2234 if (!sym) 2235 return; 2236 bool needEntry = true; 2237 forEachInputSectionDescription( 2238 outputSections, [&](OutputSection *os, InputSectionDescription *isd) { 2239 for (InputSection *isec : isd->sections) 2240 for (Relocation &rel : isec->relocs()) 2241 if (rel.sym->type == llvm::ELF::STT_TLS && rel.expr == R_PLT_PC) { 2242 if (needEntry) { 2243 sym->allocateAux(); 2244 addPltEntry(*in.plt, *in.gotPlt, *in.relaPlt, target->pltRel, 2245 *sym); 2246 needEntry = false; 2247 } 2248 rel.sym = sym; 2249 } 2250 }); 2251 } 2252 2253 template void elf::scanRelocations<ELF32LE>(); 2254 template void elf::scanRelocations<ELF32BE>(); 2255 template void elf::scanRelocations<ELF64LE>(); 2256 template void elf::scanRelocations<ELF64BE>(); 2257