1 //===-- ABISysV_x86_64.cpp ------------------------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "ABISysV_x86_64.h" 10 11 #include "llvm/ADT/STLExtras.h" 12 #include "llvm/ADT/StringSwitch.h" 13 #include "llvm/ADT/Triple.h" 14 15 #include "lldb/Core/Module.h" 16 #include "lldb/Core/PluginManager.h" 17 #include "lldb/Core/Value.h" 18 #include "lldb/Core/ValueObjectConstResult.h" 19 #include "lldb/Core/ValueObjectMemory.h" 20 #include "lldb/Core/ValueObjectRegister.h" 21 #include "lldb/Symbol/UnwindPlan.h" 22 #include "lldb/Target/Process.h" 23 #include "lldb/Target/RegisterContext.h" 24 #include "lldb/Target/StackFrame.h" 25 #include "lldb/Target/Target.h" 26 #include "lldb/Target/Thread.h" 27 #include "lldb/Utility/ConstString.h" 28 #include "lldb/Utility/DataExtractor.h" 29 #include "lldb/Utility/Log.h" 30 #include "lldb/Utility/RegisterValue.h" 31 #include "lldb/Utility/Status.h" 32 33 #include <vector> 34 35 using namespace lldb; 36 using namespace lldb_private; 37 38 LLDB_PLUGIN_DEFINE(ABISysV_x86_64) 39 40 enum dwarf_regnums { 41 dwarf_rax = 0, 42 dwarf_rdx, 43 dwarf_rcx, 44 dwarf_rbx, 45 dwarf_rsi, 46 dwarf_rdi, 47 dwarf_rbp, 48 dwarf_rsp, 49 dwarf_r8, 50 dwarf_r9, 51 dwarf_r10, 52 dwarf_r11, 53 dwarf_r12, 54 dwarf_r13, 55 dwarf_r14, 56 dwarf_r15, 57 dwarf_rip, 58 }; 59 60 bool ABISysV_x86_64::GetPointerReturnRegister(const char *&name) { 61 name = "rax"; 62 return true; 63 } 64 65 size_t ABISysV_x86_64::GetRedZoneSize() const { return 128; } 66 67 // Static Functions 68 69 ABISP 70 ABISysV_x86_64::CreateInstance(lldb::ProcessSP process_sp, const ArchSpec &arch) { 71 const llvm::Triple::ArchType arch_type = arch.GetTriple().getArch(); 72 const llvm::Triple::OSType os_type = arch.GetTriple().getOS(); 73 const llvm::Triple::EnvironmentType os_env = 74 arch.GetTriple().getEnvironment(); 75 if (arch_type == llvm::Triple::x86_64) { 76 switch(os_type) { 77 case llvm::Triple::OSType::IOS: 78 case llvm::Triple::OSType::TvOS: 79 case llvm::Triple::OSType::WatchOS: 80 switch (os_env) { 81 case llvm::Triple::EnvironmentType::MacABI: 82 case llvm::Triple::EnvironmentType::Simulator: 83 case llvm::Triple::EnvironmentType::UnknownEnvironment: 84 // UnknownEnvironment is needed for older compilers that don't 85 // support the simulator environment. 86 return ABISP(new ABISysV_x86_64(std::move(process_sp), 87 MakeMCRegisterInfo(arch))); 88 default: 89 return ABISP(); 90 } 91 case llvm::Triple::OSType::Darwin: 92 case llvm::Triple::OSType::FreeBSD: 93 case llvm::Triple::OSType::Linux: 94 case llvm::Triple::OSType::MacOSX: 95 case llvm::Triple::OSType::NetBSD: 96 case llvm::Triple::OSType::Solaris: 97 case llvm::Triple::OSType::UnknownOS: 98 return ABISP( 99 new ABISysV_x86_64(std::move(process_sp), MakeMCRegisterInfo(arch))); 100 default: 101 return ABISP(); 102 } 103 } 104 return ABISP(); 105 } 106 107 bool ABISysV_x86_64::PrepareTrivialCall(Thread &thread, addr_t sp, 108 addr_t func_addr, addr_t return_addr, 109 llvm::ArrayRef<addr_t> args) const { 110 Log *log(lldb_private::GetLogIfAllCategoriesSet(LIBLLDB_LOG_EXPRESSIONS)); 111 112 if (log) { 113 StreamString s; 114 s.Printf("ABISysV_x86_64::PrepareTrivialCall (tid = 0x%" PRIx64 115 ", sp = 0x%" PRIx64 ", func_addr = 0x%" PRIx64 116 ", return_addr = 0x%" PRIx64, 117 thread.GetID(), (uint64_t)sp, (uint64_t)func_addr, 118 (uint64_t)return_addr); 119 120 for (size_t i = 0; i < args.size(); ++i) 121 s.Printf(", arg%" PRIu64 " = 0x%" PRIx64, static_cast<uint64_t>(i + 1), 122 args[i]); 123 s.PutCString(")"); 124 log->PutString(s.GetString()); 125 } 126 127 RegisterContext *reg_ctx = thread.GetRegisterContext().get(); 128 if (!reg_ctx) 129 return false; 130 131 const RegisterInfo *reg_info = nullptr; 132 133 if (args.size() > 6) // TODO handle more than 6 arguments 134 return false; 135 136 for (size_t i = 0; i < args.size(); ++i) { 137 reg_info = reg_ctx->GetRegisterInfo(eRegisterKindGeneric, 138 LLDB_REGNUM_GENERIC_ARG1 + i); 139 LLDB_LOGF(log, "About to write arg%" PRIu64 " (0x%" PRIx64 ") into %s", 140 static_cast<uint64_t>(i + 1), args[i], reg_info->name); 141 if (!reg_ctx->WriteRegisterFromUnsigned(reg_info, args[i])) 142 return false; 143 } 144 145 // First, align the SP 146 147 LLDB_LOGF(log, "16-byte aligning SP: 0x%" PRIx64 " to 0x%" PRIx64, 148 (uint64_t)sp, (uint64_t)(sp & ~0xfull)); 149 150 sp &= ~(0xfull); // 16-byte alignment 151 152 sp -= 8; 153 154 Status error; 155 const RegisterInfo *pc_reg_info = 156 reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC); 157 const RegisterInfo *sp_reg_info = 158 reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP); 159 ProcessSP process_sp(thread.GetProcess()); 160 161 RegisterValue reg_value; 162 LLDB_LOGF(log, 163 "Pushing the return address onto the stack: 0x%" PRIx64 164 ": 0x%" PRIx64, 165 (uint64_t)sp, (uint64_t)return_addr); 166 167 // Save return address onto the stack 168 if (!process_sp->WritePointerToMemory(sp, return_addr, error)) 169 return false; 170 171 // %rsp is set to the actual stack value. 172 173 LLDB_LOGF(log, "Writing SP: 0x%" PRIx64, (uint64_t)sp); 174 175 if (!reg_ctx->WriteRegisterFromUnsigned(sp_reg_info, sp)) 176 return false; 177 178 // %rip is set to the address of the called function. 179 180 LLDB_LOGF(log, "Writing IP: 0x%" PRIx64, (uint64_t)func_addr); 181 182 if (!reg_ctx->WriteRegisterFromUnsigned(pc_reg_info, func_addr)) 183 return false; 184 185 return true; 186 } 187 188 static bool ReadIntegerArgument(Scalar &scalar, unsigned int bit_width, 189 bool is_signed, Thread &thread, 190 uint32_t *argument_register_ids, 191 unsigned int ¤t_argument_register, 192 addr_t ¤t_stack_argument) { 193 if (bit_width > 64) 194 return false; // Scalar can't hold large integer arguments 195 196 if (current_argument_register < 6) { 197 scalar = thread.GetRegisterContext()->ReadRegisterAsUnsigned( 198 argument_register_ids[current_argument_register], 0); 199 current_argument_register++; 200 if (is_signed) 201 scalar.SignExtend(bit_width); 202 } else { 203 uint32_t byte_size = (bit_width + (8 - 1)) / 8; 204 Status error; 205 if (thread.GetProcess()->ReadScalarIntegerFromMemory( 206 current_stack_argument, byte_size, is_signed, scalar, error)) { 207 current_stack_argument += byte_size; 208 return true; 209 } 210 return false; 211 } 212 return true; 213 } 214 215 bool ABISysV_x86_64::GetArgumentValues(Thread &thread, 216 ValueList &values) const { 217 unsigned int num_values = values.GetSize(); 218 unsigned int value_index; 219 220 // Extract the register context so we can read arguments from registers 221 222 RegisterContext *reg_ctx = thread.GetRegisterContext().get(); 223 224 if (!reg_ctx) 225 return false; 226 227 // Get the pointer to the first stack argument so we have a place to start 228 // when reading data 229 230 addr_t sp = reg_ctx->GetSP(0); 231 232 if (!sp) 233 return false; 234 235 addr_t current_stack_argument = sp + 8; // jump over return address 236 237 uint32_t argument_register_ids[6]; 238 239 argument_register_ids[0] = 240 reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG1) 241 ->kinds[eRegisterKindLLDB]; 242 argument_register_ids[1] = 243 reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG2) 244 ->kinds[eRegisterKindLLDB]; 245 argument_register_ids[2] = 246 reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG3) 247 ->kinds[eRegisterKindLLDB]; 248 argument_register_ids[3] = 249 reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG4) 250 ->kinds[eRegisterKindLLDB]; 251 argument_register_ids[4] = 252 reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG5) 253 ->kinds[eRegisterKindLLDB]; 254 argument_register_ids[5] = 255 reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG6) 256 ->kinds[eRegisterKindLLDB]; 257 258 unsigned int current_argument_register = 0; 259 260 for (value_index = 0; value_index < num_values; ++value_index) { 261 Value *value = values.GetValueAtIndex(value_index); 262 263 if (!value) 264 return false; 265 266 // We currently only support extracting values with Clang QualTypes. Do we 267 // care about others? 268 CompilerType compiler_type = value->GetCompilerType(); 269 llvm::Optional<uint64_t> bit_size = compiler_type.GetBitSize(&thread); 270 if (!bit_size) 271 return false; 272 bool is_signed; 273 274 if (compiler_type.IsIntegerOrEnumerationType(is_signed)) { 275 ReadIntegerArgument(value->GetScalar(), *bit_size, is_signed, thread, 276 argument_register_ids, current_argument_register, 277 current_stack_argument); 278 } else if (compiler_type.IsPointerType()) { 279 ReadIntegerArgument(value->GetScalar(), *bit_size, false, thread, 280 argument_register_ids, current_argument_register, 281 current_stack_argument); 282 } 283 } 284 285 return true; 286 } 287 288 Status ABISysV_x86_64::SetReturnValueObject(lldb::StackFrameSP &frame_sp, 289 lldb::ValueObjectSP &new_value_sp) { 290 Status error; 291 if (!new_value_sp) { 292 error.SetErrorString("Empty value object for return value."); 293 return error; 294 } 295 296 CompilerType compiler_type = new_value_sp->GetCompilerType(); 297 if (!compiler_type) { 298 error.SetErrorString("Null clang type for return value."); 299 return error; 300 } 301 302 Thread *thread = frame_sp->GetThread().get(); 303 304 bool is_signed; 305 uint32_t count; 306 bool is_complex; 307 308 RegisterContext *reg_ctx = thread->GetRegisterContext().get(); 309 310 bool set_it_simple = false; 311 if (compiler_type.IsIntegerOrEnumerationType(is_signed) || 312 compiler_type.IsPointerType()) { 313 const RegisterInfo *reg_info = reg_ctx->GetRegisterInfoByName("rax", 0); 314 315 DataExtractor data; 316 Status data_error; 317 size_t num_bytes = new_value_sp->GetData(data, data_error); 318 if (data_error.Fail()) { 319 error.SetErrorStringWithFormat( 320 "Couldn't convert return value to raw data: %s", 321 data_error.AsCString()); 322 return error; 323 } 324 lldb::offset_t offset = 0; 325 if (num_bytes <= 8) { 326 uint64_t raw_value = data.GetMaxU64(&offset, num_bytes); 327 328 if (reg_ctx->WriteRegisterFromUnsigned(reg_info, raw_value)) 329 set_it_simple = true; 330 } else { 331 error.SetErrorString("We don't support returning longer than 64 bit " 332 "integer values at present."); 333 } 334 } else if (compiler_type.IsFloatingPointType(count, is_complex)) { 335 if (is_complex) 336 error.SetErrorString( 337 "We don't support returning complex values at present"); 338 else { 339 llvm::Optional<uint64_t> bit_width = 340 compiler_type.GetBitSize(frame_sp.get()); 341 if (!bit_width) { 342 error.SetErrorString("can't get type size"); 343 return error; 344 } 345 if (*bit_width <= 64) { 346 const RegisterInfo *xmm0_info = 347 reg_ctx->GetRegisterInfoByName("xmm0", 0); 348 RegisterValue xmm0_value; 349 DataExtractor data; 350 Status data_error; 351 size_t num_bytes = new_value_sp->GetData(data, data_error); 352 if (data_error.Fail()) { 353 error.SetErrorStringWithFormat( 354 "Couldn't convert return value to raw data: %s", 355 data_error.AsCString()); 356 return error; 357 } 358 359 unsigned char buffer[16]; 360 ByteOrder byte_order = data.GetByteOrder(); 361 362 data.CopyByteOrderedData(0, num_bytes, buffer, 16, byte_order); 363 xmm0_value.SetBytes(buffer, 16, byte_order); 364 reg_ctx->WriteRegister(xmm0_info, xmm0_value); 365 set_it_simple = true; 366 } else { 367 // FIXME - don't know how to do 80 bit long doubles yet. 368 error.SetErrorString( 369 "We don't support returning float values > 64 bits at present"); 370 } 371 } 372 } 373 374 if (!set_it_simple) { 375 // Okay we've got a structure or something that doesn't fit in a simple 376 // register. We should figure out where it really goes, but we don't 377 // support this yet. 378 error.SetErrorString("We only support setting simple integer and float " 379 "return types at present."); 380 } 381 382 return error; 383 } 384 385 ValueObjectSP ABISysV_x86_64::GetReturnValueObjectSimple( 386 Thread &thread, CompilerType &return_compiler_type) const { 387 ValueObjectSP return_valobj_sp; 388 Value value; 389 390 if (!return_compiler_type) 391 return return_valobj_sp; 392 393 // value.SetContext (Value::eContextTypeClangType, return_value_type); 394 value.SetCompilerType(return_compiler_type); 395 396 RegisterContext *reg_ctx = thread.GetRegisterContext().get(); 397 if (!reg_ctx) 398 return return_valobj_sp; 399 400 const uint32_t type_flags = return_compiler_type.GetTypeInfo(); 401 if (type_flags & eTypeIsScalar) { 402 value.SetValueType(Value::ValueType::Scalar); 403 404 bool success = false; 405 if (type_flags & eTypeIsInteger) { 406 // Extract the register context so we can read arguments from registers 407 408 llvm::Optional<uint64_t> byte_size = 409 return_compiler_type.GetByteSize(&thread); 410 if (!byte_size) 411 return return_valobj_sp; 412 uint64_t raw_value = thread.GetRegisterContext()->ReadRegisterAsUnsigned( 413 reg_ctx->GetRegisterInfoByName("rax", 0), 0); 414 const bool is_signed = (type_flags & eTypeIsSigned) != 0; 415 switch (*byte_size) { 416 default: 417 break; 418 419 case sizeof(uint64_t): 420 if (is_signed) 421 value.GetScalar() = (int64_t)(raw_value); 422 else 423 value.GetScalar() = (uint64_t)(raw_value); 424 success = true; 425 break; 426 427 case sizeof(uint32_t): 428 if (is_signed) 429 value.GetScalar() = (int32_t)(raw_value & UINT32_MAX); 430 else 431 value.GetScalar() = (uint32_t)(raw_value & UINT32_MAX); 432 success = true; 433 break; 434 435 case sizeof(uint16_t): 436 if (is_signed) 437 value.GetScalar() = (int16_t)(raw_value & UINT16_MAX); 438 else 439 value.GetScalar() = (uint16_t)(raw_value & UINT16_MAX); 440 success = true; 441 break; 442 443 case sizeof(uint8_t): 444 if (is_signed) 445 value.GetScalar() = (int8_t)(raw_value & UINT8_MAX); 446 else 447 value.GetScalar() = (uint8_t)(raw_value & UINT8_MAX); 448 success = true; 449 break; 450 } 451 } else if (type_flags & eTypeIsFloat) { 452 if (type_flags & eTypeIsComplex) { 453 // Don't handle complex yet. 454 } else { 455 llvm::Optional<uint64_t> byte_size = 456 return_compiler_type.GetByteSize(&thread); 457 if (byte_size && *byte_size <= sizeof(long double)) { 458 const RegisterInfo *xmm0_info = 459 reg_ctx->GetRegisterInfoByName("xmm0", 0); 460 RegisterValue xmm0_value; 461 if (reg_ctx->ReadRegister(xmm0_info, xmm0_value)) { 462 DataExtractor data; 463 if (xmm0_value.GetData(data)) { 464 lldb::offset_t offset = 0; 465 if (*byte_size == sizeof(float)) { 466 value.GetScalar() = (float)data.GetFloat(&offset); 467 success = true; 468 } else if (*byte_size == sizeof(double)) { 469 value.GetScalar() = (double)data.GetDouble(&offset); 470 success = true; 471 } else if (*byte_size == sizeof(long double)) { 472 // Don't handle long double since that can be encoded as 80 bit 473 // floats... 474 } 475 } 476 } 477 } 478 } 479 } 480 481 if (success) 482 return_valobj_sp = ValueObjectConstResult::Create( 483 thread.GetStackFrameAtIndex(0).get(), value, ConstString("")); 484 } else if (type_flags & eTypeIsPointer) { 485 unsigned rax_id = 486 reg_ctx->GetRegisterInfoByName("rax", 0)->kinds[eRegisterKindLLDB]; 487 value.GetScalar() = 488 (uint64_t)thread.GetRegisterContext()->ReadRegisterAsUnsigned(rax_id, 489 0); 490 value.SetValueType(Value::ValueType::Scalar); 491 return_valobj_sp = ValueObjectConstResult::Create( 492 thread.GetStackFrameAtIndex(0).get(), value, ConstString("")); 493 } else if (type_flags & eTypeIsVector) { 494 llvm::Optional<uint64_t> byte_size = 495 return_compiler_type.GetByteSize(&thread); 496 if (byte_size && *byte_size > 0) { 497 const RegisterInfo *altivec_reg = 498 reg_ctx->GetRegisterInfoByName("xmm0", 0); 499 if (altivec_reg == nullptr) 500 altivec_reg = reg_ctx->GetRegisterInfoByName("mm0", 0); 501 502 if (altivec_reg) { 503 if (*byte_size <= altivec_reg->byte_size) { 504 ProcessSP process_sp(thread.GetProcess()); 505 if (process_sp) { 506 std::unique_ptr<DataBufferHeap> heap_data_up( 507 new DataBufferHeap(*byte_size, 0)); 508 const ByteOrder byte_order = process_sp->GetByteOrder(); 509 RegisterValue reg_value; 510 if (reg_ctx->ReadRegister(altivec_reg, reg_value)) { 511 Status error; 512 if (reg_value.GetAsMemoryData( 513 altivec_reg, heap_data_up->GetBytes(), 514 heap_data_up->GetByteSize(), byte_order, error)) { 515 DataExtractor data(DataBufferSP(heap_data_up.release()), 516 byte_order, 517 process_sp->GetTarget() 518 .GetArchitecture() 519 .GetAddressByteSize()); 520 return_valobj_sp = ValueObjectConstResult::Create( 521 &thread, return_compiler_type, ConstString(""), data); 522 } 523 } 524 } 525 } else if (*byte_size <= altivec_reg->byte_size * 2) { 526 const RegisterInfo *altivec_reg2 = 527 reg_ctx->GetRegisterInfoByName("xmm1", 0); 528 if (altivec_reg2) { 529 ProcessSP process_sp(thread.GetProcess()); 530 if (process_sp) { 531 std::unique_ptr<DataBufferHeap> heap_data_up( 532 new DataBufferHeap(*byte_size, 0)); 533 const ByteOrder byte_order = process_sp->GetByteOrder(); 534 RegisterValue reg_value; 535 RegisterValue reg_value2; 536 if (reg_ctx->ReadRegister(altivec_reg, reg_value) && 537 reg_ctx->ReadRegister(altivec_reg2, reg_value2)) { 538 539 Status error; 540 if (reg_value.GetAsMemoryData( 541 altivec_reg, heap_data_up->GetBytes(), 542 altivec_reg->byte_size, byte_order, error) && 543 reg_value2.GetAsMemoryData( 544 altivec_reg2, 545 heap_data_up->GetBytes() + altivec_reg->byte_size, 546 heap_data_up->GetByteSize() - altivec_reg->byte_size, 547 byte_order, error)) { 548 DataExtractor data(DataBufferSP(heap_data_up.release()), 549 byte_order, 550 process_sp->GetTarget() 551 .GetArchitecture() 552 .GetAddressByteSize()); 553 return_valobj_sp = ValueObjectConstResult::Create( 554 &thread, return_compiler_type, ConstString(""), data); 555 } 556 } 557 } 558 } 559 } 560 } 561 } 562 } 563 564 return return_valobj_sp; 565 } 566 567 // The compiler will flatten the nested aggregate type into single 568 // layer and push the value to stack 569 // This helper function will flatten an aggregate type 570 // and return true if it can be returned in register(s) by value 571 // return false if the aggregate is in memory 572 static bool FlattenAggregateType( 573 Thread &thread, ExecutionContext &exe_ctx, 574 CompilerType &return_compiler_type, 575 uint32_t data_byte_offset, 576 std::vector<uint32_t> &aggregate_field_offsets, 577 std::vector<CompilerType> &aggregate_compiler_types) { 578 579 const uint32_t num_children = return_compiler_type.GetNumFields(); 580 for (uint32_t idx = 0; idx < num_children; ++idx) { 581 std::string name; 582 bool is_signed; 583 uint32_t count; 584 bool is_complex; 585 586 uint64_t field_bit_offset = 0; 587 CompilerType field_compiler_type = return_compiler_type.GetFieldAtIndex( 588 idx, name, &field_bit_offset, nullptr, nullptr); 589 llvm::Optional<uint64_t> field_bit_width = 590 field_compiler_type.GetBitSize(&thread); 591 592 // if we don't know the size of the field (e.g. invalid type), exit 593 if (!field_bit_width || *field_bit_width == 0) { 594 return false; 595 } 596 597 uint32_t field_byte_offset = field_bit_offset / 8 + data_byte_offset; 598 599 const uint32_t field_type_flags = field_compiler_type.GetTypeInfo(); 600 if (field_compiler_type.IsIntegerOrEnumerationType(is_signed) || 601 field_compiler_type.IsPointerType() || 602 field_compiler_type.IsFloatingPointType(count, is_complex)) { 603 aggregate_field_offsets.push_back(field_byte_offset); 604 aggregate_compiler_types.push_back(field_compiler_type); 605 } else if (field_type_flags & eTypeHasChildren) { 606 if (!FlattenAggregateType(thread, exe_ctx, field_compiler_type, 607 field_byte_offset, aggregate_field_offsets, 608 aggregate_compiler_types)) { 609 return false; 610 } 611 } 612 } 613 return true; 614 } 615 616 ValueObjectSP ABISysV_x86_64::GetReturnValueObjectImpl( 617 Thread &thread, CompilerType &return_compiler_type) const { 618 ValueObjectSP return_valobj_sp; 619 620 if (!return_compiler_type) 621 return return_valobj_sp; 622 623 ExecutionContext exe_ctx(thread.shared_from_this()); 624 return_valobj_sp = GetReturnValueObjectSimple(thread, return_compiler_type); 625 if (return_valobj_sp) 626 return return_valobj_sp; 627 628 RegisterContextSP reg_ctx_sp = thread.GetRegisterContext(); 629 if (!reg_ctx_sp) 630 return return_valobj_sp; 631 632 llvm::Optional<uint64_t> bit_width = return_compiler_type.GetBitSize(&thread); 633 if (!bit_width) 634 return return_valobj_sp; 635 if (return_compiler_type.IsAggregateType()) { 636 Target *target = exe_ctx.GetTargetPtr(); 637 bool is_memory = true; 638 std::vector<uint32_t> aggregate_field_offsets; 639 std::vector<CompilerType> aggregate_compiler_types; 640 if (return_compiler_type.GetTypeSystem()->CanPassInRegisters( 641 return_compiler_type) && 642 *bit_width <= 128 && 643 FlattenAggregateType(thread, exe_ctx, return_compiler_type, 644 0, aggregate_field_offsets, 645 aggregate_compiler_types)) { 646 ByteOrder byte_order = target->GetArchitecture().GetByteOrder(); 647 DataBufferSP data_sp(new DataBufferHeap(16, 0)); 648 DataExtractor return_ext(data_sp, byte_order, 649 target->GetArchitecture().GetAddressByteSize()); 650 651 const RegisterInfo *rax_info = 652 reg_ctx_sp->GetRegisterInfoByName("rax", 0); 653 const RegisterInfo *rdx_info = 654 reg_ctx_sp->GetRegisterInfoByName("rdx", 0); 655 const RegisterInfo *xmm0_info = 656 reg_ctx_sp->GetRegisterInfoByName("xmm0", 0); 657 const RegisterInfo *xmm1_info = 658 reg_ctx_sp->GetRegisterInfoByName("xmm1", 0); 659 660 RegisterValue rax_value, rdx_value, xmm0_value, xmm1_value; 661 reg_ctx_sp->ReadRegister(rax_info, rax_value); 662 reg_ctx_sp->ReadRegister(rdx_info, rdx_value); 663 reg_ctx_sp->ReadRegister(xmm0_info, xmm0_value); 664 reg_ctx_sp->ReadRegister(xmm1_info, xmm1_value); 665 666 DataExtractor rax_data, rdx_data, xmm0_data, xmm1_data; 667 668 rax_value.GetData(rax_data); 669 rdx_value.GetData(rdx_data); 670 xmm0_value.GetData(xmm0_data); 671 xmm1_value.GetData(xmm1_data); 672 673 uint32_t fp_bytes = 674 0; // Tracks how much of the xmm registers we've consumed so far 675 uint32_t integer_bytes = 676 0; // Tracks how much of the rax/rds registers we've consumed so far 677 678 // in case of the returned type is a subclass of non-abstract-base class 679 // it will have a padding to skip the base content 680 if (aggregate_field_offsets.size()) { 681 fp_bytes = aggregate_field_offsets[0]; 682 integer_bytes = aggregate_field_offsets[0]; 683 } 684 685 const uint32_t num_children = aggregate_compiler_types.size(); 686 687 // Since we are in the small struct regime, assume we are not in memory. 688 is_memory = false; 689 for (uint32_t idx = 0; idx < num_children; idx++) { 690 bool is_signed; 691 uint32_t count; 692 bool is_complex; 693 694 CompilerType field_compiler_type = aggregate_compiler_types[idx]; 695 uint32_t field_byte_width = (uint32_t) (*field_compiler_type.GetByteSize(&thread)); 696 uint32_t field_byte_offset = aggregate_field_offsets[idx]; 697 698 uint32_t field_bit_width = field_byte_width * 8; 699 700 DataExtractor *copy_from_extractor = nullptr; 701 uint32_t copy_from_offset = 0; 702 703 if (field_compiler_type.IsIntegerOrEnumerationType(is_signed) || 704 field_compiler_type.IsPointerType()) { 705 if (integer_bytes < 8) { 706 if (integer_bytes + field_byte_width <= 8) { 707 // This is in RAX, copy from register to our result structure: 708 copy_from_extractor = &rax_data; 709 copy_from_offset = integer_bytes; 710 integer_bytes += field_byte_width; 711 } else { 712 // The next field wouldn't fit in the remaining space, so we 713 // pushed it to rdx. 714 copy_from_extractor = &rdx_data; 715 copy_from_offset = 0; 716 integer_bytes = 8 + field_byte_width; 717 } 718 } else if (integer_bytes + field_byte_width <= 16) { 719 copy_from_extractor = &rdx_data; 720 copy_from_offset = integer_bytes - 8; 721 integer_bytes += field_byte_width; 722 } else { 723 // The last field didn't fit. I can't see how that would happen 724 // w/o the overall size being greater than 16 bytes. For now, 725 // return a nullptr return value object. 726 return return_valobj_sp; 727 } 728 } else if (field_compiler_type.IsFloatingPointType(count, is_complex)) { 729 // Structs with long doubles are always passed in memory. 730 if (field_bit_width == 128) { 731 is_memory = true; 732 break; 733 } else if (field_bit_width == 64) { 734 // These have to be in a single xmm register. 735 if (fp_bytes == 0) 736 copy_from_extractor = &xmm0_data; 737 else 738 copy_from_extractor = &xmm1_data; 739 740 copy_from_offset = 0; 741 fp_bytes += field_byte_width; 742 } else if (field_bit_width == 32) { 743 // This one is kind of complicated. If we are in an "eightbyte" 744 // with another float, we'll be stuffed into an xmm register with 745 // it. If we are in an "eightbyte" with one or more ints, then we 746 // will be stuffed into the appropriate GPR with them. 747 bool in_gpr; 748 if (field_byte_offset % 8 == 0) { 749 // We are at the beginning of one of the eightbytes, so check the 750 // next element (if any) 751 if (idx == num_children - 1) { 752 in_gpr = false; 753 } else { 754 CompilerType next_field_compiler_type = 755 aggregate_compiler_types[idx + 1]; 756 if (next_field_compiler_type.IsIntegerOrEnumerationType( 757 is_signed)) { 758 in_gpr = true; 759 } else { 760 copy_from_offset = 0; 761 in_gpr = false; 762 } 763 } 764 } else if (field_byte_offset % 4 == 0) { 765 // We are inside of an eightbyte, so see if the field before us 766 // is floating point: This could happen if somebody put padding 767 // in the structure. 768 if (idx == 0) { 769 in_gpr = false; 770 } else { 771 CompilerType prev_field_compiler_type = 772 aggregate_compiler_types[idx - 1]; 773 if (prev_field_compiler_type.IsIntegerOrEnumerationType( 774 is_signed)) { 775 in_gpr = true; 776 } else { 777 copy_from_offset = 4; 778 in_gpr = false; 779 } 780 } 781 } else { 782 is_memory = true; 783 continue; 784 } 785 786 // Okay, we've figured out whether we are in GPR or XMM, now figure 787 // out which one. 788 if (in_gpr) { 789 if (integer_bytes < 8) { 790 // This is in RAX, copy from register to our result structure: 791 copy_from_extractor = &rax_data; 792 copy_from_offset = integer_bytes; 793 integer_bytes += field_byte_width; 794 } else { 795 copy_from_extractor = &rdx_data; 796 copy_from_offset = integer_bytes - 8; 797 integer_bytes += field_byte_width; 798 } 799 } else { 800 if (fp_bytes < 8) 801 copy_from_extractor = &xmm0_data; 802 else 803 copy_from_extractor = &xmm1_data; 804 805 fp_bytes += field_byte_width; 806 } 807 } 808 } 809 // These two tests are just sanity checks. If I somehow get the type 810 // calculation wrong above it is better to just return nothing than to 811 // assert or crash. 812 if (!copy_from_extractor) 813 return return_valobj_sp; 814 if (copy_from_offset + field_byte_width > 815 copy_from_extractor->GetByteSize()) 816 return return_valobj_sp; 817 copy_from_extractor->CopyByteOrderedData( 818 copy_from_offset, field_byte_width, 819 data_sp->GetBytes() + field_byte_offset, field_byte_width, 820 byte_order); 821 } 822 if (!is_memory) { 823 // The result is in our data buffer. Let's make a variable object out 824 // of it: 825 return_valobj_sp = ValueObjectConstResult::Create( 826 &thread, return_compiler_type, ConstString(""), return_ext); 827 } 828 } 829 830 // FIXME: This is just taking a guess, rax may very well no longer hold the 831 // return storage location. 832 // If we are going to do this right, when we make a new frame we should 833 // check to see if it uses a memory return, and if we are at the first 834 // instruction and if so stash away the return location. Then we would 835 // only return the memory return value if we know it is valid. 836 837 if (is_memory) { 838 unsigned rax_id = 839 reg_ctx_sp->GetRegisterInfoByName("rax", 0)->kinds[eRegisterKindLLDB]; 840 lldb::addr_t storage_addr = 841 (uint64_t)thread.GetRegisterContext()->ReadRegisterAsUnsigned(rax_id, 842 0); 843 return_valobj_sp = ValueObjectMemory::Create( 844 &thread, "", Address(storage_addr, nullptr), return_compiler_type); 845 } 846 } 847 848 return return_valobj_sp; 849 } 850 851 // This defines the CFA as rsp+8 852 // the saved pc is at CFA-8 (i.e. rsp+0) 853 // The saved rsp is CFA+0 854 855 bool ABISysV_x86_64::CreateFunctionEntryUnwindPlan(UnwindPlan &unwind_plan) { 856 unwind_plan.Clear(); 857 unwind_plan.SetRegisterKind(eRegisterKindDWARF); 858 859 uint32_t sp_reg_num = dwarf_rsp; 860 uint32_t pc_reg_num = dwarf_rip; 861 862 UnwindPlan::RowSP row(new UnwindPlan::Row); 863 row->GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 8); 864 row->SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, -8, false); 865 row->SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true); 866 unwind_plan.AppendRow(row); 867 unwind_plan.SetSourceName("x86_64 at-func-entry default"); 868 unwind_plan.SetSourcedFromCompiler(eLazyBoolNo); 869 return true; 870 } 871 872 // This defines the CFA as rbp+16 873 // The saved pc is at CFA-8 (i.e. rbp+8) 874 // The saved rbp is at CFA-16 (i.e. rbp+0) 875 // The saved rsp is CFA+0 876 877 bool ABISysV_x86_64::CreateDefaultUnwindPlan(UnwindPlan &unwind_plan) { 878 unwind_plan.Clear(); 879 unwind_plan.SetRegisterKind(eRegisterKindDWARF); 880 881 uint32_t fp_reg_num = dwarf_rbp; 882 uint32_t sp_reg_num = dwarf_rsp; 883 uint32_t pc_reg_num = dwarf_rip; 884 885 UnwindPlan::RowSP row(new UnwindPlan::Row); 886 887 const int32_t ptr_size = 8; 888 row->GetCFAValue().SetIsRegisterPlusOffset(dwarf_rbp, 2 * ptr_size); 889 row->SetOffset(0); 890 row->SetUnspecifiedRegistersAreUndefined(true); 891 892 row->SetRegisterLocationToAtCFAPlusOffset(fp_reg_num, ptr_size * -2, true); 893 row->SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, ptr_size * -1, true); 894 row->SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true); 895 896 unwind_plan.AppendRow(row); 897 unwind_plan.SetSourceName("x86_64 default unwind plan"); 898 unwind_plan.SetSourcedFromCompiler(eLazyBoolNo); 899 unwind_plan.SetUnwindPlanValidAtAllInstructions(eLazyBoolNo); 900 unwind_plan.SetUnwindPlanForSignalTrap(eLazyBoolNo); 901 return true; 902 } 903 904 bool ABISysV_x86_64::RegisterIsVolatile(const RegisterInfo *reg_info) { 905 return !RegisterIsCalleeSaved(reg_info); 906 } 907 908 // See "Register Usage" in the 909 // "System V Application Binary Interface" 910 // "AMD64 Architecture Processor Supplement" (or "x86-64(tm) Architecture 911 // Processor Supplement" in earlier revisions) (this doc is also commonly 912 // referred to as the x86-64/AMD64 psABI) Edited by Michael Matz, Jan Hubicka, 913 // Andreas Jaeger, and Mark Mitchell current version is 0.99.6 released 914 // 2012-07-02 at http://refspecs.linuxfoundation.org/elf/x86-64-abi-0.99.pdf 915 // It's being revised & updated at https://github.com/hjl-tools/x86-psABI/ 916 917 bool ABISysV_x86_64::RegisterIsCalleeSaved(const RegisterInfo *reg_info) { 918 if (!reg_info) 919 return false; 920 assert(reg_info->name != nullptr && "unnamed register?"); 921 std::string Name = std::string(reg_info->name); 922 bool IsCalleeSaved = 923 llvm::StringSwitch<bool>(Name) 924 .Cases("r12", "r13", "r14", "r15", "rbp", "ebp", "rbx", "ebx", true) 925 .Cases("rip", "eip", "rsp", "esp", "sp", "fp", "pc", true) 926 .Default(false); 927 return IsCalleeSaved; 928 } 929 930 uint32_t ABISysV_x86_64::GetGenericNum(llvm::StringRef name) { 931 return llvm::StringSwitch<uint32_t>(name) 932 .Case("rip", LLDB_REGNUM_GENERIC_PC) 933 .Case("rsp", LLDB_REGNUM_GENERIC_SP) 934 .Case("rbp", LLDB_REGNUM_GENERIC_FP) 935 .Case("rflags", LLDB_REGNUM_GENERIC_FLAGS) 936 .Case("rdi", LLDB_REGNUM_GENERIC_ARG1) 937 .Case("rsi", LLDB_REGNUM_GENERIC_ARG2) 938 .Case("rdx", LLDB_REGNUM_GENERIC_ARG3) 939 .Case("rcx", LLDB_REGNUM_GENERIC_ARG4) 940 .Case("r8", LLDB_REGNUM_GENERIC_ARG5) 941 .Case("r9", LLDB_REGNUM_GENERIC_ARG6) 942 .Default(LLDB_INVALID_REGNUM); 943 } 944 945 void ABISysV_x86_64::Initialize() { 946 PluginManager::RegisterPlugin( 947 GetPluginNameStatic(), "System V ABI for x86_64 targets", CreateInstance); 948 } 949 950 void ABISysV_x86_64::Terminate() { 951 PluginManager::UnregisterPlugin(CreateInstance); 952 } 953 954 lldb_private::ConstString ABISysV_x86_64::GetPluginNameStatic() { 955 static ConstString g_name("sysv-x86_64"); 956 return g_name; 957 } 958 959 // PluginInterface protocol 960 961 lldb_private::ConstString ABISysV_x86_64::GetPluginName() { 962 return GetPluginNameStatic(); 963 } 964 965 uint32_t ABISysV_x86_64::GetPluginVersion() { return 1; } 966