1 //===-- ABISysV_x86_64.cpp ------------------------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "ABISysV_x86_64.h" 10 11 #include "llvm/ADT/STLExtras.h" 12 #include "llvm/ADT/StringSwitch.h" 13 #include "llvm/TargetParser/Triple.h" 14 15 #include "lldb/Core/Module.h" 16 #include "lldb/Core/PluginManager.h" 17 #include "lldb/Core/Value.h" 18 #include "lldb/Core/ValueObjectConstResult.h" 19 #include "lldb/Core/ValueObjectMemory.h" 20 #include "lldb/Core/ValueObjectRegister.h" 21 #include "lldb/Symbol/UnwindPlan.h" 22 #include "lldb/Target/Process.h" 23 #include "lldb/Target/RegisterContext.h" 24 #include "lldb/Target/StackFrame.h" 25 #include "lldb/Target/Target.h" 26 #include "lldb/Target/Thread.h" 27 #include "lldb/Utility/ConstString.h" 28 #include "lldb/Utility/DataExtractor.h" 29 #include "lldb/Utility/LLDBLog.h" 30 #include "lldb/Utility/Log.h" 31 #include "lldb/Utility/RegisterValue.h" 32 #include "lldb/Utility/Status.h" 33 34 #include <optional> 35 #include <vector> 36 37 using namespace lldb; 38 using namespace lldb_private; 39 40 LLDB_PLUGIN_DEFINE(ABISysV_x86_64) 41 42 enum dwarf_regnums { 43 dwarf_rax = 0, 44 dwarf_rdx, 45 dwarf_rcx, 46 dwarf_rbx, 47 dwarf_rsi, 48 dwarf_rdi, 49 dwarf_rbp, 50 dwarf_rsp, 51 dwarf_r8, 52 dwarf_r9, 53 dwarf_r10, 54 dwarf_r11, 55 dwarf_r12, 56 dwarf_r13, 57 dwarf_r14, 58 dwarf_r15, 59 dwarf_rip, 60 }; 61 62 bool ABISysV_x86_64::GetPointerReturnRegister(const char *&name) { 63 name = "rax"; 64 return true; 65 } 66 67 size_t ABISysV_x86_64::GetRedZoneSize() const { return 128; } 68 69 // Static Functions 70 71 ABISP 72 ABISysV_x86_64::CreateInstance(lldb::ProcessSP process_sp, const ArchSpec &arch) { 73 const llvm::Triple::ArchType arch_type = arch.GetTriple().getArch(); 74 const llvm::Triple::OSType os_type = arch.GetTriple().getOS(); 75 const llvm::Triple::EnvironmentType os_env = 76 arch.GetTriple().getEnvironment(); 77 if (arch_type == llvm::Triple::x86_64) { 78 switch(os_type) { 79 case llvm::Triple::OSType::IOS: 80 case llvm::Triple::OSType::TvOS: 81 case llvm::Triple::OSType::WatchOS: 82 switch (os_env) { 83 case llvm::Triple::EnvironmentType::MacABI: 84 case llvm::Triple::EnvironmentType::Simulator: 85 case llvm::Triple::EnvironmentType::UnknownEnvironment: 86 // UnknownEnvironment is needed for older compilers that don't 87 // support the simulator environment. 88 return ABISP(new ABISysV_x86_64(std::move(process_sp), 89 MakeMCRegisterInfo(arch))); 90 default: 91 return ABISP(); 92 } 93 case llvm::Triple::OSType::Darwin: 94 case llvm::Triple::OSType::FreeBSD: 95 case llvm::Triple::OSType::Linux: 96 case llvm::Triple::OSType::MacOSX: 97 case llvm::Triple::OSType::NetBSD: 98 case llvm::Triple::OSType::Solaris: 99 case llvm::Triple::OSType::UnknownOS: 100 return ABISP( 101 new ABISysV_x86_64(std::move(process_sp), MakeMCRegisterInfo(arch))); 102 default: 103 return ABISP(); 104 } 105 } 106 return ABISP(); 107 } 108 109 bool ABISysV_x86_64::PrepareTrivialCall(Thread &thread, addr_t sp, 110 addr_t func_addr, addr_t return_addr, 111 llvm::ArrayRef<addr_t> args) const { 112 Log *log = GetLog(LLDBLog::Expressions); 113 114 if (log) { 115 StreamString s; 116 s.Printf("ABISysV_x86_64::PrepareTrivialCall (tid = 0x%" PRIx64 117 ", sp = 0x%" PRIx64 ", func_addr = 0x%" PRIx64 118 ", return_addr = 0x%" PRIx64, 119 thread.GetID(), (uint64_t)sp, (uint64_t)func_addr, 120 (uint64_t)return_addr); 121 122 for (size_t i = 0; i < args.size(); ++i) 123 s.Printf(", arg%" PRIu64 " = 0x%" PRIx64, static_cast<uint64_t>(i + 1), 124 args[i]); 125 s.PutCString(")"); 126 log->PutString(s.GetString()); 127 } 128 129 RegisterContext *reg_ctx = thread.GetRegisterContext().get(); 130 if (!reg_ctx) 131 return false; 132 133 const RegisterInfo *reg_info = nullptr; 134 135 if (args.size() > 6) // TODO handle more than 6 arguments 136 return false; 137 138 for (size_t i = 0; i < args.size(); ++i) { 139 reg_info = reg_ctx->GetRegisterInfo(eRegisterKindGeneric, 140 LLDB_REGNUM_GENERIC_ARG1 + i); 141 LLDB_LOGF(log, "About to write arg%" PRIu64 " (0x%" PRIx64 ") into %s", 142 static_cast<uint64_t>(i + 1), args[i], reg_info->name); 143 if (!reg_ctx->WriteRegisterFromUnsigned(reg_info, args[i])) 144 return false; 145 } 146 147 // First, align the SP 148 149 LLDB_LOGF(log, "16-byte aligning SP: 0x%" PRIx64 " to 0x%" PRIx64, 150 (uint64_t)sp, (uint64_t)(sp & ~0xfull)); 151 152 sp &= ~(0xfull); // 16-byte alignment 153 154 sp -= 8; 155 156 Status error; 157 const RegisterInfo *pc_reg_info = 158 reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC); 159 const RegisterInfo *sp_reg_info = 160 reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP); 161 ProcessSP process_sp(thread.GetProcess()); 162 163 RegisterValue reg_value; 164 LLDB_LOGF(log, 165 "Pushing the return address onto the stack: 0x%" PRIx64 166 ": 0x%" PRIx64, 167 (uint64_t)sp, (uint64_t)return_addr); 168 169 // Save return address onto the stack 170 if (!process_sp->WritePointerToMemory(sp, return_addr, error)) 171 return false; 172 173 // %rsp is set to the actual stack value. 174 175 LLDB_LOGF(log, "Writing SP: 0x%" PRIx64, (uint64_t)sp); 176 177 if (!reg_ctx->WriteRegisterFromUnsigned(sp_reg_info, sp)) 178 return false; 179 180 // %rip is set to the address of the called function. 181 182 LLDB_LOGF(log, "Writing IP: 0x%" PRIx64, (uint64_t)func_addr); 183 184 if (!reg_ctx->WriteRegisterFromUnsigned(pc_reg_info, func_addr)) 185 return false; 186 187 return true; 188 } 189 190 static bool ReadIntegerArgument(Scalar &scalar, unsigned int bit_width, 191 bool is_signed, Thread &thread, 192 uint32_t *argument_register_ids, 193 unsigned int ¤t_argument_register, 194 addr_t ¤t_stack_argument) { 195 if (bit_width > 64) 196 return false; // Scalar can't hold large integer arguments 197 198 if (current_argument_register < 6) { 199 scalar = thread.GetRegisterContext()->ReadRegisterAsUnsigned( 200 argument_register_ids[current_argument_register], 0); 201 current_argument_register++; 202 if (is_signed) 203 scalar.SignExtend(bit_width); 204 } else { 205 uint32_t byte_size = (bit_width + (8 - 1)) / 8; 206 Status error; 207 if (thread.GetProcess()->ReadScalarIntegerFromMemory( 208 current_stack_argument, byte_size, is_signed, scalar, error)) { 209 current_stack_argument += byte_size; 210 return true; 211 } 212 return false; 213 } 214 return true; 215 } 216 217 bool ABISysV_x86_64::GetArgumentValues(Thread &thread, 218 ValueList &values) const { 219 unsigned int num_values = values.GetSize(); 220 unsigned int value_index; 221 222 // Extract the register context so we can read arguments from registers 223 224 RegisterContext *reg_ctx = thread.GetRegisterContext().get(); 225 226 if (!reg_ctx) 227 return false; 228 229 // Get the pointer to the first stack argument so we have a place to start 230 // when reading data 231 232 addr_t sp = reg_ctx->GetSP(0); 233 234 if (!sp) 235 return false; 236 237 addr_t current_stack_argument = sp + 8; // jump over return address 238 239 uint32_t argument_register_ids[6]; 240 241 argument_register_ids[0] = 242 reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG1) 243 ->kinds[eRegisterKindLLDB]; 244 argument_register_ids[1] = 245 reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG2) 246 ->kinds[eRegisterKindLLDB]; 247 argument_register_ids[2] = 248 reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG3) 249 ->kinds[eRegisterKindLLDB]; 250 argument_register_ids[3] = 251 reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG4) 252 ->kinds[eRegisterKindLLDB]; 253 argument_register_ids[4] = 254 reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG5) 255 ->kinds[eRegisterKindLLDB]; 256 argument_register_ids[5] = 257 reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG6) 258 ->kinds[eRegisterKindLLDB]; 259 260 unsigned int current_argument_register = 0; 261 262 for (value_index = 0; value_index < num_values; ++value_index) { 263 Value *value = values.GetValueAtIndex(value_index); 264 265 if (!value) 266 return false; 267 268 // We currently only support extracting values with Clang QualTypes. Do we 269 // care about others? 270 CompilerType compiler_type = value->GetCompilerType(); 271 std::optional<uint64_t> bit_size = compiler_type.GetBitSize(&thread); 272 if (!bit_size) 273 return false; 274 bool is_signed; 275 276 if (compiler_type.IsIntegerOrEnumerationType(is_signed)) { 277 ReadIntegerArgument(value->GetScalar(), *bit_size, is_signed, thread, 278 argument_register_ids, current_argument_register, 279 current_stack_argument); 280 } else if (compiler_type.IsPointerType()) { 281 ReadIntegerArgument(value->GetScalar(), *bit_size, false, thread, 282 argument_register_ids, current_argument_register, 283 current_stack_argument); 284 } 285 } 286 287 return true; 288 } 289 290 Status ABISysV_x86_64::SetReturnValueObject(lldb::StackFrameSP &frame_sp, 291 lldb::ValueObjectSP &new_value_sp) { 292 Status error; 293 if (!new_value_sp) { 294 error.SetErrorString("Empty value object for return value."); 295 return error; 296 } 297 298 CompilerType compiler_type = new_value_sp->GetCompilerType(); 299 if (!compiler_type) { 300 error.SetErrorString("Null clang type for return value."); 301 return error; 302 } 303 304 Thread *thread = frame_sp->GetThread().get(); 305 306 bool is_signed; 307 uint32_t count; 308 bool is_complex; 309 310 RegisterContext *reg_ctx = thread->GetRegisterContext().get(); 311 312 bool set_it_simple = false; 313 if (compiler_type.IsIntegerOrEnumerationType(is_signed) || 314 compiler_type.IsPointerType()) { 315 const RegisterInfo *reg_info = reg_ctx->GetRegisterInfoByName("rax", 0); 316 317 DataExtractor data; 318 Status data_error; 319 size_t num_bytes = new_value_sp->GetData(data, data_error); 320 if (data_error.Fail()) { 321 error.SetErrorStringWithFormat( 322 "Couldn't convert return value to raw data: %s", 323 data_error.AsCString()); 324 return error; 325 } 326 lldb::offset_t offset = 0; 327 if (num_bytes <= 8) { 328 uint64_t raw_value = data.GetMaxU64(&offset, num_bytes); 329 330 if (reg_ctx->WriteRegisterFromUnsigned(reg_info, raw_value)) 331 set_it_simple = true; 332 } else { 333 error.SetErrorString("We don't support returning longer than 64 bit " 334 "integer values at present."); 335 } 336 } else if (compiler_type.IsFloatingPointType(count, is_complex)) { 337 if (is_complex) 338 error.SetErrorString( 339 "We don't support returning complex values at present"); 340 else { 341 std::optional<uint64_t> bit_width = 342 compiler_type.GetBitSize(frame_sp.get()); 343 if (!bit_width) { 344 error.SetErrorString("can't get type size"); 345 return error; 346 } 347 if (*bit_width <= 64) { 348 const RegisterInfo *xmm0_info = 349 reg_ctx->GetRegisterInfoByName("xmm0", 0); 350 RegisterValue xmm0_value; 351 DataExtractor data; 352 Status data_error; 353 size_t num_bytes = new_value_sp->GetData(data, data_error); 354 if (data_error.Fail()) { 355 error.SetErrorStringWithFormat( 356 "Couldn't convert return value to raw data: %s", 357 data_error.AsCString()); 358 return error; 359 } 360 361 unsigned char buffer[16]; 362 ByteOrder byte_order = data.GetByteOrder(); 363 364 data.CopyByteOrderedData(0, num_bytes, buffer, 16, byte_order); 365 xmm0_value.SetBytes(buffer, 16, byte_order); 366 reg_ctx->WriteRegister(xmm0_info, xmm0_value); 367 set_it_simple = true; 368 } else { 369 // FIXME - don't know how to do 80 bit long doubles yet. 370 error.SetErrorString( 371 "We don't support returning float values > 64 bits at present"); 372 } 373 } 374 } 375 376 if (!set_it_simple) { 377 // Okay we've got a structure or something that doesn't fit in a simple 378 // register. We should figure out where it really goes, but we don't 379 // support this yet. 380 error.SetErrorString("We only support setting simple integer and float " 381 "return types at present."); 382 } 383 384 return error; 385 } 386 387 ValueObjectSP ABISysV_x86_64::GetReturnValueObjectSimple( 388 Thread &thread, CompilerType &return_compiler_type) const { 389 ValueObjectSP return_valobj_sp; 390 Value value; 391 392 if (!return_compiler_type) 393 return return_valobj_sp; 394 395 // value.SetContext (Value::eContextTypeClangType, return_value_type); 396 value.SetCompilerType(return_compiler_type); 397 398 RegisterContext *reg_ctx = thread.GetRegisterContext().get(); 399 if (!reg_ctx) 400 return return_valobj_sp; 401 402 const uint32_t type_flags = return_compiler_type.GetTypeInfo(); 403 if (type_flags & eTypeIsScalar) { 404 value.SetValueType(Value::ValueType::Scalar); 405 406 bool success = false; 407 if (type_flags & eTypeIsInteger) { 408 // Extract the register context so we can read arguments from registers 409 410 std::optional<uint64_t> byte_size = 411 return_compiler_type.GetByteSize(&thread); 412 if (!byte_size) 413 return return_valobj_sp; 414 uint64_t raw_value = thread.GetRegisterContext()->ReadRegisterAsUnsigned( 415 reg_ctx->GetRegisterInfoByName("rax", 0), 0); 416 const bool is_signed = (type_flags & eTypeIsSigned) != 0; 417 switch (*byte_size) { 418 default: 419 break; 420 421 case sizeof(uint64_t): 422 if (is_signed) 423 value.GetScalar() = (int64_t)(raw_value); 424 else 425 value.GetScalar() = (uint64_t)(raw_value); 426 success = true; 427 break; 428 429 case sizeof(uint32_t): 430 if (is_signed) 431 value.GetScalar() = (int32_t)(raw_value & UINT32_MAX); 432 else 433 value.GetScalar() = (uint32_t)(raw_value & UINT32_MAX); 434 success = true; 435 break; 436 437 case sizeof(uint16_t): 438 if (is_signed) 439 value.GetScalar() = (int16_t)(raw_value & UINT16_MAX); 440 else 441 value.GetScalar() = (uint16_t)(raw_value & UINT16_MAX); 442 success = true; 443 break; 444 445 case sizeof(uint8_t): 446 if (is_signed) 447 value.GetScalar() = (int8_t)(raw_value & UINT8_MAX); 448 else 449 value.GetScalar() = (uint8_t)(raw_value & UINT8_MAX); 450 success = true; 451 break; 452 } 453 } else if (type_flags & eTypeIsFloat) { 454 if (type_flags & eTypeIsComplex) { 455 // Don't handle complex yet. 456 } else { 457 std::optional<uint64_t> byte_size = 458 return_compiler_type.GetByteSize(&thread); 459 if (byte_size && *byte_size <= sizeof(long double)) { 460 const RegisterInfo *xmm0_info = 461 reg_ctx->GetRegisterInfoByName("xmm0", 0); 462 RegisterValue xmm0_value; 463 if (reg_ctx->ReadRegister(xmm0_info, xmm0_value)) { 464 DataExtractor data; 465 if (xmm0_value.GetData(data)) { 466 lldb::offset_t offset = 0; 467 if (*byte_size == sizeof(float)) { 468 value.GetScalar() = (float)data.GetFloat(&offset); 469 success = true; 470 } else if (*byte_size == sizeof(double)) { 471 value.GetScalar() = (double)data.GetDouble(&offset); 472 success = true; 473 } else if (*byte_size == sizeof(long double)) { 474 // Don't handle long double since that can be encoded as 80 bit 475 // floats... 476 } 477 } 478 } 479 } 480 } 481 } 482 483 if (success) 484 return_valobj_sp = ValueObjectConstResult::Create( 485 thread.GetStackFrameAtIndex(0).get(), value, ConstString("")); 486 } else if (type_flags & eTypeIsPointer) { 487 unsigned rax_id = 488 reg_ctx->GetRegisterInfoByName("rax", 0)->kinds[eRegisterKindLLDB]; 489 value.GetScalar() = 490 (uint64_t)thread.GetRegisterContext()->ReadRegisterAsUnsigned(rax_id, 491 0); 492 value.SetValueType(Value::ValueType::Scalar); 493 return_valobj_sp = ValueObjectConstResult::Create( 494 thread.GetStackFrameAtIndex(0).get(), value, ConstString("")); 495 } else if (type_flags & eTypeIsVector) { 496 std::optional<uint64_t> byte_size = 497 return_compiler_type.GetByteSize(&thread); 498 if (byte_size && *byte_size > 0) { 499 const RegisterInfo *altivec_reg = 500 reg_ctx->GetRegisterInfoByName("xmm0", 0); 501 if (altivec_reg == nullptr) 502 altivec_reg = reg_ctx->GetRegisterInfoByName("mm0", 0); 503 504 if (altivec_reg) { 505 if (*byte_size <= altivec_reg->byte_size) { 506 ProcessSP process_sp(thread.GetProcess()); 507 if (process_sp) { 508 std::unique_ptr<DataBufferHeap> heap_data_up( 509 new DataBufferHeap(*byte_size, 0)); 510 const ByteOrder byte_order = process_sp->GetByteOrder(); 511 RegisterValue reg_value; 512 if (reg_ctx->ReadRegister(altivec_reg, reg_value)) { 513 Status error; 514 if (reg_value.GetAsMemoryData( 515 *altivec_reg, heap_data_up->GetBytes(), 516 heap_data_up->GetByteSize(), byte_order, error)) { 517 DataExtractor data(DataBufferSP(heap_data_up.release()), 518 byte_order, 519 process_sp->GetTarget() 520 .GetArchitecture() 521 .GetAddressByteSize()); 522 return_valobj_sp = ValueObjectConstResult::Create( 523 &thread, return_compiler_type, ConstString(""), data); 524 } 525 } 526 } 527 } else if (*byte_size <= altivec_reg->byte_size * 2) { 528 const RegisterInfo *altivec_reg2 = 529 reg_ctx->GetRegisterInfoByName("xmm1", 0); 530 if (altivec_reg2) { 531 ProcessSP process_sp(thread.GetProcess()); 532 if (process_sp) { 533 std::unique_ptr<DataBufferHeap> heap_data_up( 534 new DataBufferHeap(*byte_size, 0)); 535 const ByteOrder byte_order = process_sp->GetByteOrder(); 536 RegisterValue reg_value; 537 RegisterValue reg_value2; 538 if (reg_ctx->ReadRegister(altivec_reg, reg_value) && 539 reg_ctx->ReadRegister(altivec_reg2, reg_value2)) { 540 541 Status error; 542 if (reg_value.GetAsMemoryData( 543 *altivec_reg, heap_data_up->GetBytes(), 544 altivec_reg->byte_size, byte_order, error) && 545 reg_value2.GetAsMemoryData( 546 *altivec_reg2, 547 heap_data_up->GetBytes() + altivec_reg->byte_size, 548 heap_data_up->GetByteSize() - altivec_reg->byte_size, 549 byte_order, error)) { 550 DataExtractor data(DataBufferSP(heap_data_up.release()), 551 byte_order, 552 process_sp->GetTarget() 553 .GetArchitecture() 554 .GetAddressByteSize()); 555 return_valobj_sp = ValueObjectConstResult::Create( 556 &thread, return_compiler_type, ConstString(""), data); 557 } 558 } 559 } 560 } 561 } 562 } 563 } 564 } 565 566 return return_valobj_sp; 567 } 568 569 // The compiler will flatten the nested aggregate type into single 570 // layer and push the value to stack 571 // This helper function will flatten an aggregate type 572 // and return true if it can be returned in register(s) by value 573 // return false if the aggregate is in memory 574 static bool FlattenAggregateType( 575 Thread &thread, ExecutionContext &exe_ctx, 576 CompilerType &return_compiler_type, 577 uint32_t data_byte_offset, 578 std::vector<uint32_t> &aggregate_field_offsets, 579 std::vector<CompilerType> &aggregate_compiler_types) { 580 581 const uint32_t num_children = return_compiler_type.GetNumFields(); 582 for (uint32_t idx = 0; idx < num_children; ++idx) { 583 std::string name; 584 bool is_signed; 585 uint32_t count; 586 bool is_complex; 587 588 uint64_t field_bit_offset = 0; 589 CompilerType field_compiler_type = return_compiler_type.GetFieldAtIndex( 590 idx, name, &field_bit_offset, nullptr, nullptr); 591 std::optional<uint64_t> field_bit_width = 592 field_compiler_type.GetBitSize(&thread); 593 594 // if we don't know the size of the field (e.g. invalid type), exit 595 if (!field_bit_width || *field_bit_width == 0) { 596 return false; 597 } 598 599 uint32_t field_byte_offset = field_bit_offset / 8 + data_byte_offset; 600 601 const uint32_t field_type_flags = field_compiler_type.GetTypeInfo(); 602 if (field_compiler_type.IsIntegerOrEnumerationType(is_signed) || 603 field_compiler_type.IsPointerType() || 604 field_compiler_type.IsFloatingPointType(count, is_complex)) { 605 aggregate_field_offsets.push_back(field_byte_offset); 606 aggregate_compiler_types.push_back(field_compiler_type); 607 } else if (field_type_flags & eTypeHasChildren) { 608 if (!FlattenAggregateType(thread, exe_ctx, field_compiler_type, 609 field_byte_offset, aggregate_field_offsets, 610 aggregate_compiler_types)) { 611 return false; 612 } 613 } 614 } 615 return true; 616 } 617 618 ValueObjectSP ABISysV_x86_64::GetReturnValueObjectImpl( 619 Thread &thread, CompilerType &return_compiler_type) const { 620 ValueObjectSP return_valobj_sp; 621 622 if (!return_compiler_type) 623 return return_valobj_sp; 624 625 ExecutionContext exe_ctx(thread.shared_from_this()); 626 return_valobj_sp = GetReturnValueObjectSimple(thread, return_compiler_type); 627 if (return_valobj_sp) 628 return return_valobj_sp; 629 630 RegisterContextSP reg_ctx_sp = thread.GetRegisterContext(); 631 if (!reg_ctx_sp) 632 return return_valobj_sp; 633 634 std::optional<uint64_t> bit_width = return_compiler_type.GetBitSize(&thread); 635 if (!bit_width) 636 return return_valobj_sp; 637 if (return_compiler_type.IsAggregateType()) { 638 Target *target = exe_ctx.GetTargetPtr(); 639 bool is_memory = true; 640 std::vector<uint32_t> aggregate_field_offsets; 641 std::vector<CompilerType> aggregate_compiler_types; 642 auto ts = return_compiler_type.GetTypeSystem(); 643 if (ts && ts->CanPassInRegisters(return_compiler_type) && 644 *bit_width <= 128 && 645 FlattenAggregateType(thread, exe_ctx, return_compiler_type, 0, 646 aggregate_field_offsets, 647 aggregate_compiler_types)) { 648 ByteOrder byte_order = target->GetArchitecture().GetByteOrder(); 649 WritableDataBufferSP data_sp(new DataBufferHeap(16, 0)); 650 DataExtractor return_ext(data_sp, byte_order, 651 target->GetArchitecture().GetAddressByteSize()); 652 653 const RegisterInfo *rax_info = 654 reg_ctx_sp->GetRegisterInfoByName("rax", 0); 655 const RegisterInfo *rdx_info = 656 reg_ctx_sp->GetRegisterInfoByName("rdx", 0); 657 const RegisterInfo *xmm0_info = 658 reg_ctx_sp->GetRegisterInfoByName("xmm0", 0); 659 const RegisterInfo *xmm1_info = 660 reg_ctx_sp->GetRegisterInfoByName("xmm1", 0); 661 662 RegisterValue rax_value, rdx_value, xmm0_value, xmm1_value; 663 reg_ctx_sp->ReadRegister(rax_info, rax_value); 664 reg_ctx_sp->ReadRegister(rdx_info, rdx_value); 665 reg_ctx_sp->ReadRegister(xmm0_info, xmm0_value); 666 reg_ctx_sp->ReadRegister(xmm1_info, xmm1_value); 667 668 DataExtractor rax_data, rdx_data, xmm0_data, xmm1_data; 669 670 rax_value.GetData(rax_data); 671 rdx_value.GetData(rdx_data); 672 xmm0_value.GetData(xmm0_data); 673 xmm1_value.GetData(xmm1_data); 674 675 uint32_t fp_bytes = 676 0; // Tracks how much of the xmm registers we've consumed so far 677 uint32_t integer_bytes = 678 0; // Tracks how much of the rax/rds registers we've consumed so far 679 680 // in case of the returned type is a subclass of non-abstract-base class 681 // it will have a padding to skip the base content 682 if (aggregate_field_offsets.size()) { 683 fp_bytes = aggregate_field_offsets[0]; 684 integer_bytes = aggregate_field_offsets[0]; 685 } 686 687 const uint32_t num_children = aggregate_compiler_types.size(); 688 689 // Since we are in the small struct regime, assume we are not in memory. 690 is_memory = false; 691 for (uint32_t idx = 0; idx < num_children; idx++) { 692 bool is_signed; 693 uint32_t count; 694 bool is_complex; 695 696 CompilerType field_compiler_type = aggregate_compiler_types[idx]; 697 uint32_t field_byte_width = (uint32_t) (*field_compiler_type.GetByteSize(&thread)); 698 uint32_t field_byte_offset = aggregate_field_offsets[idx]; 699 700 uint32_t field_bit_width = field_byte_width * 8; 701 702 DataExtractor *copy_from_extractor = nullptr; 703 uint32_t copy_from_offset = 0; 704 705 if (field_compiler_type.IsIntegerOrEnumerationType(is_signed) || 706 field_compiler_type.IsPointerType()) { 707 if (integer_bytes < 8) { 708 if (integer_bytes + field_byte_width <= 8) { 709 // This is in RAX, copy from register to our result structure: 710 copy_from_extractor = &rax_data; 711 copy_from_offset = integer_bytes; 712 integer_bytes += field_byte_width; 713 } else { 714 // The next field wouldn't fit in the remaining space, so we 715 // pushed it to rdx. 716 copy_from_extractor = &rdx_data; 717 copy_from_offset = 0; 718 integer_bytes = 8 + field_byte_width; 719 } 720 } else if (integer_bytes + field_byte_width <= 16) { 721 copy_from_extractor = &rdx_data; 722 copy_from_offset = integer_bytes - 8; 723 integer_bytes += field_byte_width; 724 } else { 725 // The last field didn't fit. I can't see how that would happen 726 // w/o the overall size being greater than 16 bytes. For now, 727 // return a nullptr return value object. 728 return return_valobj_sp; 729 } 730 } else if (field_compiler_type.IsFloatingPointType(count, is_complex)) { 731 // Structs with long doubles are always passed in memory. 732 if (field_bit_width == 128) { 733 is_memory = true; 734 break; 735 } else if (field_bit_width == 64) { 736 // These have to be in a single xmm register. 737 if (fp_bytes == 0) 738 copy_from_extractor = &xmm0_data; 739 else 740 copy_from_extractor = &xmm1_data; 741 742 copy_from_offset = 0; 743 fp_bytes += field_byte_width; 744 } else if (field_bit_width == 32) { 745 // This one is kind of complicated. If we are in an "eightbyte" 746 // with another float, we'll be stuffed into an xmm register with 747 // it. If we are in an "eightbyte" with one or more ints, then we 748 // will be stuffed into the appropriate GPR with them. 749 bool in_gpr; 750 if (field_byte_offset % 8 == 0) { 751 // We are at the beginning of one of the eightbytes, so check the 752 // next element (if any) 753 if (idx == num_children - 1) { 754 in_gpr = false; 755 } else { 756 CompilerType next_field_compiler_type = 757 aggregate_compiler_types[idx + 1]; 758 if (next_field_compiler_type.IsIntegerOrEnumerationType( 759 is_signed)) { 760 in_gpr = true; 761 } else { 762 copy_from_offset = 0; 763 in_gpr = false; 764 } 765 } 766 } else if (field_byte_offset % 4 == 0) { 767 // We are inside of an eightbyte, so see if the field before us 768 // is floating point: This could happen if somebody put padding 769 // in the structure. 770 if (idx == 0) { 771 in_gpr = false; 772 } else { 773 CompilerType prev_field_compiler_type = 774 aggregate_compiler_types[idx - 1]; 775 if (prev_field_compiler_type.IsIntegerOrEnumerationType( 776 is_signed)) { 777 in_gpr = true; 778 } else { 779 copy_from_offset = 4; 780 in_gpr = false; 781 } 782 } 783 } else { 784 is_memory = true; 785 continue; 786 } 787 788 // Okay, we've figured out whether we are in GPR or XMM, now figure 789 // out which one. 790 if (in_gpr) { 791 if (integer_bytes < 8) { 792 // This is in RAX, copy from register to our result structure: 793 copy_from_extractor = &rax_data; 794 copy_from_offset = integer_bytes; 795 integer_bytes += field_byte_width; 796 } else { 797 copy_from_extractor = &rdx_data; 798 copy_from_offset = integer_bytes - 8; 799 integer_bytes += field_byte_width; 800 } 801 } else { 802 if (fp_bytes < 8) 803 copy_from_extractor = &xmm0_data; 804 else 805 copy_from_extractor = &xmm1_data; 806 807 fp_bytes += field_byte_width; 808 } 809 } 810 } 811 // These two tests are just sanity checks. If I somehow get the type 812 // calculation wrong above it is better to just return nothing than to 813 // assert or crash. 814 if (!copy_from_extractor) 815 return return_valobj_sp; 816 if (copy_from_offset + field_byte_width > 817 copy_from_extractor->GetByteSize()) 818 return return_valobj_sp; 819 copy_from_extractor->CopyByteOrderedData( 820 copy_from_offset, field_byte_width, 821 data_sp->GetBytes() + field_byte_offset, field_byte_width, 822 byte_order); 823 } 824 if (!is_memory) { 825 // The result is in our data buffer. Let's make a variable object out 826 // of it: 827 return_valobj_sp = ValueObjectConstResult::Create( 828 &thread, return_compiler_type, ConstString(""), return_ext); 829 } 830 } 831 832 // FIXME: This is just taking a guess, rax may very well no longer hold the 833 // return storage location. 834 // If we are going to do this right, when we make a new frame we should 835 // check to see if it uses a memory return, and if we are at the first 836 // instruction and if so stash away the return location. Then we would 837 // only return the memory return value if we know it is valid. 838 839 if (is_memory) { 840 unsigned rax_id = 841 reg_ctx_sp->GetRegisterInfoByName("rax", 0)->kinds[eRegisterKindLLDB]; 842 lldb::addr_t storage_addr = 843 (uint64_t)thread.GetRegisterContext()->ReadRegisterAsUnsigned(rax_id, 844 0); 845 return_valobj_sp = ValueObjectMemory::Create( 846 &thread, "", Address(storage_addr, nullptr), return_compiler_type); 847 } 848 } 849 850 return return_valobj_sp; 851 } 852 853 // This defines the CFA as rsp+8 854 // the saved pc is at CFA-8 (i.e. rsp+0) 855 // The saved rsp is CFA+0 856 857 bool ABISysV_x86_64::CreateFunctionEntryUnwindPlan(UnwindPlan &unwind_plan) { 858 unwind_plan.Clear(); 859 unwind_plan.SetRegisterKind(eRegisterKindDWARF); 860 861 uint32_t sp_reg_num = dwarf_rsp; 862 uint32_t pc_reg_num = dwarf_rip; 863 864 UnwindPlan::RowSP row(new UnwindPlan::Row); 865 row->GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 8); 866 row->SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, -8, false); 867 row->SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true); 868 unwind_plan.AppendRow(row); 869 unwind_plan.SetSourceName("x86_64 at-func-entry default"); 870 unwind_plan.SetSourcedFromCompiler(eLazyBoolNo); 871 return true; 872 } 873 874 // This defines the CFA as rbp+16 875 // The saved pc is at CFA-8 (i.e. rbp+8) 876 // The saved rbp is at CFA-16 (i.e. rbp+0) 877 // The saved rsp is CFA+0 878 879 bool ABISysV_x86_64::CreateDefaultUnwindPlan(UnwindPlan &unwind_plan) { 880 unwind_plan.Clear(); 881 unwind_plan.SetRegisterKind(eRegisterKindDWARF); 882 883 uint32_t fp_reg_num = dwarf_rbp; 884 uint32_t sp_reg_num = dwarf_rsp; 885 uint32_t pc_reg_num = dwarf_rip; 886 887 UnwindPlan::RowSP row(new UnwindPlan::Row); 888 889 const int32_t ptr_size = 8; 890 row->GetCFAValue().SetIsRegisterPlusOffset(dwarf_rbp, 2 * ptr_size); 891 row->SetOffset(0); 892 row->SetUnspecifiedRegistersAreUndefined(true); 893 894 row->SetRegisterLocationToAtCFAPlusOffset(fp_reg_num, ptr_size * -2, true); 895 row->SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, ptr_size * -1, true); 896 row->SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true); 897 898 unwind_plan.AppendRow(row); 899 unwind_plan.SetSourceName("x86_64 default unwind plan"); 900 unwind_plan.SetSourcedFromCompiler(eLazyBoolNo); 901 unwind_plan.SetUnwindPlanValidAtAllInstructions(eLazyBoolNo); 902 unwind_plan.SetUnwindPlanForSignalTrap(eLazyBoolNo); 903 return true; 904 } 905 906 bool ABISysV_x86_64::RegisterIsVolatile(const RegisterInfo *reg_info) { 907 return !RegisterIsCalleeSaved(reg_info); 908 } 909 910 // See "Register Usage" in the 911 // "System V Application Binary Interface" 912 // "AMD64 Architecture Processor Supplement" (or "x86-64(tm) Architecture 913 // Processor Supplement" in earlier revisions) (this doc is also commonly 914 // referred to as the x86-64/AMD64 psABI) Edited by Michael Matz, Jan Hubicka, 915 // Andreas Jaeger, and Mark Mitchell current version is 0.99.6 released 916 // 2012-07-02 at http://refspecs.linuxfoundation.org/elf/x86-64-abi-0.99.pdf 917 // It's being revised & updated at https://github.com/hjl-tools/x86-psABI/ 918 919 bool ABISysV_x86_64::RegisterIsCalleeSaved(const RegisterInfo *reg_info) { 920 if (!reg_info) 921 return false; 922 assert(reg_info->name != nullptr && "unnamed register?"); 923 std::string Name = std::string(reg_info->name); 924 bool IsCalleeSaved = 925 llvm::StringSwitch<bool>(Name) 926 .Cases("r12", "r13", "r14", "r15", "rbp", "ebp", "rbx", "ebx", true) 927 .Cases("rip", "eip", "rsp", "esp", "sp", "fp", "pc", true) 928 .Default(false); 929 return IsCalleeSaved; 930 } 931 932 uint32_t ABISysV_x86_64::GetGenericNum(llvm::StringRef name) { 933 return llvm::StringSwitch<uint32_t>(name) 934 .Case("rip", LLDB_REGNUM_GENERIC_PC) 935 .Case("rsp", LLDB_REGNUM_GENERIC_SP) 936 .Case("rbp", LLDB_REGNUM_GENERIC_FP) 937 .Case("rflags", LLDB_REGNUM_GENERIC_FLAGS) 938 // gdbserver uses eflags 939 .Case("eflags", LLDB_REGNUM_GENERIC_FLAGS) 940 .Case("rdi", LLDB_REGNUM_GENERIC_ARG1) 941 .Case("rsi", LLDB_REGNUM_GENERIC_ARG2) 942 .Case("rdx", LLDB_REGNUM_GENERIC_ARG3) 943 .Case("rcx", LLDB_REGNUM_GENERIC_ARG4) 944 .Case("r8", LLDB_REGNUM_GENERIC_ARG5) 945 .Case("r9", LLDB_REGNUM_GENERIC_ARG6) 946 .Default(LLDB_INVALID_REGNUM); 947 } 948 949 void ABISysV_x86_64::Initialize() { 950 PluginManager::RegisterPlugin( 951 GetPluginNameStatic(), "System V ABI for x86_64 targets", CreateInstance); 952 } 953 954 void ABISysV_x86_64::Terminate() { 955 PluginManager::UnregisterPlugin(CreateInstance); 956 } 957