1 //===-- RegisterContextPOSIX_ppc64le.cpp ----------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include <cerrno> 10 #include <cstdint> 11 #include <cstring> 12 13 #include "lldb/Target/Process.h" 14 #include "lldb/Target/Target.h" 15 #include "lldb/Target/Thread.h" 16 #include "lldb/Utility/DataBufferHeap.h" 17 #include "lldb/Utility/DataExtractor.h" 18 #include "lldb/Utility/Endian.h" 19 #include "lldb/Utility/RegisterValue.h" 20 #include "lldb/Utility/Scalar.h" 21 #include "llvm/Support/Compiler.h" 22 23 #include "RegisterContextPOSIX_ppc64le.h" 24 25 using namespace lldb_private; 26 using namespace lldb; 27 28 static const uint32_t g_gpr_regnums[] = { 29 gpr_r0_ppc64le, gpr_r1_ppc64le, gpr_r2_ppc64le, gpr_r3_ppc64le, 30 gpr_r4_ppc64le, gpr_r5_ppc64le, gpr_r6_ppc64le, gpr_r7_ppc64le, 31 gpr_r8_ppc64le, gpr_r9_ppc64le, gpr_r10_ppc64le, gpr_r11_ppc64le, 32 gpr_r12_ppc64le, gpr_r13_ppc64le, gpr_r14_ppc64le, gpr_r15_ppc64le, 33 gpr_r16_ppc64le, gpr_r17_ppc64le, gpr_r18_ppc64le, gpr_r19_ppc64le, 34 gpr_r20_ppc64le, gpr_r21_ppc64le, gpr_r22_ppc64le, gpr_r23_ppc64le, 35 gpr_r24_ppc64le, gpr_r25_ppc64le, gpr_r26_ppc64le, gpr_r27_ppc64le, 36 gpr_r28_ppc64le, gpr_r29_ppc64le, gpr_r30_ppc64le, gpr_r31_ppc64le, 37 gpr_pc_ppc64le, gpr_msr_ppc64le, gpr_origr3_ppc64le, gpr_ctr_ppc64le, 38 gpr_lr_ppc64le, gpr_xer_ppc64le, gpr_cr_ppc64le, gpr_softe_ppc64le, 39 gpr_trap_ppc64le, 40 }; 41 42 static const uint32_t g_fpr_regnums[] = { 43 fpr_f0_ppc64le, fpr_f1_ppc64le, fpr_f2_ppc64le, fpr_f3_ppc64le, 44 fpr_f4_ppc64le, fpr_f5_ppc64le, fpr_f6_ppc64le, fpr_f7_ppc64le, 45 fpr_f8_ppc64le, fpr_f9_ppc64le, fpr_f10_ppc64le, fpr_f11_ppc64le, 46 fpr_f12_ppc64le, fpr_f13_ppc64le, fpr_f14_ppc64le, fpr_f15_ppc64le, 47 fpr_f16_ppc64le, fpr_f17_ppc64le, fpr_f18_ppc64le, fpr_f19_ppc64le, 48 fpr_f20_ppc64le, fpr_f21_ppc64le, fpr_f22_ppc64le, fpr_f23_ppc64le, 49 fpr_f24_ppc64le, fpr_f25_ppc64le, fpr_f26_ppc64le, fpr_f27_ppc64le, 50 fpr_f28_ppc64le, fpr_f29_ppc64le, fpr_f30_ppc64le, fpr_f31_ppc64le, 51 fpr_fpscr_ppc64le, 52 }; 53 54 static const uint32_t g_vmx_regnums[] = { 55 vmx_vr0_ppc64le, vmx_vr1_ppc64le, vmx_vr2_ppc64le, vmx_vr3_ppc64le, 56 vmx_vr4_ppc64le, vmx_vr5_ppc64le, vmx_vr6_ppc64le, vmx_vr7_ppc64le, 57 vmx_vr8_ppc64le, vmx_vr9_ppc64le, vmx_vr10_ppc64le, vmx_vr11_ppc64le, 58 vmx_vr12_ppc64le, vmx_vr13_ppc64le, vmx_vr14_ppc64le, vmx_vr15_ppc64le, 59 vmx_vr16_ppc64le, vmx_vr17_ppc64le, vmx_vr18_ppc64le, vmx_vr19_ppc64le, 60 vmx_vr20_ppc64le, vmx_vr21_ppc64le, vmx_vr22_ppc64le, vmx_vr23_ppc64le, 61 vmx_vr24_ppc64le, vmx_vr25_ppc64le, vmx_vr26_ppc64le, vmx_vr27_ppc64le, 62 vmx_vr28_ppc64le, vmx_vr29_ppc64le, vmx_vr30_ppc64le, vmx_vr31_ppc64le, 63 vmx_vscr_ppc64le, vmx_vrsave_ppc64le, 64 }; 65 66 static const uint32_t g_vsx_regnums[] = { 67 vsx_vs0_ppc64le, vsx_vs1_ppc64le, vsx_vs2_ppc64le, vsx_vs3_ppc64le, 68 vsx_vs4_ppc64le, vsx_vs5_ppc64le, vsx_vs6_ppc64le, vsx_vs7_ppc64le, 69 vsx_vs8_ppc64le, vsx_vs9_ppc64le, vsx_vs10_ppc64le, vsx_vs11_ppc64le, 70 vsx_vs12_ppc64le, vsx_vs13_ppc64le, vsx_vs14_ppc64le, vsx_vs15_ppc64le, 71 vsx_vs16_ppc64le, vsx_vs17_ppc64le, vsx_vs18_ppc64le, vsx_vs19_ppc64le, 72 vsx_vs20_ppc64le, vsx_vs21_ppc64le, vsx_vs22_ppc64le, vsx_vs23_ppc64le, 73 vsx_vs24_ppc64le, vsx_vs25_ppc64le, vsx_vs26_ppc64le, vsx_vs27_ppc64le, 74 vsx_vs28_ppc64le, vsx_vs29_ppc64le, vsx_vs30_ppc64le, vsx_vs31_ppc64le, 75 vsx_vs32_ppc64le, vsx_vs33_ppc64le, vsx_vs34_ppc64le, vsx_vs35_ppc64le, 76 vsx_vs36_ppc64le, vsx_vs37_ppc64le, vsx_vs38_ppc64le, vsx_vs39_ppc64le, 77 vsx_vs40_ppc64le, vsx_vs41_ppc64le, vsx_vs42_ppc64le, vsx_vs43_ppc64le, 78 vsx_vs44_ppc64le, vsx_vs45_ppc64le, vsx_vs46_ppc64le, vsx_vs47_ppc64le, 79 vsx_vs48_ppc64le, vsx_vs49_ppc64le, vsx_vs50_ppc64le, vsx_vs51_ppc64le, 80 vsx_vs52_ppc64le, vsx_vs53_ppc64le, vsx_vs54_ppc64le, vsx_vs55_ppc64le, 81 vsx_vs56_ppc64le, vsx_vs57_ppc64le, vsx_vs58_ppc64le, vsx_vs59_ppc64le, 82 vsx_vs60_ppc64le, vsx_vs61_ppc64le, vsx_vs62_ppc64le, vsx_vs63_ppc64le, 83 }; 84 85 // Number of register sets provided by this context. 86 enum { k_num_register_sets = 4 }; 87 88 static const RegisterSet g_reg_sets_ppc64le[k_num_register_sets] = { 89 {"General Purpose Registers", "gpr", k_num_gpr_registers_ppc64le, 90 g_gpr_regnums}, 91 {"Floating Point Registers", "fpr", k_num_fpr_registers_ppc64le, 92 g_fpr_regnums}, 93 {"Altivec/VMX Registers", "vmx", k_num_vmx_registers_ppc64le, 94 g_vmx_regnums}, 95 {"VSX Registers", "vsx", k_num_vsx_registers_ppc64le, g_vsx_regnums}, 96 }; 97 98 bool RegisterContextPOSIX_ppc64le::IsGPR(unsigned reg) { 99 return (reg <= k_last_gpr_ppc64le); // GPR's come first. 100 } 101 102 bool RegisterContextPOSIX_ppc64le::IsFPR(unsigned reg) { 103 return (reg >= k_first_fpr_ppc64le) && (reg <= k_last_fpr_ppc64le); 104 } 105 106 bool RegisterContextPOSIX_ppc64le::IsVMX(unsigned reg) { 107 return (reg >= k_first_vmx_ppc64le) && (reg <= k_last_vmx_ppc64le); 108 } 109 110 bool RegisterContextPOSIX_ppc64le::IsVSX(unsigned reg) { 111 return (reg >= k_first_vsx_ppc64le) && (reg <= k_last_vsx_ppc64le); 112 } 113 114 RegisterContextPOSIX_ppc64le::RegisterContextPOSIX_ppc64le( 115 Thread &thread, uint32_t concrete_frame_idx, 116 RegisterInfoInterface *register_info) 117 : RegisterContext(thread, concrete_frame_idx) { 118 m_register_info_up.reset(register_info); 119 } 120 121 void RegisterContextPOSIX_ppc64le::InvalidateAllRegisters() {} 122 123 unsigned RegisterContextPOSIX_ppc64le::GetRegisterOffset(unsigned reg) { 124 assert(reg < k_num_registers_ppc64le && "Invalid register number."); 125 return GetRegisterInfo()[reg].byte_offset; 126 } 127 128 unsigned RegisterContextPOSIX_ppc64le::GetRegisterSize(unsigned reg) { 129 assert(reg < k_num_registers_ppc64le && "Invalid register number."); 130 return GetRegisterInfo()[reg].byte_size; 131 } 132 133 size_t RegisterContextPOSIX_ppc64le::GetRegisterCount() { 134 size_t num_registers = k_num_registers_ppc64le; 135 return num_registers; 136 } 137 138 size_t RegisterContextPOSIX_ppc64le::GetGPRSize() { 139 return m_register_info_up->GetGPRSize(); 140 } 141 142 const RegisterInfo *RegisterContextPOSIX_ppc64le::GetRegisterInfo() { 143 // Commonly, this method is overridden and g_register_infos is copied and 144 // specialized. So, use GetRegisterInfo() rather than g_register_infos in 145 // this scope. 146 return m_register_info_up->GetRegisterInfo(); 147 } 148 149 const RegisterInfo * 150 RegisterContextPOSIX_ppc64le::GetRegisterInfoAtIndex(size_t reg) { 151 if (reg < k_num_registers_ppc64le) 152 return &GetRegisterInfo()[reg]; 153 else 154 return nullptr; 155 } 156 157 size_t RegisterContextPOSIX_ppc64le::GetRegisterSetCount() { 158 size_t sets = 0; 159 for (size_t set = 0; set < k_num_register_sets; ++set) { 160 if (IsRegisterSetAvailable(set)) 161 ++sets; 162 } 163 164 return sets; 165 } 166 167 const RegisterSet *RegisterContextPOSIX_ppc64le::GetRegisterSet(size_t set) { 168 if (IsRegisterSetAvailable(set)) 169 return &g_reg_sets_ppc64le[set]; 170 else 171 return nullptr; 172 } 173 174 const char *RegisterContextPOSIX_ppc64le::GetRegisterName(unsigned reg) { 175 assert(reg < k_num_registers_ppc64le && "Invalid register offset."); 176 return GetRegisterInfo()[reg].name; 177 } 178 179 bool RegisterContextPOSIX_ppc64le::IsRegisterSetAvailable(size_t set_index) { 180 size_t num_sets = k_num_register_sets; 181 182 return (set_index < num_sets); 183 } 184