1 //===-- RegisterInfoPOSIX_arm.cpp ------------------------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===---------------------------------------------------------------------===// 8 9 #include <cassert> 10 #include <stddef.h> 11 #include <vector> 12 13 #include "lldb/lldb-defines.h" 14 #include "llvm/Support/Compiler.h" 15 16 #include "RegisterInfoPOSIX_arm.h" 17 18 using namespace lldb; 19 using namespace lldb_private; 20 21 // Based on RegisterContextDarwin_arm.cpp 22 #define GPR_OFFSET(idx) ((idx)*4) 23 #define FPU_OFFSET(idx) ((idx)*4 + sizeof(RegisterInfoPOSIX_arm::GPR)) 24 #define FPSCR_OFFSET \ 25 (LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm::FPU, fpscr) + \ 26 sizeof(RegisterInfoPOSIX_arm::GPR)) 27 #define EXC_OFFSET(idx) \ 28 ((idx)*4 + sizeof(RegisterInfoPOSIX_arm::GPR) + \ 29 sizeof(RegisterInfoPOSIX_arm::FPU)) 30 #define DBG_OFFSET(reg) \ 31 ((LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm::DBG, reg) + \ 32 sizeof(RegisterInfoPOSIX_arm::GPR) + sizeof(RegisterInfoPOSIX_arm::FPU) + \ 33 sizeof(RegisterInfoPOSIX_arm::EXC))) 34 35 #define DEFINE_DBG(reg, i) \ 36 #reg, NULL, sizeof(((RegisterInfoPOSIX_arm::DBG *) NULL)->reg[i]), \ 37 DBG_OFFSET(reg[i]), eEncodingUint, eFormatHex, \ 38 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 39 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 40 dbg_##reg##i }, \ 41 NULL, NULL, NULL, 0 42 #define REG_CONTEXT_SIZE \ 43 (sizeof(RegisterInfoPOSIX_arm::GPR) + sizeof(RegisterInfoPOSIX_arm::FPU) + \ 44 sizeof(RegisterInfoPOSIX_arm::EXC)) 45 46 // Include RegisterInfos_arm to declare our g_register_infos_arm structure. 47 #define DECLARE_REGISTER_INFOS_ARM_STRUCT 48 #include "RegisterInfos_arm.h" 49 #undef DECLARE_REGISTER_INFOS_ARM_STRUCT 50 51 static const lldb_private::RegisterInfo * 52 GetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch) { 53 switch (target_arch.GetMachine()) { 54 case llvm::Triple::arm: 55 return g_register_infos_arm; 56 default: 57 assert(false && "Unhandled target architecture."); 58 return nullptr; 59 } 60 } 61 62 static uint32_t 63 GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch) { 64 switch (target_arch.GetMachine()) { 65 case llvm::Triple::arm: 66 return static_cast<uint32_t>(sizeof(g_register_infos_arm) / 67 sizeof(g_register_infos_arm[0])); 68 default: 69 assert(false && "Unhandled target architecture."); 70 return 0; 71 } 72 } 73 74 RegisterInfoPOSIX_arm::RegisterInfoPOSIX_arm( 75 const lldb_private::ArchSpec &target_arch) 76 : lldb_private::RegisterInfoInterface(target_arch), 77 m_register_info_p(GetRegisterInfoPtr(target_arch)), 78 m_register_info_count(GetRegisterInfoCount(target_arch)) {} 79 80 size_t RegisterInfoPOSIX_arm::GetGPRSize() const { 81 return sizeof(struct RegisterInfoPOSIX_arm::GPR); 82 } 83 84 const lldb_private::RegisterInfo * 85 RegisterInfoPOSIX_arm::GetRegisterInfo() const { 86 return m_register_info_p; 87 } 88 89 uint32_t RegisterInfoPOSIX_arm::GetRegisterCount() const { 90 return m_register_info_count; 91 } 92