1 //===-- RegisterInfos_ppc64le.h ---------------------------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #ifdef DECLARE_REGISTER_INFOS_PPC64LE_STRUCT 10 11 #include <cstddef> 12 13 // Computes the offset of the given GPR in the user data area. 14 #define GPR_OFFSET(regname) (offsetof(GPR, regname)) 15 #define FPR_OFFSET(regname) (offsetof(FPR, regname) + sizeof(GPR)) 16 #define VMX_OFFSET(regname) (offsetof(VMX, regname) + sizeof(GPR) + sizeof(FPR)) 17 #define VSX_OFFSET(regname) \ 18 (offsetof(VSX, regname) + sizeof(GPR) + sizeof(FPR) + sizeof(VMX)) 19 #define GPR_SIZE(regname) (sizeof(((GPR *)NULL)->regname)) 20 21 #include "Utility/PPC64LE_DWARF_Registers.h" 22 #include "lldb-ppc64le-register-enums.h" 23 24 // Note that the size and offset will be updated by platform-specific classes. 25 #define DEFINE_GPR(reg, alt, lldb_kind) \ 26 { \ 27 #reg, alt, GPR_SIZE(reg), GPR_OFFSET(reg), lldb::eEncodingUint, \ 28 lldb::eFormatHex, \ 29 {ppc64le_dwarf::dwarf_##reg##_ppc64le,\ 30 ppc64le_dwarf::dwarf_##reg##_ppc64le,\ 31 lldb_kind, \ 32 LLDB_INVALID_REGNUM, \ 33 gpr_##reg##_ppc64le }, \ 34 NULL, NULL, NULL, \ 35 } 36 #define DEFINE_FPR(reg, alt, lldb_kind) \ 37 { \ 38 #reg, alt, 8, FPR_OFFSET(reg), lldb::eEncodingIEEE754, lldb::eFormatFloat, \ 39 {ppc64le_dwarf::dwarf_##reg##_ppc64le, \ 40 ppc64le_dwarf::dwarf_##reg##_ppc64le, lldb_kind, LLDB_INVALID_REGNUM, \ 41 fpr_##reg##_ppc64le }, \ 42 NULL, NULL, NULL, \ 43 } 44 #define DEFINE_VMX(reg, lldb_kind) \ 45 { \ 46 #reg, NULL, 16, VMX_OFFSET(reg), lldb::eEncodingVector, \ 47 lldb::eFormatVectorOfUInt32, \ 48 {ppc64le_dwarf::dwarf_##reg##_ppc64le, \ 49 ppc64le_dwarf::dwarf_##reg##_ppc64le, lldb_kind, LLDB_INVALID_REGNUM, \ 50 vmx_##reg##_ppc64le }, \ 51 NULL, NULL, NULL, \ 52 } 53 #define DEFINE_VSX(reg, lldb_kind) \ 54 { \ 55 #reg, NULL, 16, VSX_OFFSET(reg), lldb::eEncodingVector, \ 56 lldb::eFormatVectorOfUInt32, \ 57 {ppc64le_dwarf::dwarf_##reg##_ppc64le, \ 58 ppc64le_dwarf::dwarf_##reg##_ppc64le, lldb_kind, LLDB_INVALID_REGNUM, \ 59 vsx_##reg##_ppc64le }, \ 60 NULL, NULL, NULL, \ 61 } 62 63 // General purpose registers. 64 // EH_Frame, Generic, Process Plugin 65 #define POWERPC_REGS \ 66 DEFINE_GPR(r0, NULL, LLDB_INVALID_REGNUM) \ 67 , DEFINE_GPR(r1, NULL, LLDB_REGNUM_GENERIC_SP), \ 68 DEFINE_GPR(r2, NULL, LLDB_INVALID_REGNUM), \ 69 DEFINE_GPR(r3, NULL, LLDB_REGNUM_GENERIC_ARG1), \ 70 DEFINE_GPR(r4, NULL, LLDB_REGNUM_GENERIC_ARG2), \ 71 DEFINE_GPR(r5, NULL, LLDB_REGNUM_GENERIC_ARG3), \ 72 DEFINE_GPR(r6, NULL, LLDB_REGNUM_GENERIC_ARG4), \ 73 DEFINE_GPR(r7, NULL, LLDB_REGNUM_GENERIC_ARG5), \ 74 DEFINE_GPR(r8, NULL, LLDB_REGNUM_GENERIC_ARG6), \ 75 DEFINE_GPR(r9, NULL, LLDB_REGNUM_GENERIC_ARG7), \ 76 DEFINE_GPR(r10, NULL, LLDB_REGNUM_GENERIC_ARG8), \ 77 DEFINE_GPR(r11, NULL, LLDB_INVALID_REGNUM), \ 78 DEFINE_GPR(r12, NULL, LLDB_INVALID_REGNUM), \ 79 DEFINE_GPR(r13, NULL, LLDB_INVALID_REGNUM), \ 80 DEFINE_GPR(r14, NULL, LLDB_INVALID_REGNUM), \ 81 DEFINE_GPR(r15, NULL, LLDB_INVALID_REGNUM), \ 82 DEFINE_GPR(r16, NULL, LLDB_INVALID_REGNUM), \ 83 DEFINE_GPR(r17, NULL, LLDB_INVALID_REGNUM), \ 84 DEFINE_GPR(r18, NULL, LLDB_INVALID_REGNUM), \ 85 DEFINE_GPR(r19, NULL, LLDB_INVALID_REGNUM), \ 86 DEFINE_GPR(r20, NULL, LLDB_INVALID_REGNUM), \ 87 DEFINE_GPR(r21, NULL, LLDB_INVALID_REGNUM), \ 88 DEFINE_GPR(r22, NULL, LLDB_INVALID_REGNUM), \ 89 DEFINE_GPR(r23, NULL, LLDB_INVALID_REGNUM), \ 90 DEFINE_GPR(r24, NULL, LLDB_INVALID_REGNUM), \ 91 DEFINE_GPR(r25, NULL, LLDB_INVALID_REGNUM), \ 92 DEFINE_GPR(r26, NULL, LLDB_INVALID_REGNUM), \ 93 DEFINE_GPR(r27, NULL, LLDB_INVALID_REGNUM), \ 94 DEFINE_GPR(r28, NULL, LLDB_INVALID_REGNUM), \ 95 DEFINE_GPR(r29, NULL, LLDB_INVALID_REGNUM), \ 96 DEFINE_GPR(r30, NULL, LLDB_INVALID_REGNUM), \ 97 DEFINE_GPR(r31, NULL, LLDB_INVALID_REGNUM), \ 98 DEFINE_GPR(pc, NULL, LLDB_REGNUM_GENERIC_PC), \ 99 DEFINE_GPR(msr, NULL, LLDB_INVALID_REGNUM), \ 100 DEFINE_GPR(origr3, "orig_r3", LLDB_INVALID_REGNUM), \ 101 DEFINE_GPR(ctr, NULL, LLDB_INVALID_REGNUM), \ 102 DEFINE_GPR(lr, NULL, LLDB_REGNUM_GENERIC_RA), \ 103 DEFINE_GPR(xer, NULL, LLDB_INVALID_REGNUM), \ 104 DEFINE_GPR(cr, NULL, LLDB_REGNUM_GENERIC_FLAGS), \ 105 DEFINE_GPR(softe, NULL, LLDB_INVALID_REGNUM), \ 106 DEFINE_GPR(trap, NULL, LLDB_INVALID_REGNUM), \ 107 DEFINE_FPR(f0, NULL, LLDB_INVALID_REGNUM), \ 108 DEFINE_FPR(f1, NULL, LLDB_INVALID_REGNUM), \ 109 DEFINE_FPR(f2, NULL, LLDB_INVALID_REGNUM), \ 110 DEFINE_FPR(f3, NULL, LLDB_INVALID_REGNUM), \ 111 DEFINE_FPR(f4, NULL, LLDB_INVALID_REGNUM), \ 112 DEFINE_FPR(f5, NULL, LLDB_INVALID_REGNUM), \ 113 DEFINE_FPR(f6, NULL, LLDB_INVALID_REGNUM), \ 114 DEFINE_FPR(f7, NULL, LLDB_INVALID_REGNUM), \ 115 DEFINE_FPR(f8, NULL, LLDB_INVALID_REGNUM), \ 116 DEFINE_FPR(f9, NULL, LLDB_INVALID_REGNUM), \ 117 DEFINE_FPR(f10, NULL, LLDB_INVALID_REGNUM), \ 118 DEFINE_FPR(f11, NULL, LLDB_INVALID_REGNUM), \ 119 DEFINE_FPR(f12, NULL, LLDB_INVALID_REGNUM), \ 120 DEFINE_FPR(f13, NULL, LLDB_INVALID_REGNUM), \ 121 DEFINE_FPR(f14, NULL, LLDB_INVALID_REGNUM), \ 122 DEFINE_FPR(f15, NULL, LLDB_INVALID_REGNUM), \ 123 DEFINE_FPR(f16, NULL, LLDB_INVALID_REGNUM), \ 124 DEFINE_FPR(f17, NULL, LLDB_INVALID_REGNUM), \ 125 DEFINE_FPR(f18, NULL, LLDB_INVALID_REGNUM), \ 126 DEFINE_FPR(f19, NULL, LLDB_INVALID_REGNUM), \ 127 DEFINE_FPR(f20, NULL, LLDB_INVALID_REGNUM), \ 128 DEFINE_FPR(f21, NULL, LLDB_INVALID_REGNUM), \ 129 DEFINE_FPR(f22, NULL, LLDB_INVALID_REGNUM), \ 130 DEFINE_FPR(f23, NULL, LLDB_INVALID_REGNUM), \ 131 DEFINE_FPR(f24, NULL, LLDB_INVALID_REGNUM), \ 132 DEFINE_FPR(f25, NULL, LLDB_INVALID_REGNUM), \ 133 DEFINE_FPR(f26, NULL, LLDB_INVALID_REGNUM), \ 134 DEFINE_FPR(f27, NULL, LLDB_INVALID_REGNUM), \ 135 DEFINE_FPR(f28, NULL, LLDB_INVALID_REGNUM), \ 136 DEFINE_FPR(f29, NULL, LLDB_INVALID_REGNUM), \ 137 DEFINE_FPR(f30, NULL, LLDB_INVALID_REGNUM), \ 138 DEFINE_FPR(f31, NULL, LLDB_INVALID_REGNUM), \ 139 {"fpscr", \ 140 NULL, \ 141 8, \ 142 FPR_OFFSET(fpscr), \ 143 lldb::eEncodingUint, \ 144 lldb::eFormatHex, \ 145 {ppc64le_dwarf::dwarf_fpscr_ppc64le, \ 146 ppc64le_dwarf::dwarf_fpscr_ppc64le, LLDB_INVALID_REGNUM, \ 147 LLDB_INVALID_REGNUM, fpr_fpscr_ppc64le}, \ 148 NULL, \ 149 NULL, \ 150 NULL, \ 151 }, \ 152 DEFINE_VMX(vr0, LLDB_INVALID_REGNUM), \ 153 DEFINE_VMX(vr1, LLDB_INVALID_REGNUM), \ 154 DEFINE_VMX(vr2, LLDB_INVALID_REGNUM), \ 155 DEFINE_VMX(vr3, LLDB_INVALID_REGNUM), \ 156 DEFINE_VMX(vr4, LLDB_INVALID_REGNUM), \ 157 DEFINE_VMX(vr5, LLDB_INVALID_REGNUM), \ 158 DEFINE_VMX(vr6, LLDB_INVALID_REGNUM), \ 159 DEFINE_VMX(vr7, LLDB_INVALID_REGNUM), \ 160 DEFINE_VMX(vr8, LLDB_INVALID_REGNUM), \ 161 DEFINE_VMX(vr9, LLDB_INVALID_REGNUM), \ 162 DEFINE_VMX(vr10, LLDB_INVALID_REGNUM), \ 163 DEFINE_VMX(vr11, LLDB_INVALID_REGNUM), \ 164 DEFINE_VMX(vr12, LLDB_INVALID_REGNUM), \ 165 DEFINE_VMX(vr13, LLDB_INVALID_REGNUM), \ 166 DEFINE_VMX(vr14, LLDB_INVALID_REGNUM), \ 167 DEFINE_VMX(vr15, LLDB_INVALID_REGNUM), \ 168 DEFINE_VMX(vr16, LLDB_INVALID_REGNUM), \ 169 DEFINE_VMX(vr17, LLDB_INVALID_REGNUM), \ 170 DEFINE_VMX(vr18, LLDB_INVALID_REGNUM), \ 171 DEFINE_VMX(vr19, LLDB_INVALID_REGNUM), \ 172 DEFINE_VMX(vr20, LLDB_INVALID_REGNUM), \ 173 DEFINE_VMX(vr21, LLDB_INVALID_REGNUM), \ 174 DEFINE_VMX(vr22, LLDB_INVALID_REGNUM), \ 175 DEFINE_VMX(vr23, LLDB_INVALID_REGNUM), \ 176 DEFINE_VMX(vr24, LLDB_INVALID_REGNUM), \ 177 DEFINE_VMX(vr25, LLDB_INVALID_REGNUM), \ 178 DEFINE_VMX(vr26, LLDB_INVALID_REGNUM), \ 179 DEFINE_VMX(vr27, LLDB_INVALID_REGNUM), \ 180 DEFINE_VMX(vr28, LLDB_INVALID_REGNUM), \ 181 DEFINE_VMX(vr29, LLDB_INVALID_REGNUM), \ 182 DEFINE_VMX(vr30, LLDB_INVALID_REGNUM), \ 183 DEFINE_VMX(vr31, LLDB_INVALID_REGNUM), \ 184 {"vscr", \ 185 NULL, \ 186 4, \ 187 VMX_OFFSET(vscr), \ 188 lldb::eEncodingUint, \ 189 lldb::eFormatHex, \ 190 {ppc64le_dwarf::dwarf_vscr_ppc64le, ppc64le_dwarf::dwarf_vscr_ppc64le, \ 191 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, vmx_vscr_ppc64le}, \ 192 NULL, \ 193 NULL, \ 194 NULL, \ 195 }, \ 196 {"vrsave", \ 197 NULL, \ 198 4, \ 199 VMX_OFFSET(vrsave), \ 200 lldb::eEncodingUint, \ 201 lldb::eFormatHex, \ 202 {ppc64le_dwarf::dwarf_vrsave_ppc64le, \ 203 ppc64le_dwarf::dwarf_vrsave_ppc64le, LLDB_INVALID_REGNUM, \ 204 LLDB_INVALID_REGNUM, vmx_vrsave_ppc64le}, \ 205 NULL, \ 206 NULL, \ 207 NULL, \ 208 }, \ 209 DEFINE_VSX(vs0, LLDB_INVALID_REGNUM), \ 210 DEFINE_VSX(vs1, LLDB_INVALID_REGNUM), \ 211 DEFINE_VSX(vs2, LLDB_INVALID_REGNUM), \ 212 DEFINE_VSX(vs3, LLDB_INVALID_REGNUM), \ 213 DEFINE_VSX(vs4, LLDB_INVALID_REGNUM), \ 214 DEFINE_VSX(vs5, LLDB_INVALID_REGNUM), \ 215 DEFINE_VSX(vs6, LLDB_INVALID_REGNUM), \ 216 DEFINE_VSX(vs7, LLDB_INVALID_REGNUM), \ 217 DEFINE_VSX(vs8, LLDB_INVALID_REGNUM), \ 218 DEFINE_VSX(vs9, LLDB_INVALID_REGNUM), \ 219 DEFINE_VSX(vs10, LLDB_INVALID_REGNUM), \ 220 DEFINE_VSX(vs11, LLDB_INVALID_REGNUM), \ 221 DEFINE_VSX(vs12, LLDB_INVALID_REGNUM), \ 222 DEFINE_VSX(vs13, LLDB_INVALID_REGNUM), \ 223 DEFINE_VSX(vs14, LLDB_INVALID_REGNUM), \ 224 DEFINE_VSX(vs15, LLDB_INVALID_REGNUM), \ 225 DEFINE_VSX(vs16, LLDB_INVALID_REGNUM), \ 226 DEFINE_VSX(vs17, LLDB_INVALID_REGNUM), \ 227 DEFINE_VSX(vs18, LLDB_INVALID_REGNUM), \ 228 DEFINE_VSX(vs19, LLDB_INVALID_REGNUM), \ 229 DEFINE_VSX(vs20, LLDB_INVALID_REGNUM), \ 230 DEFINE_VSX(vs21, LLDB_INVALID_REGNUM), \ 231 DEFINE_VSX(vs22, LLDB_INVALID_REGNUM), \ 232 DEFINE_VSX(vs23, LLDB_INVALID_REGNUM), \ 233 DEFINE_VSX(vs24, LLDB_INVALID_REGNUM), \ 234 DEFINE_VSX(vs25, LLDB_INVALID_REGNUM), \ 235 DEFINE_VSX(vs26, LLDB_INVALID_REGNUM), \ 236 DEFINE_VSX(vs27, LLDB_INVALID_REGNUM), \ 237 DEFINE_VSX(vs28, LLDB_INVALID_REGNUM), \ 238 DEFINE_VSX(vs29, LLDB_INVALID_REGNUM), \ 239 DEFINE_VSX(vs30, LLDB_INVALID_REGNUM), \ 240 DEFINE_VSX(vs31, LLDB_INVALID_REGNUM), \ 241 DEFINE_VSX(vs32, LLDB_INVALID_REGNUM), \ 242 DEFINE_VSX(vs33, LLDB_INVALID_REGNUM), \ 243 DEFINE_VSX(vs34, LLDB_INVALID_REGNUM), \ 244 DEFINE_VSX(vs35, LLDB_INVALID_REGNUM), \ 245 DEFINE_VSX(vs36, LLDB_INVALID_REGNUM), \ 246 DEFINE_VSX(vs37, LLDB_INVALID_REGNUM), \ 247 DEFINE_VSX(vs38, LLDB_INVALID_REGNUM), \ 248 DEFINE_VSX(vs39, LLDB_INVALID_REGNUM), \ 249 DEFINE_VSX(vs40, LLDB_INVALID_REGNUM), \ 250 DEFINE_VSX(vs41, LLDB_INVALID_REGNUM), \ 251 DEFINE_VSX(vs42, LLDB_INVALID_REGNUM), \ 252 DEFINE_VSX(vs43, LLDB_INVALID_REGNUM), \ 253 DEFINE_VSX(vs44, LLDB_INVALID_REGNUM), \ 254 DEFINE_VSX(vs45, LLDB_INVALID_REGNUM), \ 255 DEFINE_VSX(vs46, LLDB_INVALID_REGNUM), \ 256 DEFINE_VSX(vs47, LLDB_INVALID_REGNUM), \ 257 DEFINE_VSX(vs48, LLDB_INVALID_REGNUM), \ 258 DEFINE_VSX(vs49, LLDB_INVALID_REGNUM), \ 259 DEFINE_VSX(vs50, LLDB_INVALID_REGNUM), \ 260 DEFINE_VSX(vs51, LLDB_INVALID_REGNUM), \ 261 DEFINE_VSX(vs52, LLDB_INVALID_REGNUM), \ 262 DEFINE_VSX(vs53, LLDB_INVALID_REGNUM), \ 263 DEFINE_VSX(vs54, LLDB_INVALID_REGNUM), \ 264 DEFINE_VSX(vs55, LLDB_INVALID_REGNUM), \ 265 DEFINE_VSX(vs56, LLDB_INVALID_REGNUM), \ 266 DEFINE_VSX(vs57, LLDB_INVALID_REGNUM), \ 267 DEFINE_VSX(vs58, LLDB_INVALID_REGNUM), \ 268 DEFINE_VSX(vs59, LLDB_INVALID_REGNUM), \ 269 DEFINE_VSX(vs50, LLDB_INVALID_REGNUM), \ 270 DEFINE_VSX(vs61, LLDB_INVALID_REGNUM), \ 271 DEFINE_VSX(vs62, LLDB_INVALID_REGNUM), \ 272 DEFINE_VSX(vs63, LLDB_INVALID_REGNUM), /* */ 273 274 typedef struct _GPR { 275 uint64_t r0; 276 uint64_t r1; 277 uint64_t r2; 278 uint64_t r3; 279 uint64_t r4; 280 uint64_t r5; 281 uint64_t r6; 282 uint64_t r7; 283 uint64_t r8; 284 uint64_t r9; 285 uint64_t r10; 286 uint64_t r11; 287 uint64_t r12; 288 uint64_t r13; 289 uint64_t r14; 290 uint64_t r15; 291 uint64_t r16; 292 uint64_t r17; 293 uint64_t r18; 294 uint64_t r19; 295 uint64_t r20; 296 uint64_t r21; 297 uint64_t r22; 298 uint64_t r23; 299 uint64_t r24; 300 uint64_t r25; 301 uint64_t r26; 302 uint64_t r27; 303 uint64_t r28; 304 uint64_t r29; 305 uint64_t r30; 306 uint64_t r31; 307 uint64_t pc; 308 uint64_t msr; 309 uint64_t origr3; 310 uint64_t ctr; 311 uint64_t lr; 312 uint64_t xer; 313 uint64_t cr; 314 uint64_t softe; 315 uint64_t trap; 316 uint64_t pad[3]; 317 } GPR; 318 319 typedef struct _FPR { 320 uint64_t f0; 321 uint64_t f1; 322 uint64_t f2; 323 uint64_t f3; 324 uint64_t f4; 325 uint64_t f5; 326 uint64_t f6; 327 uint64_t f7; 328 uint64_t f8; 329 uint64_t f9; 330 uint64_t f10; 331 uint64_t f11; 332 uint64_t f12; 333 uint64_t f13; 334 uint64_t f14; 335 uint64_t f15; 336 uint64_t f16; 337 uint64_t f17; 338 uint64_t f18; 339 uint64_t f19; 340 uint64_t f20; 341 uint64_t f21; 342 uint64_t f22; 343 uint64_t f23; 344 uint64_t f24; 345 uint64_t f25; 346 uint64_t f26; 347 uint64_t f27; 348 uint64_t f28; 349 uint64_t f29; 350 uint64_t f30; 351 uint64_t f31; 352 uint64_t fpscr; 353 } FPR; 354 355 typedef struct _VMX { 356 uint32_t vr0[4]; 357 uint32_t vr1[4]; 358 uint32_t vr2[4]; 359 uint32_t vr3[4]; 360 uint32_t vr4[4]; 361 uint32_t vr5[4]; 362 uint32_t vr6[4]; 363 uint32_t vr7[4]; 364 uint32_t vr8[4]; 365 uint32_t vr9[4]; 366 uint32_t vr10[4]; 367 uint32_t vr11[4]; 368 uint32_t vr12[4]; 369 uint32_t vr13[4]; 370 uint32_t vr14[4]; 371 uint32_t vr15[4]; 372 uint32_t vr16[4]; 373 uint32_t vr17[4]; 374 uint32_t vr18[4]; 375 uint32_t vr19[4]; 376 uint32_t vr20[4]; 377 uint32_t vr21[4]; 378 uint32_t vr22[4]; 379 uint32_t vr23[4]; 380 uint32_t vr24[4]; 381 uint32_t vr25[4]; 382 uint32_t vr26[4]; 383 uint32_t vr27[4]; 384 uint32_t vr28[4]; 385 uint32_t vr29[4]; 386 uint32_t vr30[4]; 387 uint32_t vr31[4]; 388 uint32_t pad[2]; 389 uint32_t vscr[2]; 390 uint32_t vrsave; 391 } VMX; 392 393 typedef struct _VSX { 394 uint32_t vs0[4]; 395 uint32_t vs1[4]; 396 uint32_t vs2[4]; 397 uint32_t vs3[4]; 398 uint32_t vs4[4]; 399 uint32_t vs5[4]; 400 uint32_t vs6[4]; 401 uint32_t vs7[4]; 402 uint32_t vs8[4]; 403 uint32_t vs9[4]; 404 uint32_t vs10[4]; 405 uint32_t vs11[4]; 406 uint32_t vs12[4]; 407 uint32_t vs13[4]; 408 uint32_t vs14[4]; 409 uint32_t vs15[4]; 410 uint32_t vs16[4]; 411 uint32_t vs17[4]; 412 uint32_t vs18[4]; 413 uint32_t vs19[4]; 414 uint32_t vs20[4]; 415 uint32_t vs21[4]; 416 uint32_t vs22[4]; 417 uint32_t vs23[4]; 418 uint32_t vs24[4]; 419 uint32_t vs25[4]; 420 uint32_t vs26[4]; 421 uint32_t vs27[4]; 422 uint32_t vs28[4]; 423 uint32_t vs29[4]; 424 uint32_t vs30[4]; 425 uint32_t vs31[4]; 426 uint32_t vs32[4]; 427 uint32_t vs33[4]; 428 uint32_t vs34[4]; 429 uint32_t vs35[4]; 430 uint32_t vs36[4]; 431 uint32_t vs37[4]; 432 uint32_t vs38[4]; 433 uint32_t vs39[4]; 434 uint32_t vs40[4]; 435 uint32_t vs41[4]; 436 uint32_t vs42[4]; 437 uint32_t vs43[4]; 438 uint32_t vs44[4]; 439 uint32_t vs45[4]; 440 uint32_t vs46[4]; 441 uint32_t vs47[4]; 442 uint32_t vs48[4]; 443 uint32_t vs49[4]; 444 uint32_t vs50[4]; 445 uint32_t vs51[4]; 446 uint32_t vs52[4]; 447 uint32_t vs53[4]; 448 uint32_t vs54[4]; 449 uint32_t vs55[4]; 450 uint32_t vs56[4]; 451 uint32_t vs57[4]; 452 uint32_t vs58[4]; 453 uint32_t vs59[4]; 454 uint32_t vs60[4]; 455 uint32_t vs61[4]; 456 uint32_t vs62[4]; 457 uint32_t vs63[4]; 458 } VSX; 459 460 static lldb_private::RegisterInfo g_register_infos_ppc64le[] = { 461 POWERPC_REGS 462 }; 463 464 static_assert((sizeof(g_register_infos_ppc64le) / 465 sizeof(g_register_infos_ppc64le[0])) == 466 k_num_registers_ppc64le, 467 "g_register_infos_powerpc64 has wrong number of register infos"); 468 469 #undef DEFINE_FPR 470 #undef DEFINE_GPR 471 #undef DEFINE_VMX 472 #undef DEFINE_VSX 473 474 #endif // DECLARE_REGISTER_INFOS_PPC64LE_STRUCT 475