10b57cec5SDimitry Andric //===-- RegisterInfos_s390x.h -----------------------------------*- C++ -*-===// 20b57cec5SDimitry Andric // 30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric // 70b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric 9fe6060f1SDimitry Andric #include <cstddef> 100b57cec5SDimitry Andric 110b57cec5SDimitry Andric #include "llvm/Support/Compiler.h" 120b57cec5SDimitry Andric 130b57cec5SDimitry Andric 140b57cec5SDimitry Andric #ifdef DECLARE_REGISTER_INFOS_S390X_STRUCT 150b57cec5SDimitry Andric 160b57cec5SDimitry Andric // Computes the offset of the given GPR in the user data area. 170b57cec5SDimitry Andric #define GPR_OFFSET(num) (16 + 8 * num) 180b57cec5SDimitry Andric // Computes the offset of the given ACR in the user data area. 190b57cec5SDimitry Andric #define ACR_OFFSET(num) (16 + 8 * 16 + 4 * num) 200b57cec5SDimitry Andric // Computes the offset of the given FPR in the extended data area. 210b57cec5SDimitry Andric #define FPR_OFFSET(num) (8 + 8 * num) 220b57cec5SDimitry Andric 230b57cec5SDimitry Andric // RegisterKind: EHFrame, DWARF, Generic, Process Plugin, LLDB 240b57cec5SDimitry Andric 250b57cec5SDimitry Andric #define DEFINE_GPR(name, size, offset, alt, generic) \ 260b57cec5SDimitry Andric { \ 270b57cec5SDimitry Andric #name, alt, size, offset, eEncodingUint, eFormatHex, \ 280b57cec5SDimitry Andric {dwarf_##name##_s390x, dwarf_##name##_s390x, generic, \ 290b57cec5SDimitry Andric LLDB_INVALID_REGNUM, lldb_##name##_s390x }, \ 3006c3fb27SDimitry Andric NULL, NULL, NULL, \ 310b57cec5SDimitry Andric } 320b57cec5SDimitry Andric 330b57cec5SDimitry Andric #define DEFINE_GPR_NODWARF(name, size, offset, alt, generic) \ 340b57cec5SDimitry Andric { \ 350b57cec5SDimitry Andric #name, alt, size, offset, eEncodingUint, eFormatHex, \ 360b57cec5SDimitry Andric {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, generic, \ 370b57cec5SDimitry Andric LLDB_INVALID_REGNUM, lldb_##name##_s390x }, \ 3806c3fb27SDimitry Andric NULL, NULL, NULL, \ 390b57cec5SDimitry Andric } 400b57cec5SDimitry Andric 410b57cec5SDimitry Andric #define DEFINE_FPR(name, size, offset) \ 420b57cec5SDimitry Andric { \ 430b57cec5SDimitry Andric #name, NULL, size, offset, eEncodingUint, eFormatHex, \ 440b57cec5SDimitry Andric {dwarf_##name##_s390x, dwarf_##name##_s390x, LLDB_INVALID_REGNUM, \ 450b57cec5SDimitry Andric LLDB_INVALID_REGNUM, lldb_##name##_s390x }, \ 4606c3fb27SDimitry Andric NULL, NULL, NULL, \ 470b57cec5SDimitry Andric } 480b57cec5SDimitry Andric 490b57cec5SDimitry Andric #define DEFINE_FPR_NODWARF(name, size, offset) \ 500b57cec5SDimitry Andric { \ 510b57cec5SDimitry Andric #name, NULL, size, offset, eEncodingUint, eFormatHex, \ 520b57cec5SDimitry Andric {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 530b57cec5SDimitry Andric LLDB_INVALID_REGNUM, lldb_##name##_s390x }, \ 5406c3fb27SDimitry Andric NULL, NULL, NULL, \ 550b57cec5SDimitry Andric } 560b57cec5SDimitry Andric 570b57cec5SDimitry Andric static RegisterInfo g_register_infos_s390x[] = { 580b57cec5SDimitry Andric // General purpose registers. 590b57cec5SDimitry Andric DEFINE_GPR(r0, 8, GPR_OFFSET(0), nullptr, LLDB_INVALID_REGNUM), 600b57cec5SDimitry Andric DEFINE_GPR(r1, 8, GPR_OFFSET(1), nullptr, LLDB_INVALID_REGNUM), 61349cc55cSDimitry Andric DEFINE_GPR(r2, 8, GPR_OFFSET(2), nullptr, LLDB_REGNUM_GENERIC_ARG1), 62349cc55cSDimitry Andric DEFINE_GPR(r3, 8, GPR_OFFSET(3), nullptr, LLDB_REGNUM_GENERIC_ARG2), 63349cc55cSDimitry Andric DEFINE_GPR(r4, 8, GPR_OFFSET(4), nullptr, LLDB_REGNUM_GENERIC_ARG3), 64349cc55cSDimitry Andric DEFINE_GPR(r5, 8, GPR_OFFSET(5), nullptr, LLDB_REGNUM_GENERIC_ARG4), 65349cc55cSDimitry Andric DEFINE_GPR(r6, 8, GPR_OFFSET(6), nullptr, LLDB_REGNUM_GENERIC_ARG5), 660b57cec5SDimitry Andric DEFINE_GPR(r7, 8, GPR_OFFSET(7), nullptr, LLDB_INVALID_REGNUM), 670b57cec5SDimitry Andric DEFINE_GPR(r8, 8, GPR_OFFSET(8), nullptr, LLDB_INVALID_REGNUM), 680b57cec5SDimitry Andric DEFINE_GPR(r9, 8, GPR_OFFSET(9), nullptr, LLDB_INVALID_REGNUM), 690b57cec5SDimitry Andric DEFINE_GPR(r10, 8, GPR_OFFSET(10), nullptr, LLDB_INVALID_REGNUM), 70349cc55cSDimitry Andric DEFINE_GPR(r11, 8, GPR_OFFSET(11), nullptr, LLDB_REGNUM_GENERIC_FP), 710b57cec5SDimitry Andric DEFINE_GPR(r12, 8, GPR_OFFSET(12), nullptr, LLDB_INVALID_REGNUM), 720b57cec5SDimitry Andric DEFINE_GPR(r13, 8, GPR_OFFSET(13), nullptr, LLDB_INVALID_REGNUM), 730b57cec5SDimitry Andric DEFINE_GPR(r14, 8, GPR_OFFSET(14), nullptr, LLDB_INVALID_REGNUM), 74349cc55cSDimitry Andric DEFINE_GPR(r15, 8, GPR_OFFSET(15), nullptr, LLDB_REGNUM_GENERIC_SP), 750b57cec5SDimitry Andric DEFINE_GPR(acr0, 4, ACR_OFFSET(0), nullptr, LLDB_INVALID_REGNUM), 760b57cec5SDimitry Andric DEFINE_GPR(acr1, 4, ACR_OFFSET(1), nullptr, LLDB_INVALID_REGNUM), 770b57cec5SDimitry Andric DEFINE_GPR(acr2, 4, ACR_OFFSET(2), nullptr, LLDB_INVALID_REGNUM), 780b57cec5SDimitry Andric DEFINE_GPR(acr3, 4, ACR_OFFSET(3), nullptr, LLDB_INVALID_REGNUM), 790b57cec5SDimitry Andric DEFINE_GPR(acr4, 4, ACR_OFFSET(4), nullptr, LLDB_INVALID_REGNUM), 800b57cec5SDimitry Andric DEFINE_GPR(acr5, 4, ACR_OFFSET(5), nullptr, LLDB_INVALID_REGNUM), 810b57cec5SDimitry Andric DEFINE_GPR(acr6, 4, ACR_OFFSET(6), nullptr, LLDB_INVALID_REGNUM), 820b57cec5SDimitry Andric DEFINE_GPR(acr7, 4, ACR_OFFSET(7), nullptr, LLDB_INVALID_REGNUM), 830b57cec5SDimitry Andric DEFINE_GPR(acr8, 4, ACR_OFFSET(8), nullptr, LLDB_INVALID_REGNUM), 840b57cec5SDimitry Andric DEFINE_GPR(acr9, 4, ACR_OFFSET(9), nullptr, LLDB_INVALID_REGNUM), 850b57cec5SDimitry Andric DEFINE_GPR(acr10, 4, ACR_OFFSET(10), nullptr, LLDB_INVALID_REGNUM), 860b57cec5SDimitry Andric DEFINE_GPR(acr11, 4, ACR_OFFSET(11), nullptr, LLDB_INVALID_REGNUM), 870b57cec5SDimitry Andric DEFINE_GPR(acr12, 4, ACR_OFFSET(12), nullptr, LLDB_INVALID_REGNUM), 880b57cec5SDimitry Andric DEFINE_GPR(acr13, 4, ACR_OFFSET(13), nullptr, LLDB_INVALID_REGNUM), 890b57cec5SDimitry Andric DEFINE_GPR(acr14, 4, ACR_OFFSET(14), nullptr, LLDB_INVALID_REGNUM), 900b57cec5SDimitry Andric DEFINE_GPR(acr15, 4, ACR_OFFSET(15), nullptr, LLDB_INVALID_REGNUM), 91349cc55cSDimitry Andric DEFINE_GPR(pswm, 8, 0, nullptr, LLDB_REGNUM_GENERIC_FLAGS), 92349cc55cSDimitry Andric DEFINE_GPR(pswa, 8, 8, nullptr, LLDB_REGNUM_GENERIC_PC), 930b57cec5SDimitry Andric 940b57cec5SDimitry Andric // Floating point registers. 950b57cec5SDimitry Andric DEFINE_FPR(f0, 8, FPR_OFFSET(0)), DEFINE_FPR(f1, 8, FPR_OFFSET(1)), 960b57cec5SDimitry Andric DEFINE_FPR(f2, 8, FPR_OFFSET(2)), DEFINE_FPR(f3, 8, FPR_OFFSET(3)), 970b57cec5SDimitry Andric DEFINE_FPR(f4, 8, FPR_OFFSET(4)), DEFINE_FPR(f5, 8, FPR_OFFSET(5)), 980b57cec5SDimitry Andric DEFINE_FPR(f6, 8, FPR_OFFSET(6)), DEFINE_FPR(f7, 8, FPR_OFFSET(7)), 990b57cec5SDimitry Andric DEFINE_FPR(f8, 8, FPR_OFFSET(8)), DEFINE_FPR(f9, 8, FPR_OFFSET(9)), 1000b57cec5SDimitry Andric DEFINE_FPR(f10, 8, FPR_OFFSET(10)), DEFINE_FPR(f11, 8, FPR_OFFSET(11)), 1010b57cec5SDimitry Andric DEFINE_FPR(f12, 8, FPR_OFFSET(12)), DEFINE_FPR(f13, 8, FPR_OFFSET(13)), 1020b57cec5SDimitry Andric DEFINE_FPR(f14, 8, FPR_OFFSET(14)), DEFINE_FPR(f15, 8, FPR_OFFSET(15)), 1030b57cec5SDimitry Andric DEFINE_FPR_NODWARF(fpc, 4, 0), 1040b57cec5SDimitry Andric 1050b57cec5SDimitry Andric // Linux operating-specific info. 1060b57cec5SDimitry Andric DEFINE_GPR_NODWARF(orig_r2, 8, 16 + 16 * 8 + 16 * 4, nullptr, 1070b57cec5SDimitry Andric LLDB_INVALID_REGNUM), 1080b57cec5SDimitry Andric DEFINE_GPR_NODWARF(last_break, 8, 0, nullptr, LLDB_INVALID_REGNUM), 1090b57cec5SDimitry Andric DEFINE_GPR_NODWARF(system_call, 4, 0, nullptr, LLDB_INVALID_REGNUM), 1100b57cec5SDimitry Andric }; 1110b57cec5SDimitry Andric 1120b57cec5SDimitry Andric static_assert((sizeof(g_register_infos_s390x) / 1130b57cec5SDimitry Andric sizeof(g_register_infos_s390x[0])) == k_num_registers_s390x, 1140b57cec5SDimitry Andric "g_register_infos_s390x has wrong number of register infos"); 1150b57cec5SDimitry Andric 1160b57cec5SDimitry Andric #undef GPR_OFFSET 1170b57cec5SDimitry Andric #undef ACR_OFFSET 1180b57cec5SDimitry Andric #undef FPR_OFFSET 1190b57cec5SDimitry Andric #undef DEFINE_GPR 1200b57cec5SDimitry Andric #undef DEFINE_GPR_NODWARF 1210b57cec5SDimitry Andric #undef DEFINE_FPR 1220b57cec5SDimitry Andric #undef DEFINE_FPR_NODWARF 1230b57cec5SDimitry Andric 1240b57cec5SDimitry Andric #endif // DECLARE_REGISTER_INFOS_S390X_STRUCT 125