15ffd83dbSDimitry Andric //===-- RegisterContextPOSIXCore_s390x.cpp --------------------------------===//
20b57cec5SDimitry Andric //
30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
60b57cec5SDimitry Andric //
70b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
80b57cec5SDimitry Andric 
90b57cec5SDimitry Andric #include "RegisterContextPOSIXCore_s390x.h"
100b57cec5SDimitry Andric 
110b57cec5SDimitry Andric #include "lldb/Target/Thread.h"
120b57cec5SDimitry Andric #include "lldb/Utility/DataBufferHeap.h"
130b57cec5SDimitry Andric #include "lldb/Utility/RegisterValue.h"
140b57cec5SDimitry Andric 
150b57cec5SDimitry Andric #include <memory>
160b57cec5SDimitry Andric 
170b57cec5SDimitry Andric using namespace lldb_private;
180b57cec5SDimitry Andric 
RegisterContextCorePOSIX_s390x(Thread & thread,RegisterInfoInterface * register_info,const DataExtractor & gpregset,llvm::ArrayRef<CoreNote> notes)190b57cec5SDimitry Andric RegisterContextCorePOSIX_s390x::RegisterContextCorePOSIX_s390x(
200b57cec5SDimitry Andric     Thread &thread, RegisterInfoInterface *register_info,
210b57cec5SDimitry Andric     const DataExtractor &gpregset, llvm::ArrayRef<CoreNote> notes)
220b57cec5SDimitry Andric     : RegisterContextPOSIX_s390x(thread, 0, register_info) {
230b57cec5SDimitry Andric   m_gpr_buffer = std::make_shared<DataBufferHeap>(gpregset.GetDataStart(),
240b57cec5SDimitry Andric                                                   gpregset.GetByteSize());
250b57cec5SDimitry Andric   m_gpr.SetData(m_gpr_buffer);
260b57cec5SDimitry Andric   m_gpr.SetByteOrder(gpregset.GetByteOrder());
270b57cec5SDimitry Andric 
280b57cec5SDimitry Andric   DataExtractor fpregset = getRegset(
290b57cec5SDimitry Andric       notes, register_info->GetTargetArchitecture().GetTriple(), FPR_Desc);
300b57cec5SDimitry Andric   m_fpr_buffer = std::make_shared<DataBufferHeap>(fpregset.GetDataStart(),
310b57cec5SDimitry Andric                                                   fpregset.GetByteSize());
320b57cec5SDimitry Andric   m_fpr.SetData(m_fpr_buffer);
330b57cec5SDimitry Andric   m_fpr.SetByteOrder(fpregset.GetByteOrder());
340b57cec5SDimitry Andric }
350b57cec5SDimitry Andric 
36fe6060f1SDimitry Andric RegisterContextCorePOSIX_s390x::~RegisterContextCorePOSIX_s390x() = default;
370b57cec5SDimitry Andric 
ReadGPR()380b57cec5SDimitry Andric bool RegisterContextCorePOSIX_s390x::ReadGPR() { return true; }
390b57cec5SDimitry Andric 
ReadFPR()400b57cec5SDimitry Andric bool RegisterContextCorePOSIX_s390x::ReadFPR() { return true; }
410b57cec5SDimitry Andric 
WriteGPR()420b57cec5SDimitry Andric bool RegisterContextCorePOSIX_s390x::WriteGPR() {
430b57cec5SDimitry Andric   assert(0);
440b57cec5SDimitry Andric   return false;
450b57cec5SDimitry Andric }
460b57cec5SDimitry Andric 
WriteFPR()470b57cec5SDimitry Andric bool RegisterContextCorePOSIX_s390x::WriteFPR() {
480b57cec5SDimitry Andric   assert(0);
490b57cec5SDimitry Andric   return false;
500b57cec5SDimitry Andric }
510b57cec5SDimitry Andric 
ReadRegister(const RegisterInfo * reg_info,RegisterValue & value)520b57cec5SDimitry Andric bool RegisterContextCorePOSIX_s390x::ReadRegister(const RegisterInfo *reg_info,
530b57cec5SDimitry Andric                                                   RegisterValue &value) {
540b57cec5SDimitry Andric   const uint32_t reg = reg_info->kinds[lldb::eRegisterKindLLDB];
550b57cec5SDimitry Andric   if (reg == LLDB_INVALID_REGNUM)
560b57cec5SDimitry Andric     return false;
570b57cec5SDimitry Andric 
580b57cec5SDimitry Andric   if (IsGPR(reg)) {
590b57cec5SDimitry Andric     lldb::offset_t offset = reg_info->byte_offset;
600b57cec5SDimitry Andric     uint64_t v = m_gpr.GetMaxU64(&offset, reg_info->byte_size);
610b57cec5SDimitry Andric     if (offset == reg_info->byte_offset + reg_info->byte_size) {
620b57cec5SDimitry Andric       value.SetUInt(v, reg_info->byte_size);
630b57cec5SDimitry Andric       return true;
640b57cec5SDimitry Andric     }
650b57cec5SDimitry Andric   }
660b57cec5SDimitry Andric 
670b57cec5SDimitry Andric   if (IsFPR(reg)) {
680b57cec5SDimitry Andric     lldb::offset_t offset = reg_info->byte_offset;
690b57cec5SDimitry Andric     uint64_t v = m_fpr.GetMaxU64(&offset, reg_info->byte_size);
700b57cec5SDimitry Andric     if (offset == reg_info->byte_offset + reg_info->byte_size) {
710b57cec5SDimitry Andric       value.SetUInt(v, reg_info->byte_size);
720b57cec5SDimitry Andric       return true;
730b57cec5SDimitry Andric     }
740b57cec5SDimitry Andric   }
750b57cec5SDimitry Andric 
760b57cec5SDimitry Andric   return false;
770b57cec5SDimitry Andric }
780b57cec5SDimitry Andric 
ReadAllRegisterValues(lldb::WritableDataBufferSP & data_sp)790b57cec5SDimitry Andric bool RegisterContextCorePOSIX_s390x::ReadAllRegisterValues(
8081ad6265SDimitry Andric     lldb::WritableDataBufferSP &data_sp) {
810b57cec5SDimitry Andric   return false;
820b57cec5SDimitry Andric }
830b57cec5SDimitry Andric 
WriteRegister(const RegisterInfo * reg_info,const RegisterValue & value)840b57cec5SDimitry Andric bool RegisterContextCorePOSIX_s390x::WriteRegister(const RegisterInfo *reg_info,
850b57cec5SDimitry Andric                                                    const RegisterValue &value) {
860b57cec5SDimitry Andric   return false;
870b57cec5SDimitry Andric }
880b57cec5SDimitry Andric 
WriteAllRegisterValues(const lldb::DataBufferSP & data_sp)890b57cec5SDimitry Andric bool RegisterContextCorePOSIX_s390x::WriteAllRegisterValues(
900b57cec5SDimitry Andric     const lldb::DataBufferSP &data_sp) {
910b57cec5SDimitry Andric   return false;
920b57cec5SDimitry Andric }
930b57cec5SDimitry Andric 
HardwareSingleStep(bool enable)940b57cec5SDimitry Andric bool RegisterContextCorePOSIX_s390x::HardwareSingleStep(bool enable) {
950b57cec5SDimitry Andric   return false;
960b57cec5SDimitry Andric }
97