1 //===-- GDBRemoteRegisterContext.cpp --------------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "GDBRemoteRegisterContext.h" 10 11 #include "lldb/Target/ExecutionContext.h" 12 #include "lldb/Target/Target.h" 13 #include "lldb/Utility/DataBufferHeap.h" 14 #include "lldb/Utility/DataExtractor.h" 15 #include "lldb/Utility/RegisterValue.h" 16 #include "lldb/Utility/Scalar.h" 17 #include "lldb/Utility/StreamString.h" 18 #include "ProcessGDBRemote.h" 19 #include "ProcessGDBRemoteLog.h" 20 #include "ThreadGDBRemote.h" 21 #include "Utility/ARM_DWARF_Registers.h" 22 #include "Utility/ARM_ehframe_Registers.h" 23 #include "lldb/Utility/StringExtractorGDBRemote.h" 24 25 #include <memory> 26 27 using namespace lldb; 28 using namespace lldb_private; 29 using namespace lldb_private::process_gdb_remote; 30 31 // GDBRemoteRegisterContext constructor 32 GDBRemoteRegisterContext::GDBRemoteRegisterContext( 33 ThreadGDBRemote &thread, uint32_t concrete_frame_idx, 34 GDBRemoteDynamicRegisterInfoSP reg_info_sp, bool read_all_at_once, 35 bool write_all_at_once) 36 : RegisterContext(thread, concrete_frame_idx), 37 m_reg_info_sp(std::move(reg_info_sp)), m_reg_valid(), m_reg_data(), 38 m_read_all_at_once(read_all_at_once), 39 m_write_all_at_once(write_all_at_once), m_gpacket_cached(false) { 40 // Resize our vector of bools to contain one bool for every register. We will 41 // use these boolean values to know when a register value is valid in 42 // m_reg_data. 43 m_reg_valid.resize(m_reg_info_sp->GetNumRegisters()); 44 45 // Make a heap based buffer that is big enough to store all registers 46 DataBufferSP reg_data_sp( 47 new DataBufferHeap(m_reg_info_sp->GetRegisterDataByteSize(), 0)); 48 m_reg_data.SetData(reg_data_sp); 49 m_reg_data.SetByteOrder(thread.GetProcess()->GetByteOrder()); 50 } 51 52 // Destructor 53 GDBRemoteRegisterContext::~GDBRemoteRegisterContext() = default; 54 55 void GDBRemoteRegisterContext::InvalidateAllRegisters() { 56 SetAllRegisterValid(false); 57 } 58 59 void GDBRemoteRegisterContext::SetAllRegisterValid(bool b) { 60 m_gpacket_cached = b; 61 std::vector<bool>::iterator pos, end = m_reg_valid.end(); 62 for (pos = m_reg_valid.begin(); pos != end; ++pos) 63 *pos = b; 64 } 65 66 size_t GDBRemoteRegisterContext::GetRegisterCount() { 67 return m_reg_info_sp->GetNumRegisters(); 68 } 69 70 const RegisterInfo * 71 GDBRemoteRegisterContext::GetRegisterInfoAtIndex(size_t reg) { 72 RegisterInfo *reg_info = m_reg_info_sp->GetRegisterInfoAtIndex(reg); 73 74 if (reg_info && reg_info->dynamic_size_dwarf_expr_bytes) { 75 const ArchSpec &arch = m_thread.GetProcess()->GetTarget().GetArchitecture(); 76 uint8_t reg_size = UpdateDynamicRegisterSize(arch, reg_info); 77 reg_info->byte_size = reg_size; 78 } 79 return reg_info; 80 } 81 82 size_t GDBRemoteRegisterContext::GetRegisterSetCount() { 83 return m_reg_info_sp->GetNumRegisterSets(); 84 } 85 86 const RegisterSet *GDBRemoteRegisterContext::GetRegisterSet(size_t reg_set) { 87 return m_reg_info_sp->GetRegisterSet(reg_set); 88 } 89 90 bool GDBRemoteRegisterContext::ReadRegister(const RegisterInfo *reg_info, 91 RegisterValue &value) { 92 // Read the register 93 if (ReadRegisterBytes(reg_info, m_reg_data)) { 94 const uint32_t reg = reg_info->kinds[eRegisterKindLLDB]; 95 if (m_reg_valid[reg] == false) 96 return false; 97 const bool partial_data_ok = false; 98 Status error(value.SetValueFromData( 99 reg_info, m_reg_data, reg_info->byte_offset, partial_data_ok)); 100 return error.Success(); 101 } 102 return false; 103 } 104 105 bool GDBRemoteRegisterContext::PrivateSetRegisterValue( 106 uint32_t reg, llvm::ArrayRef<uint8_t> data) { 107 const RegisterInfo *reg_info = GetRegisterInfoAtIndex(reg); 108 if (reg_info == nullptr) 109 return false; 110 111 // Invalidate if needed 112 InvalidateIfNeeded(false); 113 114 const size_t reg_byte_size = reg_info->byte_size; 115 memcpy(const_cast<uint8_t *>( 116 m_reg_data.PeekData(reg_info->byte_offset, reg_byte_size)), 117 data.data(), std::min(data.size(), reg_byte_size)); 118 bool success = data.size() >= reg_byte_size; 119 if (success) { 120 SetRegisterIsValid(reg, true); 121 } else if (data.size() > 0) { 122 // Only set register is valid to false if we copied some bytes, else leave 123 // it as it was. 124 SetRegisterIsValid(reg, false); 125 } 126 return success; 127 } 128 129 bool GDBRemoteRegisterContext::PrivateSetRegisterValue(uint32_t reg, 130 uint64_t new_reg_val) { 131 const RegisterInfo *reg_info = GetRegisterInfoAtIndex(reg); 132 if (reg_info == nullptr) 133 return false; 134 135 // Early in process startup, we can get a thread that has an invalid byte 136 // order because the process hasn't been completely set up yet (see the ctor 137 // where the byte order is setfrom the process). If that's the case, we 138 // can't set the value here. 139 if (m_reg_data.GetByteOrder() == eByteOrderInvalid) { 140 return false; 141 } 142 143 // Invalidate if needed 144 InvalidateIfNeeded(false); 145 146 DataBufferSP buffer_sp(new DataBufferHeap(&new_reg_val, sizeof(new_reg_val))); 147 DataExtractor data(buffer_sp, endian::InlHostByteOrder(), sizeof(void *)); 148 149 // If our register context and our register info disagree, which should never 150 // happen, don't overwrite past the end of the buffer. 151 if (m_reg_data.GetByteSize() < reg_info->byte_offset + reg_info->byte_size) 152 return false; 153 154 // Grab a pointer to where we are going to put this register 155 uint8_t *dst = const_cast<uint8_t *>( 156 m_reg_data.PeekData(reg_info->byte_offset, reg_info->byte_size)); 157 158 if (dst == nullptr) 159 return false; 160 161 if (data.CopyByteOrderedData(0, // src offset 162 reg_info->byte_size, // src length 163 dst, // dst 164 reg_info->byte_size, // dst length 165 m_reg_data.GetByteOrder())) // dst byte order 166 { 167 SetRegisterIsValid(reg, true); 168 return true; 169 } 170 return false; 171 } 172 173 // Helper function for GDBRemoteRegisterContext::ReadRegisterBytes(). 174 bool GDBRemoteRegisterContext::GetPrimordialRegister( 175 const RegisterInfo *reg_info, GDBRemoteCommunicationClient &gdb_comm) { 176 const uint32_t lldb_reg = reg_info->kinds[eRegisterKindLLDB]; 177 const uint32_t remote_reg = reg_info->kinds[eRegisterKindProcessPlugin]; 178 179 if (DataBufferSP buffer_sp = 180 gdb_comm.ReadRegister(m_thread.GetProtocolID(), remote_reg)) 181 return PrivateSetRegisterValue( 182 lldb_reg, llvm::ArrayRef<uint8_t>(buffer_sp->GetBytes(), 183 buffer_sp->GetByteSize())); 184 return false; 185 } 186 187 bool GDBRemoteRegisterContext::ReadRegisterBytes(const RegisterInfo *reg_info, 188 DataExtractor &data) { 189 ExecutionContext exe_ctx(CalculateThread()); 190 191 Process *process = exe_ctx.GetProcessPtr(); 192 Thread *thread = exe_ctx.GetThreadPtr(); 193 if (process == nullptr || thread == nullptr) 194 return false; 195 196 GDBRemoteCommunicationClient &gdb_comm( 197 ((ProcessGDBRemote *)process)->GetGDBRemote()); 198 199 InvalidateIfNeeded(false); 200 201 const uint32_t reg = reg_info->kinds[eRegisterKindLLDB]; 202 203 if (!GetRegisterIsValid(reg)) { 204 if (m_read_all_at_once && !m_gpacket_cached) { 205 if (DataBufferSP buffer_sp = 206 gdb_comm.ReadAllRegisters(m_thread.GetProtocolID())) { 207 memcpy(const_cast<uint8_t *>(m_reg_data.GetDataStart()), 208 buffer_sp->GetBytes(), 209 std::min(buffer_sp->GetByteSize(), m_reg_data.GetByteSize())); 210 if (buffer_sp->GetByteSize() >= m_reg_data.GetByteSize()) { 211 SetAllRegisterValid(true); 212 return true; 213 } else if (buffer_sp->GetByteSize() > 0) { 214 const int regcount = m_reg_info_sp->GetNumRegisters(); 215 for (int i = 0; i < regcount; i++) { 216 struct RegisterInfo *reginfo = 217 m_reg_info_sp->GetRegisterInfoAtIndex(i); 218 if (reginfo->byte_offset + reginfo->byte_size <= 219 buffer_sp->GetByteSize()) { 220 m_reg_valid[i] = true; 221 } else { 222 m_reg_valid[i] = false; 223 } 224 } 225 226 m_gpacket_cached = true; 227 if (GetRegisterIsValid(reg)) 228 return true; 229 } else { 230 Log *log(ProcessGDBRemoteLog::GetLogIfAnyCategoryIsSet(GDBR_LOG_THREAD | 231 GDBR_LOG_PACKETS)); 232 LLDB_LOGF( 233 log, 234 "error: GDBRemoteRegisterContext::ReadRegisterBytes tried " 235 "to read the " 236 "entire register context at once, expected at least %" PRId64 237 " bytes " 238 "but only got %" PRId64 " bytes.", 239 m_reg_data.GetByteSize(), buffer_sp->GetByteSize()); 240 return false; 241 } 242 } 243 } 244 if (reg_info->value_regs) { 245 // Process this composite register request by delegating to the 246 // constituent primordial registers. 247 248 // Index of the primordial register. 249 bool success = true; 250 for (uint32_t idx = 0; success; ++idx) { 251 const uint32_t prim_reg = reg_info->value_regs[idx]; 252 if (prim_reg == LLDB_INVALID_REGNUM) 253 break; 254 // We have a valid primordial register as our constituent. Grab the 255 // corresponding register info. 256 const RegisterInfo *prim_reg_info = 257 GetRegisterInfo(eRegisterKindProcessPlugin, prim_reg); 258 if (prim_reg_info == nullptr) 259 success = false; 260 else { 261 // Read the containing register if it hasn't already been read 262 if (!GetRegisterIsValid(prim_reg)) 263 success = GetPrimordialRegister(prim_reg_info, gdb_comm); 264 } 265 } 266 267 if (success) { 268 // If we reach this point, all primordial register requests have 269 // succeeded. Validate this composite register. 270 SetRegisterIsValid(reg_info, true); 271 } 272 } else { 273 // Get each register individually 274 GetPrimordialRegister(reg_info, gdb_comm); 275 } 276 277 // Make sure we got a valid register value after reading it 278 if (!GetRegisterIsValid(reg)) 279 return false; 280 } 281 282 if (&data != &m_reg_data) { 283 assert(m_reg_data.GetByteSize() >= 284 reg_info->byte_offset + reg_info->byte_size); 285 // If our register context and our register info disagree, which should 286 // never happen, don't read past the end of the buffer. 287 if (m_reg_data.GetByteSize() < reg_info->byte_offset + reg_info->byte_size) 288 return false; 289 290 // If we aren't extracting into our own buffer (which only happens when 291 // this function is called from ReadRegisterValue(uint32_t, Scalar&)) then 292 // we transfer bytes from our buffer into the data buffer that was passed 293 // in 294 295 data.SetByteOrder(m_reg_data.GetByteOrder()); 296 data.SetData(m_reg_data, reg_info->byte_offset, reg_info->byte_size); 297 } 298 return true; 299 } 300 301 bool GDBRemoteRegisterContext::WriteRegister(const RegisterInfo *reg_info, 302 const RegisterValue &value) { 303 DataExtractor data; 304 if (value.GetData(data)) 305 return WriteRegisterBytes(reg_info, data, 0); 306 return false; 307 } 308 309 // Helper function for GDBRemoteRegisterContext::WriteRegisterBytes(). 310 bool GDBRemoteRegisterContext::SetPrimordialRegister( 311 const RegisterInfo *reg_info, GDBRemoteCommunicationClient &gdb_comm) { 312 StreamString packet; 313 StringExtractorGDBRemote response; 314 const uint32_t reg = reg_info->kinds[eRegisterKindLLDB]; 315 // Invalidate just this register 316 SetRegisterIsValid(reg, false); 317 318 return gdb_comm.WriteRegister( 319 m_thread.GetProtocolID(), reg_info->kinds[eRegisterKindProcessPlugin], 320 {m_reg_data.PeekData(reg_info->byte_offset, reg_info->byte_size), 321 reg_info->byte_size}); 322 } 323 324 bool GDBRemoteRegisterContext::WriteRegisterBytes(const RegisterInfo *reg_info, 325 DataExtractor &data, 326 uint32_t data_offset) { 327 ExecutionContext exe_ctx(CalculateThread()); 328 329 Process *process = exe_ctx.GetProcessPtr(); 330 Thread *thread = exe_ctx.GetThreadPtr(); 331 if (process == nullptr || thread == nullptr) 332 return false; 333 334 GDBRemoteCommunicationClient &gdb_comm( 335 ((ProcessGDBRemote *)process)->GetGDBRemote()); 336 337 assert(m_reg_data.GetByteSize() >= 338 reg_info->byte_offset + reg_info->byte_size); 339 340 // If our register context and our register info disagree, which should never 341 // happen, don't overwrite past the end of the buffer. 342 if (m_reg_data.GetByteSize() < reg_info->byte_offset + reg_info->byte_size) 343 return false; 344 345 // Grab a pointer to where we are going to put this register 346 uint8_t *dst = const_cast<uint8_t *>( 347 m_reg_data.PeekData(reg_info->byte_offset, reg_info->byte_size)); 348 349 if (dst == nullptr) 350 return false; 351 352 // Code below is specific to AArch64 target in SVE state 353 // If vector granule (vg) register is being written then thread's 354 // register context reconfiguration is triggered on success. 355 bool do_reconfigure_arm64_sve = false; 356 const ArchSpec &arch = process->GetTarget().GetArchitecture(); 357 if (arch.IsValid() && arch.GetTriple().isAArch64()) 358 if (strcmp(reg_info->name, "vg") == 0) 359 do_reconfigure_arm64_sve = true; 360 361 if (data.CopyByteOrderedData(data_offset, // src offset 362 reg_info->byte_size, // src length 363 dst, // dst 364 reg_info->byte_size, // dst length 365 m_reg_data.GetByteOrder())) // dst byte order 366 { 367 GDBRemoteClientBase::Lock lock(gdb_comm); 368 if (lock) { 369 if (m_write_all_at_once) { 370 // Invalidate all register values 371 InvalidateIfNeeded(true); 372 373 // Set all registers in one packet 374 if (gdb_comm.WriteAllRegisters( 375 m_thread.GetProtocolID(), 376 {m_reg_data.GetDataStart(), size_t(m_reg_data.GetByteSize())})) 377 378 { 379 SetAllRegisterValid(false); 380 381 if (do_reconfigure_arm64_sve) 382 AArch64SVEReconfigure(); 383 384 return true; 385 } 386 } else { 387 bool success = true; 388 389 if (reg_info->value_regs) { 390 // This register is part of another register. In this case we read 391 // the actual register data for any "value_regs", and once all that 392 // data is read, we will have enough data in our register context 393 // bytes for the value of this register 394 395 // Invalidate this composite register first. 396 397 for (uint32_t idx = 0; success; ++idx) { 398 const uint32_t reg = reg_info->value_regs[idx]; 399 if (reg == LLDB_INVALID_REGNUM) 400 break; 401 // We have a valid primordial register as our constituent. Grab the 402 // corresponding register info. 403 const RegisterInfo *value_reg_info = 404 GetRegisterInfo(eRegisterKindProcessPlugin, reg); 405 if (value_reg_info == nullptr) 406 success = false; 407 else 408 success = SetPrimordialRegister(value_reg_info, gdb_comm); 409 } 410 } else { 411 // This is an actual register, write it 412 success = SetPrimordialRegister(reg_info, gdb_comm); 413 414 if (success && do_reconfigure_arm64_sve) 415 AArch64SVEReconfigure(); 416 } 417 418 // Check if writing this register will invalidate any other register 419 // values? If so, invalidate them 420 if (reg_info->invalidate_regs) { 421 for (uint32_t idx = 0, reg = reg_info->invalidate_regs[0]; 422 reg != LLDB_INVALID_REGNUM; 423 reg = reg_info->invalidate_regs[++idx]) 424 SetRegisterIsValid(ConvertRegisterKindToRegisterNumber( 425 eRegisterKindProcessPlugin, reg), 426 false); 427 } 428 429 return success; 430 } 431 } else { 432 Log *log(ProcessGDBRemoteLog::GetLogIfAnyCategoryIsSet(GDBR_LOG_THREAD | 433 GDBR_LOG_PACKETS)); 434 if (log) { 435 if (log->GetVerbose()) { 436 StreamString strm; 437 gdb_comm.DumpHistory(strm); 438 LLDB_LOGF(log, 439 "error: failed to get packet sequence mutex, not sending " 440 "write register for \"%s\":\n%s", 441 reg_info->name, strm.GetData()); 442 } else 443 LLDB_LOGF(log, 444 "error: failed to get packet sequence mutex, not sending " 445 "write register for \"%s\"", 446 reg_info->name); 447 } 448 } 449 } 450 return false; 451 } 452 453 bool GDBRemoteRegisterContext::ReadAllRegisterValues( 454 RegisterCheckpoint ®_checkpoint) { 455 ExecutionContext exe_ctx(CalculateThread()); 456 457 Process *process = exe_ctx.GetProcessPtr(); 458 Thread *thread = exe_ctx.GetThreadPtr(); 459 if (process == nullptr || thread == nullptr) 460 return false; 461 462 GDBRemoteCommunicationClient &gdb_comm( 463 ((ProcessGDBRemote *)process)->GetGDBRemote()); 464 465 uint32_t save_id = 0; 466 if (gdb_comm.SaveRegisterState(thread->GetProtocolID(), save_id)) { 467 reg_checkpoint.SetID(save_id); 468 reg_checkpoint.GetData().reset(); 469 return true; 470 } else { 471 reg_checkpoint.SetID(0); // Invalid save ID is zero 472 return ReadAllRegisterValues(reg_checkpoint.GetData()); 473 } 474 } 475 476 bool GDBRemoteRegisterContext::WriteAllRegisterValues( 477 const RegisterCheckpoint ®_checkpoint) { 478 uint32_t save_id = reg_checkpoint.GetID(); 479 if (save_id != 0) { 480 ExecutionContext exe_ctx(CalculateThread()); 481 482 Process *process = exe_ctx.GetProcessPtr(); 483 Thread *thread = exe_ctx.GetThreadPtr(); 484 if (process == nullptr || thread == nullptr) 485 return false; 486 487 GDBRemoteCommunicationClient &gdb_comm( 488 ((ProcessGDBRemote *)process)->GetGDBRemote()); 489 490 return gdb_comm.RestoreRegisterState(m_thread.GetProtocolID(), save_id); 491 } else { 492 return WriteAllRegisterValues(reg_checkpoint.GetData()); 493 } 494 } 495 496 bool GDBRemoteRegisterContext::ReadAllRegisterValues( 497 lldb::DataBufferSP &data_sp) { 498 ExecutionContext exe_ctx(CalculateThread()); 499 500 Process *process = exe_ctx.GetProcessPtr(); 501 Thread *thread = exe_ctx.GetThreadPtr(); 502 if (process == nullptr || thread == nullptr) 503 return false; 504 505 GDBRemoteCommunicationClient &gdb_comm( 506 ((ProcessGDBRemote *)process)->GetGDBRemote()); 507 508 const bool use_g_packet = 509 !gdb_comm.AvoidGPackets((ProcessGDBRemote *)process); 510 511 GDBRemoteClientBase::Lock lock(gdb_comm); 512 if (lock) { 513 if (gdb_comm.SyncThreadState(m_thread.GetProtocolID())) 514 InvalidateAllRegisters(); 515 516 if (use_g_packet && 517 (data_sp = gdb_comm.ReadAllRegisters(m_thread.GetProtocolID()))) 518 return true; 519 520 // We're going to read each register 521 // individually and store them as binary data in a buffer. 522 const RegisterInfo *reg_info; 523 524 for (uint32_t i = 0; (reg_info = GetRegisterInfoAtIndex(i)) != nullptr; 525 i++) { 526 if (reg_info 527 ->value_regs) // skip registers that are slices of real registers 528 continue; 529 ReadRegisterBytes(reg_info, m_reg_data); 530 // ReadRegisterBytes saves the contents of the register in to the 531 // m_reg_data buffer 532 } 533 data_sp = std::make_shared<DataBufferHeap>( 534 m_reg_data.GetDataStart(), m_reg_info_sp->GetRegisterDataByteSize()); 535 return true; 536 } else { 537 538 Log *log(ProcessGDBRemoteLog::GetLogIfAnyCategoryIsSet(GDBR_LOG_THREAD | 539 GDBR_LOG_PACKETS)); 540 if (log) { 541 if (log->GetVerbose()) { 542 StreamString strm; 543 gdb_comm.DumpHistory(strm); 544 LLDB_LOGF(log, 545 "error: failed to get packet sequence mutex, not sending " 546 "read all registers:\n%s", 547 strm.GetData()); 548 } else 549 LLDB_LOGF(log, 550 "error: failed to get packet sequence mutex, not sending " 551 "read all registers"); 552 } 553 } 554 555 data_sp.reset(); 556 return false; 557 } 558 559 bool GDBRemoteRegisterContext::WriteAllRegisterValues( 560 const lldb::DataBufferSP &data_sp) { 561 if (!data_sp || data_sp->GetBytes() == nullptr || data_sp->GetByteSize() == 0) 562 return false; 563 564 ExecutionContext exe_ctx(CalculateThread()); 565 566 Process *process = exe_ctx.GetProcessPtr(); 567 Thread *thread = exe_ctx.GetThreadPtr(); 568 if (process == nullptr || thread == nullptr) 569 return false; 570 571 GDBRemoteCommunicationClient &gdb_comm( 572 ((ProcessGDBRemote *)process)->GetGDBRemote()); 573 574 const bool use_g_packet = 575 !gdb_comm.AvoidGPackets((ProcessGDBRemote *)process); 576 577 GDBRemoteClientBase::Lock lock(gdb_comm); 578 if (lock) { 579 // The data_sp contains the G response packet. 580 if (use_g_packet) { 581 if (gdb_comm.WriteAllRegisters( 582 m_thread.GetProtocolID(), 583 {data_sp->GetBytes(), size_t(data_sp->GetByteSize())})) 584 return true; 585 586 uint32_t num_restored = 0; 587 // We need to manually go through all of the registers and restore them 588 // manually 589 DataExtractor restore_data(data_sp, m_reg_data.GetByteOrder(), 590 m_reg_data.GetAddressByteSize()); 591 592 const RegisterInfo *reg_info; 593 594 // The g packet contents may either include the slice registers 595 // (registers defined in terms of other registers, e.g. eax is a subset 596 // of rax) or not. The slice registers should NOT be in the g packet, 597 // but some implementations may incorrectly include them. 598 // 599 // If the slice registers are included in the packet, we must step over 600 // the slice registers when parsing the packet -- relying on the 601 // RegisterInfo byte_offset field would be incorrect. If the slice 602 // registers are not included, then using the byte_offset values into the 603 // data buffer is the best way to find individual register values. 604 605 uint64_t size_including_slice_registers = 0; 606 uint64_t size_not_including_slice_registers = 0; 607 uint64_t size_by_highest_offset = 0; 608 609 for (uint32_t reg_idx = 0; 610 (reg_info = GetRegisterInfoAtIndex(reg_idx)) != nullptr; ++reg_idx) { 611 size_including_slice_registers += reg_info->byte_size; 612 if (reg_info->value_regs == nullptr) 613 size_not_including_slice_registers += reg_info->byte_size; 614 if (reg_info->byte_offset >= size_by_highest_offset) 615 size_by_highest_offset = reg_info->byte_offset + reg_info->byte_size; 616 } 617 618 bool use_byte_offset_into_buffer; 619 if (size_by_highest_offset == restore_data.GetByteSize()) { 620 // The size of the packet agrees with the highest offset: + size in the 621 // register file 622 use_byte_offset_into_buffer = true; 623 } else if (size_not_including_slice_registers == 624 restore_data.GetByteSize()) { 625 // The size of the packet is the same as concatenating all of the 626 // registers sequentially, skipping the slice registers 627 use_byte_offset_into_buffer = true; 628 } else if (size_including_slice_registers == restore_data.GetByteSize()) { 629 // The slice registers are present in the packet (when they shouldn't 630 // be). Don't try to use the RegisterInfo byte_offset into the 631 // restore_data, it will point to the wrong place. 632 use_byte_offset_into_buffer = false; 633 } else { 634 // None of our expected sizes match the actual g packet data we're 635 // looking at. The most conservative approach here is to use the 636 // running total byte offset. 637 use_byte_offset_into_buffer = false; 638 } 639 640 // In case our register definitions don't include the correct offsets, 641 // keep track of the size of each reg & compute offset based on that. 642 uint32_t running_byte_offset = 0; 643 for (uint32_t reg_idx = 0; 644 (reg_info = GetRegisterInfoAtIndex(reg_idx)) != nullptr; 645 ++reg_idx, running_byte_offset += reg_info->byte_size) { 646 // Skip composite aka slice registers (e.g. eax is a slice of rax). 647 if (reg_info->value_regs) 648 continue; 649 650 const uint32_t reg = reg_info->kinds[eRegisterKindLLDB]; 651 652 uint32_t register_offset; 653 if (use_byte_offset_into_buffer) { 654 register_offset = reg_info->byte_offset; 655 } else { 656 register_offset = running_byte_offset; 657 } 658 659 const uint32_t reg_byte_size = reg_info->byte_size; 660 661 const uint8_t *restore_src = 662 restore_data.PeekData(register_offset, reg_byte_size); 663 if (restore_src) { 664 SetRegisterIsValid(reg, false); 665 if (gdb_comm.WriteRegister( 666 m_thread.GetProtocolID(), 667 reg_info->kinds[eRegisterKindProcessPlugin], 668 {restore_src, reg_byte_size})) 669 ++num_restored; 670 } 671 } 672 return num_restored > 0; 673 } else { 674 // For the use_g_packet == false case, we're going to write each register 675 // individually. The data buffer is binary data in this case, instead of 676 // ascii characters. 677 678 bool arm64_debugserver = false; 679 if (m_thread.GetProcess().get()) { 680 const ArchSpec &arch = 681 m_thread.GetProcess()->GetTarget().GetArchitecture(); 682 if (arch.IsValid() && (arch.GetMachine() == llvm::Triple::aarch64 || 683 arch.GetMachine() == llvm::Triple::aarch64_32) && 684 arch.GetTriple().getVendor() == llvm::Triple::Apple && 685 arch.GetTriple().getOS() == llvm::Triple::IOS) { 686 arm64_debugserver = true; 687 } 688 } 689 uint32_t num_restored = 0; 690 const RegisterInfo *reg_info; 691 for (uint32_t i = 0; (reg_info = GetRegisterInfoAtIndex(i)) != nullptr; 692 i++) { 693 if (reg_info->value_regs) // skip registers that are slices of real 694 // registers 695 continue; 696 // Skip the fpsr and fpcr floating point status/control register 697 // writing to work around a bug in an older version of debugserver that 698 // would lead to register context corruption when writing fpsr/fpcr. 699 if (arm64_debugserver && (strcmp(reg_info->name, "fpsr") == 0 || 700 strcmp(reg_info->name, "fpcr") == 0)) { 701 continue; 702 } 703 704 SetRegisterIsValid(reg_info, false); 705 if (gdb_comm.WriteRegister(m_thread.GetProtocolID(), 706 reg_info->kinds[eRegisterKindProcessPlugin], 707 {data_sp->GetBytes() + reg_info->byte_offset, 708 reg_info->byte_size})) 709 ++num_restored; 710 } 711 return num_restored > 0; 712 } 713 } else { 714 Log *log(ProcessGDBRemoteLog::GetLogIfAnyCategoryIsSet(GDBR_LOG_THREAD | 715 GDBR_LOG_PACKETS)); 716 if (log) { 717 if (log->GetVerbose()) { 718 StreamString strm; 719 gdb_comm.DumpHistory(strm); 720 LLDB_LOGF(log, 721 "error: failed to get packet sequence mutex, not sending " 722 "write all registers:\n%s", 723 strm.GetData()); 724 } else 725 LLDB_LOGF(log, 726 "error: failed to get packet sequence mutex, not sending " 727 "write all registers"); 728 } 729 } 730 return false; 731 } 732 733 uint32_t GDBRemoteRegisterContext::ConvertRegisterKindToRegisterNumber( 734 lldb::RegisterKind kind, uint32_t num) { 735 return m_reg_info_sp->ConvertRegisterKindToRegisterNumber(kind, num); 736 } 737 738 bool GDBRemoteRegisterContext::AArch64SVEReconfigure() { 739 if (!m_reg_info_sp) 740 return false; 741 742 const RegisterInfo *reg_info = m_reg_info_sp->GetRegisterInfo("vg"); 743 if (!reg_info) 744 return false; 745 746 uint64_t fail_value = LLDB_INVALID_ADDRESS; 747 uint32_t vg_reg_num = reg_info->kinds[eRegisterKindLLDB]; 748 uint64_t vg_reg_value = ReadRegisterAsUnsigned(vg_reg_num, fail_value); 749 750 if (vg_reg_value != fail_value && vg_reg_value <= 32) { 751 const RegisterInfo *reg_info = m_reg_info_sp->GetRegisterInfo("p0"); 752 if (!reg_info || vg_reg_value == reg_info->byte_size) 753 return false; 754 755 if (m_reg_info_sp->UpdateARM64SVERegistersInfos(vg_reg_value)) { 756 // Make a heap based buffer that is big enough to store all registers 757 m_reg_data.SetData(std::make_shared<DataBufferHeap>( 758 m_reg_info_sp->GetRegisterDataByteSize(), 0)); 759 m_reg_data.SetByteOrder(GetByteOrder()); 760 761 InvalidateAllRegisters(); 762 763 return true; 764 } 765 } 766 767 return false; 768 } 769 770 bool GDBRemoteDynamicRegisterInfo::UpdateARM64SVERegistersInfos(uint64_t vg) { 771 // SVE Z register size is vg x 8 bytes. 772 uint32_t z_reg_byte_size = vg * 8; 773 774 // SVE vector length has changed, accordingly set size of Z, P and FFR 775 // registers. Also invalidate register offsets it will be recalculated 776 // after SVE register size update. 777 for (auto ® : m_regs) { 778 if (reg.value_regs == nullptr) { 779 if (reg.name[0] == 'z' && isdigit(reg.name[1])) 780 reg.byte_size = z_reg_byte_size; 781 else if (reg.name[0] == 'p' && isdigit(reg.name[1])) 782 reg.byte_size = vg; 783 else if (strcmp(reg.name, "ffr") == 0) 784 reg.byte_size = vg; 785 } 786 reg.byte_offset = LLDB_INVALID_INDEX32; 787 } 788 789 // Re-calculate register offsets 790 ConfigureOffsets(); 791 return true; 792 } 793 794 void GDBRemoteDynamicRegisterInfo::HardcodeARMRegisters(bool from_scratch) { 795 // For Advanced SIMD and VFP register mapping. 796 static uint32_t g_d0_regs[] = {26, 27, LLDB_INVALID_REGNUM}; // (s0, s1) 797 static uint32_t g_d1_regs[] = {28, 29, LLDB_INVALID_REGNUM}; // (s2, s3) 798 static uint32_t g_d2_regs[] = {30, 31, LLDB_INVALID_REGNUM}; // (s4, s5) 799 static uint32_t g_d3_regs[] = {32, 33, LLDB_INVALID_REGNUM}; // (s6, s7) 800 static uint32_t g_d4_regs[] = {34, 35, LLDB_INVALID_REGNUM}; // (s8, s9) 801 static uint32_t g_d5_regs[] = {36, 37, LLDB_INVALID_REGNUM}; // (s10, s11) 802 static uint32_t g_d6_regs[] = {38, 39, LLDB_INVALID_REGNUM}; // (s12, s13) 803 static uint32_t g_d7_regs[] = {40, 41, LLDB_INVALID_REGNUM}; // (s14, s15) 804 static uint32_t g_d8_regs[] = {42, 43, LLDB_INVALID_REGNUM}; // (s16, s17) 805 static uint32_t g_d9_regs[] = {44, 45, LLDB_INVALID_REGNUM}; // (s18, s19) 806 static uint32_t g_d10_regs[] = {46, 47, LLDB_INVALID_REGNUM}; // (s20, s21) 807 static uint32_t g_d11_regs[] = {48, 49, LLDB_INVALID_REGNUM}; // (s22, s23) 808 static uint32_t g_d12_regs[] = {50, 51, LLDB_INVALID_REGNUM}; // (s24, s25) 809 static uint32_t g_d13_regs[] = {52, 53, LLDB_INVALID_REGNUM}; // (s26, s27) 810 static uint32_t g_d14_regs[] = {54, 55, LLDB_INVALID_REGNUM}; // (s28, s29) 811 static uint32_t g_d15_regs[] = {56, 57, LLDB_INVALID_REGNUM}; // (s30, s31) 812 static uint32_t g_q0_regs[] = { 813 26, 27, 28, 29, LLDB_INVALID_REGNUM}; // (d0, d1) -> (s0, s1, s2, s3) 814 static uint32_t g_q1_regs[] = { 815 30, 31, 32, 33, LLDB_INVALID_REGNUM}; // (d2, d3) -> (s4, s5, s6, s7) 816 static uint32_t g_q2_regs[] = { 817 34, 35, 36, 37, LLDB_INVALID_REGNUM}; // (d4, d5) -> (s8, s9, s10, s11) 818 static uint32_t g_q3_regs[] = { 819 38, 39, 40, 41, LLDB_INVALID_REGNUM}; // (d6, d7) -> (s12, s13, s14, s15) 820 static uint32_t g_q4_regs[] = { 821 42, 43, 44, 45, LLDB_INVALID_REGNUM}; // (d8, d9) -> (s16, s17, s18, s19) 822 static uint32_t g_q5_regs[] = { 823 46, 47, 48, 49, 824 LLDB_INVALID_REGNUM}; // (d10, d11) -> (s20, s21, s22, s23) 825 static uint32_t g_q6_regs[] = { 826 50, 51, 52, 53, 827 LLDB_INVALID_REGNUM}; // (d12, d13) -> (s24, s25, s26, s27) 828 static uint32_t g_q7_regs[] = { 829 54, 55, 56, 57, 830 LLDB_INVALID_REGNUM}; // (d14, d15) -> (s28, s29, s30, s31) 831 static uint32_t g_q8_regs[] = {59, 60, LLDB_INVALID_REGNUM}; // (d16, d17) 832 static uint32_t g_q9_regs[] = {61, 62, LLDB_INVALID_REGNUM}; // (d18, d19) 833 static uint32_t g_q10_regs[] = {63, 64, LLDB_INVALID_REGNUM}; // (d20, d21) 834 static uint32_t g_q11_regs[] = {65, 66, LLDB_INVALID_REGNUM}; // (d22, d23) 835 static uint32_t g_q12_regs[] = {67, 68, LLDB_INVALID_REGNUM}; // (d24, d25) 836 static uint32_t g_q13_regs[] = {69, 70, LLDB_INVALID_REGNUM}; // (d26, d27) 837 static uint32_t g_q14_regs[] = {71, 72, LLDB_INVALID_REGNUM}; // (d28, d29) 838 static uint32_t g_q15_regs[] = {73, 74, LLDB_INVALID_REGNUM}; // (d30, d31) 839 840 // This is our array of composite registers, with each element coming from 841 // the above register mappings. 842 static uint32_t *g_composites[] = { 843 g_d0_regs, g_d1_regs, g_d2_regs, g_d3_regs, g_d4_regs, g_d5_regs, 844 g_d6_regs, g_d7_regs, g_d8_regs, g_d9_regs, g_d10_regs, g_d11_regs, 845 g_d12_regs, g_d13_regs, g_d14_regs, g_d15_regs, g_q0_regs, g_q1_regs, 846 g_q2_regs, g_q3_regs, g_q4_regs, g_q5_regs, g_q6_regs, g_q7_regs, 847 g_q8_regs, g_q9_regs, g_q10_regs, g_q11_regs, g_q12_regs, g_q13_regs, 848 g_q14_regs, g_q15_regs}; 849 850 // clang-format off 851 static RegisterInfo g_register_infos[] = { 852 // NAME ALT SZ OFF ENCODING FORMAT EH_FRAME DWARF GENERIC PROCESS PLUGIN LLDB VALUE REGS INVALIDATE REGS SIZE EXPR SIZE LEN 853 // ====== ====== === === ============= ========== =================== =================== ====================== ============= ==== ========== =============== ========= ======== 854 { "r0", "arg1", 4, 0, eEncodingUint, eFormatHex, { ehframe_r0, dwarf_r0, LLDB_REGNUM_GENERIC_ARG1,0, 0 }, nullptr, nullptr, nullptr, 0 }, 855 { "r1", "arg2", 4, 0, eEncodingUint, eFormatHex, { ehframe_r1, dwarf_r1, LLDB_REGNUM_GENERIC_ARG2,1, 1 }, nullptr, nullptr, nullptr, 0 }, 856 { "r2", "arg3", 4, 0, eEncodingUint, eFormatHex, { ehframe_r2, dwarf_r2, LLDB_REGNUM_GENERIC_ARG3,2, 2 }, nullptr, nullptr, nullptr, 0 }, 857 { "r3", "arg4", 4, 0, eEncodingUint, eFormatHex, { ehframe_r3, dwarf_r3, LLDB_REGNUM_GENERIC_ARG4,3, 3 }, nullptr, nullptr, nullptr, 0 }, 858 { "r4", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r4, dwarf_r4, LLDB_INVALID_REGNUM, 4, 4 }, nullptr, nullptr, nullptr, 0 }, 859 { "r5", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r5, dwarf_r5, LLDB_INVALID_REGNUM, 5, 5 }, nullptr, nullptr, nullptr, 0 }, 860 { "r6", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r6, dwarf_r6, LLDB_INVALID_REGNUM, 6, 6 }, nullptr, nullptr, nullptr, 0 }, 861 { "r7", "fp", 4, 0, eEncodingUint, eFormatHex, { ehframe_r7, dwarf_r7, LLDB_REGNUM_GENERIC_FP, 7, 7 }, nullptr, nullptr, nullptr, 0 }, 862 { "r8", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r8, dwarf_r8, LLDB_INVALID_REGNUM, 8, 8 }, nullptr, nullptr, nullptr, 0 }, 863 { "r9", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r9, dwarf_r9, LLDB_INVALID_REGNUM, 9, 9 }, nullptr, nullptr, nullptr, 0 }, 864 { "r10", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r10, dwarf_r10, LLDB_INVALID_REGNUM, 10, 10 }, nullptr, nullptr, nullptr, 0 }, 865 { "r11", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r11, dwarf_r11, LLDB_INVALID_REGNUM, 11, 11 }, nullptr, nullptr, nullptr, 0 }, 866 { "r12", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r12, dwarf_r12, LLDB_INVALID_REGNUM, 12, 12 }, nullptr, nullptr, nullptr, 0 }, 867 { "sp", "r13", 4, 0, eEncodingUint, eFormatHex, { ehframe_sp, dwarf_sp, LLDB_REGNUM_GENERIC_SP, 13, 13 }, nullptr, nullptr, nullptr, 0 }, 868 { "lr", "r14", 4, 0, eEncodingUint, eFormatHex, { ehframe_lr, dwarf_lr, LLDB_REGNUM_GENERIC_RA, 14, 14 }, nullptr, nullptr, nullptr, 0 }, 869 { "pc", "r15", 4, 0, eEncodingUint, eFormatHex, { ehframe_pc, dwarf_pc, LLDB_REGNUM_GENERIC_PC, 15, 15 }, nullptr, nullptr, nullptr, 0 }, 870 { "f0", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 16, 16 }, nullptr, nullptr, nullptr, 0 }, 871 { "f1", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 17, 17 }, nullptr, nullptr, nullptr, 0 }, 872 { "f2", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 18, 18 }, nullptr, nullptr, nullptr, 0 }, 873 { "f3", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 19, 19 }, nullptr, nullptr, nullptr, 0 }, 874 { "f4", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 20, 20 }, nullptr, nullptr, nullptr, 0 }, 875 { "f5", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 21, 21 }, nullptr, nullptr, nullptr, 0 }, 876 { "f6", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 22, 22 }, nullptr, nullptr, nullptr, 0 }, 877 { "f7", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 23, 23 }, nullptr, nullptr, nullptr, 0 }, 878 { "fps", nullptr, 4, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 24, 24 }, nullptr, nullptr, nullptr, 0 }, 879 { "cpsr","flags", 4, 0, eEncodingUint, eFormatHex, { ehframe_cpsr, dwarf_cpsr, LLDB_INVALID_REGNUM, 25, 25 }, nullptr, nullptr, nullptr, 0 }, 880 { "s0", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s0, LLDB_INVALID_REGNUM, 26, 26 }, nullptr, nullptr, nullptr, 0 }, 881 { "s1", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s1, LLDB_INVALID_REGNUM, 27, 27 }, nullptr, nullptr, nullptr, 0 }, 882 { "s2", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s2, LLDB_INVALID_REGNUM, 28, 28 }, nullptr, nullptr, nullptr, 0 }, 883 { "s3", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s3, LLDB_INVALID_REGNUM, 29, 29 }, nullptr, nullptr, nullptr, 0 }, 884 { "s4", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s4, LLDB_INVALID_REGNUM, 30, 30 }, nullptr, nullptr, nullptr, 0 }, 885 { "s5", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s5, LLDB_INVALID_REGNUM, 31, 31 }, nullptr, nullptr, nullptr, 0 }, 886 { "s6", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s6, LLDB_INVALID_REGNUM, 32, 32 }, nullptr, nullptr, nullptr, 0 }, 887 { "s7", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s7, LLDB_INVALID_REGNUM, 33, 33 }, nullptr, nullptr, nullptr, 0 }, 888 { "s8", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s8, LLDB_INVALID_REGNUM, 34, 34 }, nullptr, nullptr, nullptr, 0 }, 889 { "s9", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s9, LLDB_INVALID_REGNUM, 35, 35 }, nullptr, nullptr, nullptr, 0 }, 890 { "s10", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s10, LLDB_INVALID_REGNUM, 36, 36 }, nullptr, nullptr, nullptr, 0 }, 891 { "s11", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s11, LLDB_INVALID_REGNUM, 37, 37 }, nullptr, nullptr, nullptr, 0 }, 892 { "s12", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s12, LLDB_INVALID_REGNUM, 38, 38 }, nullptr, nullptr, nullptr, 0 }, 893 { "s13", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s13, LLDB_INVALID_REGNUM, 39, 39 }, nullptr, nullptr, nullptr, 0 }, 894 { "s14", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s14, LLDB_INVALID_REGNUM, 40, 40 }, nullptr, nullptr, nullptr, 0 }, 895 { "s15", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s15, LLDB_INVALID_REGNUM, 41, 41 }, nullptr, nullptr, nullptr, 0 }, 896 { "s16", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s16, LLDB_INVALID_REGNUM, 42, 42 }, nullptr, nullptr, nullptr, 0 }, 897 { "s17", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s17, LLDB_INVALID_REGNUM, 43, 43 }, nullptr, nullptr, nullptr, 0 }, 898 { "s18", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s18, LLDB_INVALID_REGNUM, 44, 44 }, nullptr, nullptr, nullptr, 0 }, 899 { "s19", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s19, LLDB_INVALID_REGNUM, 45, 45 }, nullptr, nullptr, nullptr, 0 }, 900 { "s20", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s20, LLDB_INVALID_REGNUM, 46, 46 }, nullptr, nullptr, nullptr, 0 }, 901 { "s21", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s21, LLDB_INVALID_REGNUM, 47, 47 }, nullptr, nullptr, nullptr, 0 }, 902 { "s22", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s22, LLDB_INVALID_REGNUM, 48, 48 }, nullptr, nullptr, nullptr, 0 }, 903 { "s23", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s23, LLDB_INVALID_REGNUM, 49, 49 }, nullptr, nullptr, nullptr, 0 }, 904 { "s24", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s24, LLDB_INVALID_REGNUM, 50, 50 }, nullptr, nullptr, nullptr, 0 }, 905 { "s25", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s25, LLDB_INVALID_REGNUM, 51, 51 }, nullptr, nullptr, nullptr, 0 }, 906 { "s26", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s26, LLDB_INVALID_REGNUM, 52, 52 }, nullptr, nullptr, nullptr, 0 }, 907 { "s27", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s27, LLDB_INVALID_REGNUM, 53, 53 }, nullptr, nullptr, nullptr, 0 }, 908 { "s28", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s28, LLDB_INVALID_REGNUM, 54, 54 }, nullptr, nullptr, nullptr, 0 }, 909 { "s29", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s29, LLDB_INVALID_REGNUM, 55, 55 }, nullptr, nullptr, nullptr, 0 }, 910 { "s30", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s30, LLDB_INVALID_REGNUM, 56, 56 }, nullptr, nullptr, nullptr, 0 }, 911 { "s31", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s31, LLDB_INVALID_REGNUM, 57, 57 }, nullptr, nullptr, nullptr, 0 }, 912 { "fpscr",nullptr, 4, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 58, 58 }, nullptr, nullptr, nullptr, 0 }, 913 { "d16", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d16, LLDB_INVALID_REGNUM, 59, 59 }, nullptr, nullptr, nullptr, 0 }, 914 { "d17", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d17, LLDB_INVALID_REGNUM, 60, 60 }, nullptr, nullptr, nullptr, 0 }, 915 { "d18", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d18, LLDB_INVALID_REGNUM, 61, 61 }, nullptr, nullptr, nullptr, 0 }, 916 { "d19", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d19, LLDB_INVALID_REGNUM, 62, 62 }, nullptr, nullptr, nullptr, 0 }, 917 { "d20", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d20, LLDB_INVALID_REGNUM, 63, 63 }, nullptr, nullptr, nullptr, 0 }, 918 { "d21", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d21, LLDB_INVALID_REGNUM, 64, 64 }, nullptr, nullptr, nullptr, 0 }, 919 { "d22", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d22, LLDB_INVALID_REGNUM, 65, 65 }, nullptr, nullptr, nullptr, 0 }, 920 { "d23", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d23, LLDB_INVALID_REGNUM, 66, 66 }, nullptr, nullptr, nullptr, 0 }, 921 { "d24", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d24, LLDB_INVALID_REGNUM, 67, 67 }, nullptr, nullptr, nullptr, 0 }, 922 { "d25", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d25, LLDB_INVALID_REGNUM, 68, 68 }, nullptr, nullptr, nullptr, 0 }, 923 { "d26", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d26, LLDB_INVALID_REGNUM, 69, 69 }, nullptr, nullptr, nullptr, 0 }, 924 { "d27", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d27, LLDB_INVALID_REGNUM, 70, 70 }, nullptr, nullptr, nullptr, 0 }, 925 { "d28", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d28, LLDB_INVALID_REGNUM, 71, 71 }, nullptr, nullptr, nullptr, 0 }, 926 { "d29", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d29, LLDB_INVALID_REGNUM, 72, 72 }, nullptr, nullptr, nullptr, 0 }, 927 { "d30", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d30, LLDB_INVALID_REGNUM, 73, 73 }, nullptr, nullptr, nullptr, 0 }, 928 { "d31", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d31, LLDB_INVALID_REGNUM, 74, 74 }, nullptr, nullptr, nullptr, 0 }, 929 { "d0", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d0, LLDB_INVALID_REGNUM, 75, 75 }, g_d0_regs, nullptr, nullptr, 0 }, 930 { "d1", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d1, LLDB_INVALID_REGNUM, 76, 76 }, g_d1_regs, nullptr, nullptr, 0 }, 931 { "d2", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d2, LLDB_INVALID_REGNUM, 77, 77 }, g_d2_regs, nullptr, nullptr, 0 }, 932 { "d3", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d3, LLDB_INVALID_REGNUM, 78, 78 }, g_d3_regs, nullptr, nullptr, 0 }, 933 { "d4", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d4, LLDB_INVALID_REGNUM, 79, 79 }, g_d4_regs, nullptr, nullptr, 0 }, 934 { "d5", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d5, LLDB_INVALID_REGNUM, 80, 80 }, g_d5_regs, nullptr, nullptr, 0 }, 935 { "d6", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d6, LLDB_INVALID_REGNUM, 81, 81 }, g_d6_regs, nullptr, nullptr, 0 }, 936 { "d7", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d7, LLDB_INVALID_REGNUM, 82, 82 }, g_d7_regs, nullptr, nullptr, 0 }, 937 { "d8", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d8, LLDB_INVALID_REGNUM, 83, 83 }, g_d8_regs, nullptr, nullptr, 0 }, 938 { "d9", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d9, LLDB_INVALID_REGNUM, 84, 84 }, g_d9_regs, nullptr, nullptr, 0 }, 939 { "d10", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d10, LLDB_INVALID_REGNUM, 85, 85 }, g_d10_regs, nullptr, nullptr, 0 }, 940 { "d11", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d11, LLDB_INVALID_REGNUM, 86, 86 }, g_d11_regs, nullptr, nullptr, 0 }, 941 { "d12", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d12, LLDB_INVALID_REGNUM, 87, 87 }, g_d12_regs, nullptr, nullptr, 0 }, 942 { "d13", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d13, LLDB_INVALID_REGNUM, 88, 88 }, g_d13_regs, nullptr, nullptr, 0 }, 943 { "d14", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d14, LLDB_INVALID_REGNUM, 89, 89 }, g_d14_regs, nullptr, nullptr, 0 }, 944 { "d15", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d15, LLDB_INVALID_REGNUM, 90, 90 }, g_d15_regs, nullptr, nullptr, 0 }, 945 { "q0", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q0, LLDB_INVALID_REGNUM, 91, 91 }, g_q0_regs, nullptr, nullptr, 0 }, 946 { "q1", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q1, LLDB_INVALID_REGNUM, 92, 92 }, g_q1_regs, nullptr, nullptr, 0 }, 947 { "q2", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q2, LLDB_INVALID_REGNUM, 93, 93 }, g_q2_regs, nullptr, nullptr, 0 }, 948 { "q3", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q3, LLDB_INVALID_REGNUM, 94, 94 }, g_q3_regs, nullptr, nullptr, 0 }, 949 { "q4", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q4, LLDB_INVALID_REGNUM, 95, 95 }, g_q4_regs, nullptr, nullptr, 0 }, 950 { "q5", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q5, LLDB_INVALID_REGNUM, 96, 96 }, g_q5_regs, nullptr, nullptr, 0 }, 951 { "q6", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q6, LLDB_INVALID_REGNUM, 97, 97 }, g_q6_regs, nullptr, nullptr, 0 }, 952 { "q7", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q7, LLDB_INVALID_REGNUM, 98, 98 }, g_q7_regs, nullptr, nullptr, 0 }, 953 { "q8", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q8, LLDB_INVALID_REGNUM, 99, 99 }, g_q8_regs, nullptr, nullptr, 0 }, 954 { "q9", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q9, LLDB_INVALID_REGNUM, 100, 100 }, g_q9_regs, nullptr, nullptr, 0 }, 955 { "q10", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q10, LLDB_INVALID_REGNUM, 101, 101 }, g_q10_regs, nullptr, nullptr, 0 }, 956 { "q11", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q11, LLDB_INVALID_REGNUM, 102, 102 }, g_q11_regs, nullptr, nullptr, 0 }, 957 { "q12", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q12, LLDB_INVALID_REGNUM, 103, 103 }, g_q12_regs, nullptr, nullptr, 0 }, 958 { "q13", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q13, LLDB_INVALID_REGNUM, 104, 104 }, g_q13_regs, nullptr, nullptr, 0 }, 959 { "q14", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q14, LLDB_INVALID_REGNUM, 105, 105 }, g_q14_regs, nullptr, nullptr, 0 }, 960 { "q15", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q15, LLDB_INVALID_REGNUM, 106, 106 }, g_q15_regs, nullptr, nullptr, 0 } 961 }; 962 // clang-format on 963 964 static const uint32_t num_registers = llvm::array_lengthof(g_register_infos); 965 static ConstString gpr_reg_set("General Purpose Registers"); 966 static ConstString sfp_reg_set("Software Floating Point Registers"); 967 static ConstString vfp_reg_set("Floating Point Registers"); 968 size_t i; 969 if (from_scratch) { 970 // Calculate the offsets of the registers 971 // Note that the layout of the "composite" registers (d0-d15 and q0-q15) 972 // which comes after the "primordial" registers is important. This enables 973 // us to calculate the offset of the composite register by using the offset 974 // of its first primordial register. For example, to calculate the offset 975 // of q0, use s0's offset. 976 if (g_register_infos[2].byte_offset == 0) { 977 uint32_t byte_offset = 0; 978 for (i = 0; i < num_registers; ++i) { 979 // For primordial registers, increment the byte_offset by the byte_size 980 // to arrive at the byte_offset for the next register. Otherwise, we 981 // have a composite register whose offset can be calculated by 982 // consulting the offset of its first primordial register. 983 if (!g_register_infos[i].value_regs) { 984 g_register_infos[i].byte_offset = byte_offset; 985 byte_offset += g_register_infos[i].byte_size; 986 } else { 987 const uint32_t first_primordial_reg = 988 g_register_infos[i].value_regs[0]; 989 g_register_infos[i].byte_offset = 990 g_register_infos[first_primordial_reg].byte_offset; 991 } 992 } 993 } 994 for (i = 0; i < num_registers; ++i) { 995 ConstString name; 996 ConstString alt_name; 997 if (g_register_infos[i].name && g_register_infos[i].name[0]) 998 name.SetCString(g_register_infos[i].name); 999 if (g_register_infos[i].alt_name && g_register_infos[i].alt_name[0]) 1000 alt_name.SetCString(g_register_infos[i].alt_name); 1001 1002 if (i <= 15 || i == 25) 1003 AddRegister(g_register_infos[i], name, alt_name, gpr_reg_set); 1004 else if (i <= 24) 1005 AddRegister(g_register_infos[i], name, alt_name, sfp_reg_set); 1006 else 1007 AddRegister(g_register_infos[i], name, alt_name, vfp_reg_set); 1008 } 1009 } else { 1010 // Add composite registers to our primordial registers, then. 1011 const size_t num_composites = llvm::array_lengthof(g_composites); 1012 const size_t num_dynamic_regs = GetNumRegisters(); 1013 const size_t num_common_regs = num_registers - num_composites; 1014 RegisterInfo *g_comp_register_infos = g_register_infos + num_common_regs; 1015 1016 // First we need to validate that all registers that we already have match 1017 // the non composite regs. If so, then we can add the registers, else we 1018 // need to bail 1019 bool match = true; 1020 if (num_dynamic_regs == num_common_regs) { 1021 for (i = 0; match && i < num_dynamic_regs; ++i) { 1022 // Make sure all register names match 1023 if (m_regs[i].name && g_register_infos[i].name) { 1024 if (strcmp(m_regs[i].name, g_register_infos[i].name)) { 1025 match = false; 1026 break; 1027 } 1028 } 1029 1030 // Make sure all register byte sizes match 1031 if (m_regs[i].byte_size != g_register_infos[i].byte_size) { 1032 match = false; 1033 break; 1034 } 1035 } 1036 } else { 1037 // Wrong number of registers. 1038 match = false; 1039 } 1040 // If "match" is true, then we can add extra registers. 1041 if (match) { 1042 for (i = 0; i < num_composites; ++i) { 1043 ConstString name; 1044 ConstString alt_name; 1045 const uint32_t first_primordial_reg = 1046 g_comp_register_infos[i].value_regs[0]; 1047 const char *reg_name = g_register_infos[first_primordial_reg].name; 1048 if (reg_name && reg_name[0]) { 1049 for (uint32_t j = 0; j < num_dynamic_regs; ++j) { 1050 const RegisterInfo *reg_info = GetRegisterInfoAtIndex(j); 1051 // Find a matching primordial register info entry. 1052 if (reg_info && reg_info->name && 1053 ::strcasecmp(reg_info->name, reg_name) == 0) { 1054 // The name matches the existing primordial entry. Find and 1055 // assign the offset, and then add this composite register entry. 1056 g_comp_register_infos[i].byte_offset = reg_info->byte_offset; 1057 name.SetCString(g_comp_register_infos[i].name); 1058 AddRegister(g_comp_register_infos[i], name, alt_name, 1059 vfp_reg_set); 1060 } 1061 } 1062 } 1063 } 1064 } 1065 } 1066 } 1067