1 //===-- UnwindAssemblyInstEmulation.cpp -----------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "UnwindAssemblyInstEmulation.h" 10 11 #include "lldb/Core/Address.h" 12 #include "lldb/Core/Disassembler.h" 13 #include "lldb/Core/DumpDataExtractor.h" 14 #include "lldb/Core/DumpRegisterValue.h" 15 #include "lldb/Core/FormatEntity.h" 16 #include "lldb/Core/PluginManager.h" 17 #include "lldb/Target/ExecutionContext.h" 18 #include "lldb/Target/Process.h" 19 #include "lldb/Target/Target.h" 20 #include "lldb/Target/Thread.h" 21 #include "lldb/Utility/ArchSpec.h" 22 #include "lldb/Utility/DataBufferHeap.h" 23 #include "lldb/Utility/DataExtractor.h" 24 #include "lldb/Utility/Log.h" 25 #include "lldb/Utility/Status.h" 26 #include "lldb/Utility/StreamString.h" 27 28 using namespace lldb; 29 using namespace lldb_private; 30 31 LLDB_PLUGIN_DEFINE(UnwindAssemblyInstEmulation) 32 33 // UnwindAssemblyInstEmulation method definitions 34 35 bool UnwindAssemblyInstEmulation::GetNonCallSiteUnwindPlanFromAssembly( 36 AddressRange &range, Thread &thread, UnwindPlan &unwind_plan) { 37 std::vector<uint8_t> function_text(range.GetByteSize()); 38 ProcessSP process_sp(thread.GetProcess()); 39 if (process_sp) { 40 Status error; 41 const bool force_live_memory = true; 42 if (process_sp->GetTarget().ReadMemory( 43 range.GetBaseAddress(), function_text.data(), range.GetByteSize(), 44 error, force_live_memory) != range.GetByteSize()) { 45 return false; 46 } 47 } 48 return GetNonCallSiteUnwindPlanFromAssembly( 49 range, function_text.data(), function_text.size(), unwind_plan); 50 } 51 52 bool UnwindAssemblyInstEmulation::GetNonCallSiteUnwindPlanFromAssembly( 53 AddressRange &range, uint8_t *opcode_data, size_t opcode_size, 54 UnwindPlan &unwind_plan) { 55 if (opcode_data == nullptr || opcode_size == 0) 56 return false; 57 58 if (range.GetByteSize() > 0 && range.GetBaseAddress().IsValid() && 59 m_inst_emulator_up.get()) { 60 61 // The instruction emulation subclass setup the unwind plan for the first 62 // instruction. 63 m_inst_emulator_up->CreateFunctionEntryUnwind(unwind_plan); 64 65 // CreateFunctionEntryUnwind should have created the first row. If it 66 // doesn't, then we are done. 67 if (unwind_plan.GetRowCount() == 0) 68 return false; 69 70 const bool prefer_file_cache = true; 71 DisassemblerSP disasm_sp(Disassembler::DisassembleBytes( 72 m_arch, nullptr, nullptr, range.GetBaseAddress(), opcode_data, 73 opcode_size, 99999, prefer_file_cache)); 74 75 Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_UNWIND)); 76 77 if (disasm_sp) { 78 79 m_range_ptr = ⦥ 80 m_unwind_plan_ptr = &unwind_plan; 81 82 const uint32_t addr_byte_size = m_arch.GetAddressByteSize(); 83 const bool show_address = true; 84 const bool show_bytes = true; 85 m_inst_emulator_up->GetRegisterInfo(unwind_plan.GetRegisterKind(), 86 unwind_plan.GetInitialCFARegister(), 87 m_cfa_reg_info); 88 89 m_fp_is_cfa = false; 90 m_register_values.clear(); 91 m_pushed_regs.clear(); 92 93 // Initialize the CFA with a known value. In the 32 bit case it will be 94 // 0x80000000, and in the 64 bit case 0x8000000000000000. We use the 95 // address byte size to be safe for any future address sizes 96 m_initial_sp = (1ull << ((addr_byte_size * 8) - 1)); 97 RegisterValue cfa_reg_value; 98 cfa_reg_value.SetUInt(m_initial_sp, m_cfa_reg_info.byte_size); 99 SetRegisterValue(m_cfa_reg_info, cfa_reg_value); 100 101 const InstructionList &inst_list = disasm_sp->GetInstructionList(); 102 const size_t num_instructions = inst_list.GetSize(); 103 104 if (num_instructions > 0) { 105 Instruction *inst = inst_list.GetInstructionAtIndex(0).get(); 106 const lldb::addr_t base_addr = inst->GetAddress().GetFileAddress(); 107 108 // Map for storing the unwind plan row and the value of the registers 109 // at a given offset. When we see a forward branch we add a new entry 110 // to this map with the actual unwind plan row and register context for 111 // the target address of the branch as the current data have to be 112 // valid for the target address of the branch too if we are in the same 113 // function. 114 std::map<lldb::addr_t, std::pair<UnwindPlan::RowSP, RegisterValueMap>> 115 saved_unwind_states; 116 117 // Make a copy of the current instruction Row and save it in m_curr_row 118 // so we can add updates as we process the instructions. 119 UnwindPlan::RowSP last_row = unwind_plan.GetLastRow(); 120 UnwindPlan::Row *newrow = new UnwindPlan::Row; 121 if (last_row.get()) 122 *newrow = *last_row.get(); 123 m_curr_row.reset(newrow); 124 125 // Add the initial state to the save list with offset 0. 126 saved_unwind_states.insert({0, {last_row, m_register_values}}); 127 128 // cache the stack pointer register number (in whatever register 129 // numbering this UnwindPlan uses) for quick reference during 130 // instruction parsing. 131 RegisterInfo sp_reg_info; 132 m_inst_emulator_up->GetRegisterInfo( 133 eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, sp_reg_info); 134 135 // The architecture dependent condition code of the last processed 136 // instruction. 137 EmulateInstruction::InstructionCondition last_condition = 138 EmulateInstruction::UnconditionalCondition; 139 lldb::addr_t condition_block_start_offset = 0; 140 141 for (size_t idx = 0; idx < num_instructions; ++idx) { 142 m_curr_row_modified = false; 143 m_forward_branch_offset = 0; 144 145 inst = inst_list.GetInstructionAtIndex(idx).get(); 146 if (inst) { 147 lldb::addr_t current_offset = 148 inst->GetAddress().GetFileAddress() - base_addr; 149 auto it = saved_unwind_states.upper_bound(current_offset); 150 assert(it != saved_unwind_states.begin() && 151 "Unwind row for the function entry missing"); 152 --it; // Move it to the row corresponding to the current offset 153 154 // If the offset of m_curr_row don't match with the offset we see 155 // in saved_unwind_states then we have to update m_curr_row and 156 // m_register_values based on the saved values. It is happening 157 // after we processed an epilogue and a return to caller 158 // instruction. 159 if (it->second.first->GetOffset() != m_curr_row->GetOffset()) { 160 UnwindPlan::Row *newrow = new UnwindPlan::Row; 161 *newrow = *it->second.first; 162 m_curr_row.reset(newrow); 163 m_register_values = it->second.second; 164 // re-set the CFA register ivars to match the 165 // new m_curr_row. 166 if (sp_reg_info.name && 167 m_curr_row->GetCFAValue().IsRegisterPlusOffset()) { 168 uint32_t row_cfa_regnum = 169 m_curr_row->GetCFAValue().GetRegisterNumber(); 170 lldb::RegisterKind row_kind = 171 m_unwind_plan_ptr->GetRegisterKind(); 172 // set m_cfa_reg_info to the row's CFA reg. 173 m_inst_emulator_up->GetRegisterInfo(row_kind, row_cfa_regnum, 174 m_cfa_reg_info); 175 // set m_fp_is_cfa. 176 if (sp_reg_info.kinds[row_kind] == row_cfa_regnum) 177 m_fp_is_cfa = false; 178 else 179 m_fp_is_cfa = true; 180 } 181 } 182 183 m_inst_emulator_up->SetInstruction(inst->GetOpcode(), 184 inst->GetAddress(), nullptr); 185 186 if (last_condition != 187 m_inst_emulator_up->GetInstructionCondition()) { 188 if (m_inst_emulator_up->GetInstructionCondition() != 189 EmulateInstruction::UnconditionalCondition && 190 saved_unwind_states.count(current_offset) == 0) { 191 // If we don't have a saved row for the current offset then 192 // save our current state because we will have to restore it 193 // after the conditional block. 194 auto new_row = 195 std::make_shared<UnwindPlan::Row>(*m_curr_row.get()); 196 saved_unwind_states.insert( 197 {current_offset, {new_row, m_register_values}}); 198 } 199 200 // If the last instruction was conditional with a different 201 // condition then the then current condition then restore the 202 // condition. 203 if (last_condition != 204 EmulateInstruction::UnconditionalCondition) { 205 const auto &saved_state = 206 saved_unwind_states.at(condition_block_start_offset); 207 m_curr_row = 208 std::make_shared<UnwindPlan::Row>(*saved_state.first); 209 m_curr_row->SetOffset(current_offset); 210 m_register_values = saved_state.second; 211 // re-set the CFA register ivars to match the 212 // new m_curr_row. 213 if (sp_reg_info.name && 214 m_curr_row->GetCFAValue().IsRegisterPlusOffset()) { 215 uint32_t row_cfa_regnum = 216 m_curr_row->GetCFAValue().GetRegisterNumber(); 217 lldb::RegisterKind row_kind = 218 m_unwind_plan_ptr->GetRegisterKind(); 219 // set m_cfa_reg_info to the row's CFA reg. 220 m_inst_emulator_up->GetRegisterInfo(row_kind, row_cfa_regnum, 221 m_cfa_reg_info); 222 // set m_fp_is_cfa. 223 if (sp_reg_info.kinds[row_kind] == row_cfa_regnum) 224 m_fp_is_cfa = false; 225 else 226 m_fp_is_cfa = true; 227 } 228 bool replace_existing = 229 true; // The last instruction might already 230 // created a row for this offset and 231 // we want to overwrite it. 232 unwind_plan.InsertRow( 233 std::make_shared<UnwindPlan::Row>(*m_curr_row), 234 replace_existing); 235 } 236 237 // We are starting a new conditional block at the actual offset 238 condition_block_start_offset = current_offset; 239 } 240 241 if (log && log->GetVerbose()) { 242 StreamString strm; 243 lldb_private::FormatEntity::Entry format; 244 FormatEntity::Parse("${frame.pc}: ", format); 245 inst->Dump(&strm, inst_list.GetMaxOpcocdeByteSize(), show_address, 246 show_bytes, nullptr, nullptr, nullptr, &format, 0); 247 log->PutString(strm.GetString()); 248 } 249 250 last_condition = m_inst_emulator_up->GetInstructionCondition(); 251 252 m_inst_emulator_up->EvaluateInstruction( 253 eEmulateInstructionOptionIgnoreConditions); 254 255 // If the current instruction is a branch forward then save the 256 // current CFI information for the offset where we are branching. 257 if (m_forward_branch_offset != 0 && 258 range.ContainsFileAddress(inst->GetAddress().GetFileAddress() + 259 m_forward_branch_offset)) { 260 auto newrow = 261 std::make_shared<UnwindPlan::Row>(*m_curr_row.get()); 262 newrow->SetOffset(current_offset + m_forward_branch_offset); 263 saved_unwind_states.insert( 264 {current_offset + m_forward_branch_offset, 265 {newrow, m_register_values}}); 266 unwind_plan.InsertRow(newrow); 267 } 268 269 // Were there any changes to the CFI while evaluating this 270 // instruction? 271 if (m_curr_row_modified) { 272 // Save the modified row if we don't already have a CFI row in 273 // the current address 274 if (saved_unwind_states.count( 275 current_offset + inst->GetOpcode().GetByteSize()) == 0) { 276 m_curr_row->SetOffset(current_offset + 277 inst->GetOpcode().GetByteSize()); 278 unwind_plan.InsertRow(m_curr_row); 279 saved_unwind_states.insert( 280 {current_offset + inst->GetOpcode().GetByteSize(), 281 {m_curr_row, m_register_values}}); 282 283 // Allocate a new Row for m_curr_row, copy the current state 284 // into it 285 UnwindPlan::Row *newrow = new UnwindPlan::Row; 286 *newrow = *m_curr_row.get(); 287 m_curr_row.reset(newrow); 288 } 289 } 290 } 291 } 292 } 293 } 294 295 if (log && log->GetVerbose()) { 296 StreamString strm; 297 lldb::addr_t base_addr = range.GetBaseAddress().GetFileAddress(); 298 strm.Printf("Resulting unwind rows for [0x%" PRIx64 " - 0x%" PRIx64 "):", 299 base_addr, base_addr + range.GetByteSize()); 300 unwind_plan.Dump(strm, nullptr, base_addr); 301 log->PutString(strm.GetString()); 302 } 303 return unwind_plan.GetRowCount() > 0; 304 } 305 return false; 306 } 307 308 bool UnwindAssemblyInstEmulation::AugmentUnwindPlanFromCallSite( 309 AddressRange &func, Thread &thread, UnwindPlan &unwind_plan) { 310 return false; 311 } 312 313 bool UnwindAssemblyInstEmulation::GetFastUnwindPlan(AddressRange &func, 314 Thread &thread, 315 UnwindPlan &unwind_plan) { 316 return false; 317 } 318 319 bool UnwindAssemblyInstEmulation::FirstNonPrologueInsn( 320 AddressRange &func, const ExecutionContext &exe_ctx, 321 Address &first_non_prologue_insn) { 322 return false; 323 } 324 325 UnwindAssembly * 326 UnwindAssemblyInstEmulation::CreateInstance(const ArchSpec &arch) { 327 std::unique_ptr<EmulateInstruction> inst_emulator_up( 328 EmulateInstruction::FindPlugin(arch, eInstructionTypePrologueEpilogue, 329 nullptr)); 330 // Make sure that all prologue instructions are handled 331 if (inst_emulator_up) 332 return new UnwindAssemblyInstEmulation(arch, inst_emulator_up.release()); 333 return nullptr; 334 } 335 336 // PluginInterface protocol in UnwindAssemblyParser_x86 337 ConstString UnwindAssemblyInstEmulation::GetPluginName() { 338 return GetPluginNameStatic(); 339 } 340 341 uint32_t UnwindAssemblyInstEmulation::GetPluginVersion() { return 1; } 342 343 void UnwindAssemblyInstEmulation::Initialize() { 344 PluginManager::RegisterPlugin(GetPluginNameStatic(), 345 GetPluginDescriptionStatic(), CreateInstance); 346 } 347 348 void UnwindAssemblyInstEmulation::Terminate() { 349 PluginManager::UnregisterPlugin(CreateInstance); 350 } 351 352 ConstString UnwindAssemblyInstEmulation::GetPluginNameStatic() { 353 static ConstString g_name("inst-emulation"); 354 return g_name; 355 } 356 357 const char *UnwindAssemblyInstEmulation::GetPluginDescriptionStatic() { 358 return "Instruction emulation based unwind information."; 359 } 360 361 uint64_t UnwindAssemblyInstEmulation::MakeRegisterKindValuePair( 362 const RegisterInfo ®_info) { 363 lldb::RegisterKind reg_kind; 364 uint32_t reg_num; 365 if (EmulateInstruction::GetBestRegisterKindAndNumber(®_info, reg_kind, 366 reg_num)) 367 return (uint64_t)reg_kind << 24 | reg_num; 368 return 0ull; 369 } 370 371 void UnwindAssemblyInstEmulation::SetRegisterValue( 372 const RegisterInfo ®_info, const RegisterValue ®_value) { 373 m_register_values[MakeRegisterKindValuePair(reg_info)] = reg_value; 374 } 375 376 bool UnwindAssemblyInstEmulation::GetRegisterValue(const RegisterInfo ®_info, 377 RegisterValue ®_value) { 378 const uint64_t reg_id = MakeRegisterKindValuePair(reg_info); 379 RegisterValueMap::const_iterator pos = m_register_values.find(reg_id); 380 if (pos != m_register_values.end()) { 381 reg_value = pos->second; 382 return true; // We had a real value that comes from an opcode that wrote 383 // to it... 384 } 385 // We are making up a value that is recognizable... 386 reg_value.SetUInt(reg_id, reg_info.byte_size); 387 return false; 388 } 389 390 size_t UnwindAssemblyInstEmulation::ReadMemory( 391 EmulateInstruction *instruction, void *baton, 392 const EmulateInstruction::Context &context, lldb::addr_t addr, void *dst, 393 size_t dst_len) { 394 Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_UNWIND)); 395 396 if (log && log->GetVerbose()) { 397 StreamString strm; 398 strm.Printf( 399 "UnwindAssemblyInstEmulation::ReadMemory (addr = 0x%16.16" PRIx64 400 ", dst = %p, dst_len = %" PRIu64 ", context = ", 401 addr, dst, (uint64_t)dst_len); 402 context.Dump(strm, instruction); 403 log->PutString(strm.GetString()); 404 } 405 memset(dst, 0, dst_len); 406 return dst_len; 407 } 408 409 size_t UnwindAssemblyInstEmulation::WriteMemory( 410 EmulateInstruction *instruction, void *baton, 411 const EmulateInstruction::Context &context, lldb::addr_t addr, 412 const void *dst, size_t dst_len) { 413 if (baton && dst && dst_len) 414 return ((UnwindAssemblyInstEmulation *)baton) 415 ->WriteMemory(instruction, context, addr, dst, dst_len); 416 return 0; 417 } 418 419 size_t UnwindAssemblyInstEmulation::WriteMemory( 420 EmulateInstruction *instruction, const EmulateInstruction::Context &context, 421 lldb::addr_t addr, const void *dst, size_t dst_len) { 422 DataExtractor data(dst, dst_len, 423 instruction->GetArchitecture().GetByteOrder(), 424 instruction->GetArchitecture().GetAddressByteSize()); 425 426 Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_UNWIND)); 427 428 if (log && log->GetVerbose()) { 429 StreamString strm; 430 431 strm.PutCString("UnwindAssemblyInstEmulation::WriteMemory ("); 432 DumpDataExtractor(data, &strm, 0, eFormatBytes, 1, dst_len, UINT32_MAX, 433 addr, 0, 0); 434 strm.PutCString(", context = "); 435 context.Dump(strm, instruction); 436 log->PutString(strm.GetString()); 437 } 438 439 const bool cant_replace = false; 440 441 switch (context.type) { 442 default: 443 case EmulateInstruction::eContextInvalid: 444 case EmulateInstruction::eContextReadOpcode: 445 case EmulateInstruction::eContextImmediate: 446 case EmulateInstruction::eContextAdjustBaseRegister: 447 case EmulateInstruction::eContextRegisterPlusOffset: 448 case EmulateInstruction::eContextAdjustPC: 449 case EmulateInstruction::eContextRegisterStore: 450 case EmulateInstruction::eContextRegisterLoad: 451 case EmulateInstruction::eContextRelativeBranchImmediate: 452 case EmulateInstruction::eContextAbsoluteBranchRegister: 453 case EmulateInstruction::eContextSupervisorCall: 454 case EmulateInstruction::eContextTableBranchReadMemory: 455 case EmulateInstruction::eContextWriteRegisterRandomBits: 456 case EmulateInstruction::eContextWriteMemoryRandomBits: 457 case EmulateInstruction::eContextArithmetic: 458 case EmulateInstruction::eContextAdvancePC: 459 case EmulateInstruction::eContextReturnFromException: 460 case EmulateInstruction::eContextPopRegisterOffStack: 461 case EmulateInstruction::eContextAdjustStackPointer: 462 break; 463 464 case EmulateInstruction::eContextPushRegisterOnStack: { 465 uint32_t reg_num = LLDB_INVALID_REGNUM; 466 uint32_t generic_regnum = LLDB_INVALID_REGNUM; 467 assert(context.info_type == 468 EmulateInstruction::eInfoTypeRegisterToRegisterPlusOffset && 469 "unhandled case, add code to handle this!"); 470 const uint32_t unwind_reg_kind = m_unwind_plan_ptr->GetRegisterKind(); 471 reg_num = context.info.RegisterToRegisterPlusOffset.data_reg 472 .kinds[unwind_reg_kind]; 473 generic_regnum = context.info.RegisterToRegisterPlusOffset.data_reg 474 .kinds[eRegisterKindGeneric]; 475 476 if (reg_num != LLDB_INVALID_REGNUM && 477 generic_regnum != LLDB_REGNUM_GENERIC_SP) { 478 if (m_pushed_regs.find(reg_num) == m_pushed_regs.end()) { 479 m_pushed_regs[reg_num] = addr; 480 const int32_t offset = addr - m_initial_sp; 481 m_curr_row->SetRegisterLocationToAtCFAPlusOffset(reg_num, offset, 482 cant_replace); 483 m_curr_row_modified = true; 484 } 485 } 486 } break; 487 } 488 489 return dst_len; 490 } 491 492 bool UnwindAssemblyInstEmulation::ReadRegister(EmulateInstruction *instruction, 493 void *baton, 494 const RegisterInfo *reg_info, 495 RegisterValue ®_value) { 496 497 if (baton && reg_info) 498 return ((UnwindAssemblyInstEmulation *)baton) 499 ->ReadRegister(instruction, reg_info, reg_value); 500 return false; 501 } 502 bool UnwindAssemblyInstEmulation::ReadRegister(EmulateInstruction *instruction, 503 const RegisterInfo *reg_info, 504 RegisterValue ®_value) { 505 bool synthetic = GetRegisterValue(*reg_info, reg_value); 506 507 Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_UNWIND)); 508 509 if (log && log->GetVerbose()) { 510 511 StreamString strm; 512 strm.Printf("UnwindAssemblyInstEmulation::ReadRegister (name = \"%s\") => " 513 "synthetic_value = %i, value = ", 514 reg_info->name, synthetic); 515 DumpRegisterValue(reg_value, &strm, reg_info, false, false, eFormatDefault); 516 log->PutString(strm.GetString()); 517 } 518 return true; 519 } 520 521 bool UnwindAssemblyInstEmulation::WriteRegister( 522 EmulateInstruction *instruction, void *baton, 523 const EmulateInstruction::Context &context, const RegisterInfo *reg_info, 524 const RegisterValue ®_value) { 525 if (baton && reg_info) 526 return ((UnwindAssemblyInstEmulation *)baton) 527 ->WriteRegister(instruction, context, reg_info, reg_value); 528 return false; 529 } 530 bool UnwindAssemblyInstEmulation::WriteRegister( 531 EmulateInstruction *instruction, const EmulateInstruction::Context &context, 532 const RegisterInfo *reg_info, const RegisterValue ®_value) { 533 Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_UNWIND)); 534 535 if (log && log->GetVerbose()) { 536 537 StreamString strm; 538 strm.Printf( 539 "UnwindAssemblyInstEmulation::WriteRegister (name = \"%s\", value = ", 540 reg_info->name); 541 DumpRegisterValue(reg_value, &strm, reg_info, false, false, eFormatDefault); 542 strm.PutCString(", context = "); 543 context.Dump(strm, instruction); 544 log->PutString(strm.GetString()); 545 } 546 547 SetRegisterValue(*reg_info, reg_value); 548 549 switch (context.type) { 550 case EmulateInstruction::eContextInvalid: 551 case EmulateInstruction::eContextReadOpcode: 552 case EmulateInstruction::eContextImmediate: 553 case EmulateInstruction::eContextAdjustBaseRegister: 554 case EmulateInstruction::eContextRegisterPlusOffset: 555 case EmulateInstruction::eContextAdjustPC: 556 case EmulateInstruction::eContextRegisterStore: 557 case EmulateInstruction::eContextSupervisorCall: 558 case EmulateInstruction::eContextTableBranchReadMemory: 559 case EmulateInstruction::eContextWriteRegisterRandomBits: 560 case EmulateInstruction::eContextWriteMemoryRandomBits: 561 case EmulateInstruction::eContextAdvancePC: 562 case EmulateInstruction::eContextReturnFromException: 563 case EmulateInstruction::eContextPushRegisterOnStack: 564 case EmulateInstruction::eContextRegisterLoad: 565 // { 566 // const uint32_t reg_num = 567 // reg_info->kinds[m_unwind_plan_ptr->GetRegisterKind()]; 568 // if (reg_num != LLDB_INVALID_REGNUM) 569 // { 570 // const bool can_replace_only_if_unspecified = true; 571 // 572 // m_curr_row.SetRegisterLocationToUndefined (reg_num, 573 // can_replace_only_if_unspecified, 574 // can_replace_only_if_unspecified); 575 // m_curr_row_modified = true; 576 // } 577 // } 578 break; 579 580 case EmulateInstruction::eContextArithmetic: { 581 // If we adjusted the current frame pointer by a constant then adjust the 582 // CFA offset 583 // with the same amount. 584 lldb::RegisterKind kind = m_unwind_plan_ptr->GetRegisterKind(); 585 if (m_fp_is_cfa && reg_info->kinds[kind] == m_cfa_reg_info.kinds[kind] && 586 context.info_type == EmulateInstruction::eInfoTypeRegisterPlusOffset && 587 context.info.RegisterPlusOffset.reg.kinds[kind] == 588 m_cfa_reg_info.kinds[kind]) { 589 const int64_t offset = context.info.RegisterPlusOffset.signed_offset; 590 m_curr_row->GetCFAValue().IncOffset(-1 * offset); 591 m_curr_row_modified = true; 592 } 593 } break; 594 595 case EmulateInstruction::eContextAbsoluteBranchRegister: 596 case EmulateInstruction::eContextRelativeBranchImmediate: { 597 if (context.info_type == EmulateInstruction::eInfoTypeISAAndImmediate && 598 context.info.ISAAndImmediate.unsigned_data32 > 0) { 599 m_forward_branch_offset = 600 context.info.ISAAndImmediateSigned.signed_data32; 601 } else if (context.info_type == 602 EmulateInstruction::eInfoTypeISAAndImmediateSigned && 603 context.info.ISAAndImmediateSigned.signed_data32 > 0) { 604 m_forward_branch_offset = context.info.ISAAndImmediate.unsigned_data32; 605 } else if (context.info_type == EmulateInstruction::eInfoTypeImmediate && 606 context.info.unsigned_immediate > 0) { 607 m_forward_branch_offset = context.info.unsigned_immediate; 608 } else if (context.info_type == 609 EmulateInstruction::eInfoTypeImmediateSigned && 610 context.info.signed_immediate > 0) { 611 m_forward_branch_offset = context.info.signed_immediate; 612 } 613 } break; 614 615 case EmulateInstruction::eContextPopRegisterOffStack: { 616 const uint32_t reg_num = 617 reg_info->kinds[m_unwind_plan_ptr->GetRegisterKind()]; 618 const uint32_t generic_regnum = reg_info->kinds[eRegisterKindGeneric]; 619 if (reg_num != LLDB_INVALID_REGNUM && 620 generic_regnum != LLDB_REGNUM_GENERIC_SP) { 621 switch (context.info_type) { 622 case EmulateInstruction::eInfoTypeAddress: 623 if (m_pushed_regs.find(reg_num) != m_pushed_regs.end() && 624 context.info.address == m_pushed_regs[reg_num]) { 625 m_curr_row->SetRegisterLocationToSame(reg_num, 626 false /*must_replace*/); 627 m_curr_row_modified = true; 628 } 629 break; 630 case EmulateInstruction::eInfoTypeISA: 631 assert( 632 (generic_regnum == LLDB_REGNUM_GENERIC_PC || 633 generic_regnum == LLDB_REGNUM_GENERIC_FLAGS) && 634 "eInfoTypeISA used for popping a register other the PC/FLAGS"); 635 if (generic_regnum != LLDB_REGNUM_GENERIC_FLAGS) { 636 m_curr_row->SetRegisterLocationToSame(reg_num, 637 false /*must_replace*/); 638 m_curr_row_modified = true; 639 } 640 break; 641 default: 642 assert(false && "unhandled case, add code to handle this!"); 643 break; 644 } 645 } 646 } break; 647 648 case EmulateInstruction::eContextSetFramePointer: 649 if (!m_fp_is_cfa) { 650 m_fp_is_cfa = true; 651 m_cfa_reg_info = *reg_info; 652 const uint32_t cfa_reg_num = 653 reg_info->kinds[m_unwind_plan_ptr->GetRegisterKind()]; 654 assert(cfa_reg_num != LLDB_INVALID_REGNUM); 655 m_curr_row->GetCFAValue().SetIsRegisterPlusOffset( 656 cfa_reg_num, m_initial_sp - reg_value.GetAsUInt64()); 657 m_curr_row_modified = true; 658 } 659 break; 660 661 case EmulateInstruction::eContextRestoreStackPointer: 662 if (m_fp_is_cfa) { 663 m_fp_is_cfa = false; 664 m_cfa_reg_info = *reg_info; 665 const uint32_t cfa_reg_num = 666 reg_info->kinds[m_unwind_plan_ptr->GetRegisterKind()]; 667 assert(cfa_reg_num != LLDB_INVALID_REGNUM); 668 m_curr_row->GetCFAValue().SetIsRegisterPlusOffset( 669 cfa_reg_num, m_initial_sp - reg_value.GetAsUInt64()); 670 m_curr_row_modified = true; 671 } 672 break; 673 674 case EmulateInstruction::eContextAdjustStackPointer: 675 // If we have created a frame using the frame pointer, don't follow 676 // subsequent adjustments to the stack pointer. 677 if (!m_fp_is_cfa) { 678 m_curr_row->GetCFAValue().SetIsRegisterPlusOffset( 679 m_curr_row->GetCFAValue().GetRegisterNumber(), 680 m_initial_sp - reg_value.GetAsUInt64()); 681 m_curr_row_modified = true; 682 } 683 break; 684 } 685 return true; 686 } 687