1 //===-- UnwindAssemblyInstEmulation.cpp -----------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "UnwindAssemblyInstEmulation.h"
10 
11 #include "lldb/Core/Address.h"
12 #include "lldb/Core/Disassembler.h"
13 #include "lldb/Core/DumpDataExtractor.h"
14 #include "lldb/Core/DumpRegisterValue.h"
15 #include "lldb/Core/FormatEntity.h"
16 #include "lldb/Core/PluginManager.h"
17 #include "lldb/Target/ExecutionContext.h"
18 #include "lldb/Target/Process.h"
19 #include "lldb/Target/Target.h"
20 #include "lldb/Target/Thread.h"
21 #include "lldb/Utility/ArchSpec.h"
22 #include "lldb/Utility/DataBufferHeap.h"
23 #include "lldb/Utility/DataExtractor.h"
24 #include "lldb/Utility/Log.h"
25 #include "lldb/Utility/Status.h"
26 #include "lldb/Utility/StreamString.h"
27 
28 using namespace lldb;
29 using namespace lldb_private;
30 
31 LLDB_PLUGIN_DEFINE(UnwindAssemblyInstEmulation)
32 
33 //  UnwindAssemblyInstEmulation method definitions
34 
35 bool UnwindAssemblyInstEmulation::GetNonCallSiteUnwindPlanFromAssembly(
36     AddressRange &range, Thread &thread, UnwindPlan &unwind_plan) {
37   std::vector<uint8_t> function_text(range.GetByteSize());
38   ProcessSP process_sp(thread.GetProcess());
39   if (process_sp) {
40     Status error;
41     const bool force_live_memory = true;
42     if (process_sp->GetTarget().ReadMemory(
43             range.GetBaseAddress(), function_text.data(), range.GetByteSize(),
44             error, force_live_memory) != range.GetByteSize()) {
45       return false;
46     }
47   }
48   return GetNonCallSiteUnwindPlanFromAssembly(
49       range, function_text.data(), function_text.size(), unwind_plan);
50 }
51 
52 bool UnwindAssemblyInstEmulation::GetNonCallSiteUnwindPlanFromAssembly(
53     AddressRange &range, uint8_t *opcode_data, size_t opcode_size,
54     UnwindPlan &unwind_plan) {
55   if (opcode_data == nullptr || opcode_size == 0)
56     return false;
57 
58   if (range.GetByteSize() > 0 && range.GetBaseAddress().IsValid() &&
59       m_inst_emulator_up.get()) {
60 
61     // The instruction emulation subclass setup the unwind plan for the first
62     // instruction.
63     m_inst_emulator_up->CreateFunctionEntryUnwind(unwind_plan);
64 
65     // CreateFunctionEntryUnwind should have created the first row. If it
66     // doesn't, then we are done.
67     if (unwind_plan.GetRowCount() == 0)
68       return false;
69 
70     const bool prefer_file_cache = true;
71     DisassemblerSP disasm_sp(Disassembler::DisassembleBytes(
72         m_arch, nullptr, nullptr, range.GetBaseAddress(), opcode_data,
73         opcode_size, 99999, prefer_file_cache));
74 
75     Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_UNWIND));
76 
77     if (disasm_sp) {
78 
79       m_range_ptr = &range;
80       m_unwind_plan_ptr = &unwind_plan;
81 
82       const uint32_t addr_byte_size = m_arch.GetAddressByteSize();
83       const bool show_address = true;
84       const bool show_bytes = true;
85       m_inst_emulator_up->GetRegisterInfo(unwind_plan.GetRegisterKind(),
86                                           unwind_plan.GetInitialCFARegister(),
87                                           m_cfa_reg_info);
88 
89       m_fp_is_cfa = false;
90       m_register_values.clear();
91       m_pushed_regs.clear();
92 
93       // Initialize the CFA with a known value. In the 32 bit case it will be
94       // 0x80000000, and in the 64 bit case 0x8000000000000000. We use the
95       // address byte size to be safe for any future address sizes
96       m_initial_sp = (1ull << ((addr_byte_size * 8) - 1));
97       RegisterValue cfa_reg_value;
98       cfa_reg_value.SetUInt(m_initial_sp, m_cfa_reg_info.byte_size);
99       SetRegisterValue(m_cfa_reg_info, cfa_reg_value);
100 
101       const InstructionList &inst_list = disasm_sp->GetInstructionList();
102       const size_t num_instructions = inst_list.GetSize();
103 
104       if (num_instructions > 0) {
105         Instruction *inst = inst_list.GetInstructionAtIndex(0).get();
106         const lldb::addr_t base_addr = inst->GetAddress().GetFileAddress();
107 
108         // Map for storing the unwind plan row and the value of the registers
109         // at a given offset. When we see a forward branch we add a new entry
110         // to this map with the actual unwind plan row and register context for
111         // the target address of the branch as the current data have to be
112         // valid for the target address of the branch too if we are in the same
113         // function.
114         std::map<lldb::addr_t, std::pair<UnwindPlan::RowSP, RegisterValueMap>>
115             saved_unwind_states;
116 
117         // Make a copy of the current instruction Row and save it in m_curr_row
118         // so we can add updates as we process the instructions.
119         UnwindPlan::RowSP last_row = unwind_plan.GetLastRow();
120         UnwindPlan::Row *newrow = new UnwindPlan::Row;
121         if (last_row.get())
122           *newrow = *last_row.get();
123         m_curr_row.reset(newrow);
124 
125         // Add the initial state to the save list with offset 0.
126         saved_unwind_states.insert({0, {last_row, m_register_values}});
127 
128         // cache the stack pointer register number (in whatever register
129         // numbering this UnwindPlan uses) for quick reference during
130         // instruction parsing.
131         RegisterInfo sp_reg_info;
132         m_inst_emulator_up->GetRegisterInfo(
133             eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, sp_reg_info);
134 
135         // The architecture dependent condition code of the last processed
136         // instruction.
137         EmulateInstruction::InstructionCondition last_condition =
138             EmulateInstruction::UnconditionalCondition;
139         lldb::addr_t condition_block_start_offset = 0;
140 
141         for (size_t idx = 0; idx < num_instructions; ++idx) {
142           m_curr_row_modified = false;
143           m_forward_branch_offset = 0;
144 
145           inst = inst_list.GetInstructionAtIndex(idx).get();
146           if (inst) {
147             lldb::addr_t current_offset =
148                 inst->GetAddress().GetFileAddress() - base_addr;
149             auto it = saved_unwind_states.upper_bound(current_offset);
150             assert(it != saved_unwind_states.begin() &&
151                    "Unwind row for the function entry missing");
152             --it; // Move it to the row corresponding to the current offset
153 
154             // If the offset of m_curr_row don't match with the offset we see
155             // in saved_unwind_states then we have to update m_curr_row and
156             // m_register_values based on the saved values. It is happening
157             // after we processed an epilogue and a return to caller
158             // instruction.
159             if (it->second.first->GetOffset() != m_curr_row->GetOffset()) {
160               UnwindPlan::Row *newrow = new UnwindPlan::Row;
161               *newrow = *it->second.first;
162               m_curr_row.reset(newrow);
163               m_register_values = it->second.second;
164               // re-set the CFA register ivars to match the
165               // new m_curr_row.
166               if (sp_reg_info.name &&
167                   m_curr_row->GetCFAValue().IsRegisterPlusOffset()) {
168                 uint32_t row_cfa_regnum =
169                     m_curr_row->GetCFAValue().GetRegisterNumber();
170                 lldb::RegisterKind row_kind =
171                     m_unwind_plan_ptr->GetRegisterKind();
172                 // set m_cfa_reg_info to the row's CFA reg.
173                 m_inst_emulator_up->GetRegisterInfo(row_kind, row_cfa_regnum,
174                                                     m_cfa_reg_info);
175                 // set m_fp_is_cfa.
176                 if (sp_reg_info.kinds[row_kind] == row_cfa_regnum)
177                   m_fp_is_cfa = false;
178                 else
179                   m_fp_is_cfa = true;
180               }
181             }
182 
183             m_inst_emulator_up->SetInstruction(inst->GetOpcode(),
184                                                inst->GetAddress(), nullptr);
185 
186             if (last_condition !=
187                 m_inst_emulator_up->GetInstructionCondition()) {
188               if (m_inst_emulator_up->GetInstructionCondition() !=
189                       EmulateInstruction::UnconditionalCondition &&
190                   saved_unwind_states.count(current_offset) == 0) {
191                 // If we don't have a saved row for the current offset then
192                 // save our current state because we will have to restore it
193                 // after the conditional block.
194                 auto new_row =
195                     std::make_shared<UnwindPlan::Row>(*m_curr_row.get());
196                 saved_unwind_states.insert(
197                     {current_offset, {new_row, m_register_values}});
198               }
199 
200               // If the last instruction was conditional with a different
201               // condition then the then current condition then restore the
202               // condition.
203               if (last_condition !=
204                   EmulateInstruction::UnconditionalCondition) {
205                 const auto &saved_state =
206                     saved_unwind_states.at(condition_block_start_offset);
207                 m_curr_row =
208                     std::make_shared<UnwindPlan::Row>(*saved_state.first);
209                 m_curr_row->SetOffset(current_offset);
210                 m_register_values = saved_state.second;
211                 // re-set the CFA register ivars to match the
212                 // new m_curr_row.
213                 if (sp_reg_info.name &&
214                     m_curr_row->GetCFAValue().IsRegisterPlusOffset()) {
215                   uint32_t row_cfa_regnum =
216                       m_curr_row->GetCFAValue().GetRegisterNumber();
217                   lldb::RegisterKind row_kind =
218                       m_unwind_plan_ptr->GetRegisterKind();
219                   // set m_cfa_reg_info to the row's CFA reg.
220                   m_inst_emulator_up->GetRegisterInfo(row_kind, row_cfa_regnum,
221                                                       m_cfa_reg_info);
222                   // set m_fp_is_cfa.
223                   if (sp_reg_info.kinds[row_kind] == row_cfa_regnum)
224                     m_fp_is_cfa = false;
225                   else
226                     m_fp_is_cfa = true;
227                 }
228                 bool replace_existing =
229                     true; // The last instruction might already
230                           // created a row for this offset and
231                           // we want to overwrite it.
232                 unwind_plan.InsertRow(
233                     std::make_shared<UnwindPlan::Row>(*m_curr_row),
234                     replace_existing);
235               }
236 
237               // We are starting a new conditional block at the actual offset
238               condition_block_start_offset = current_offset;
239             }
240 
241             if (log && log->GetVerbose()) {
242               StreamString strm;
243               lldb_private::FormatEntity::Entry format;
244               FormatEntity::Parse("${frame.pc}: ", format);
245               inst->Dump(&strm, inst_list.GetMaxOpcocdeByteSize(), show_address,
246                          show_bytes, nullptr, nullptr, nullptr, &format, 0);
247               log->PutString(strm.GetString());
248             }
249 
250             last_condition = m_inst_emulator_up->GetInstructionCondition();
251 
252             m_inst_emulator_up->EvaluateInstruction(
253                 eEmulateInstructionOptionIgnoreConditions);
254 
255             // If the current instruction is a branch forward then save the
256             // current CFI information for the offset where we are branching.
257             if (m_forward_branch_offset != 0 &&
258                 range.ContainsFileAddress(inst->GetAddress().GetFileAddress() +
259                                           m_forward_branch_offset)) {
260               auto newrow =
261                   std::make_shared<UnwindPlan::Row>(*m_curr_row.get());
262               newrow->SetOffset(current_offset + m_forward_branch_offset);
263               saved_unwind_states.insert(
264                   {current_offset + m_forward_branch_offset,
265                    {newrow, m_register_values}});
266               unwind_plan.InsertRow(newrow);
267             }
268 
269             // Were there any changes to the CFI while evaluating this
270             // instruction?
271             if (m_curr_row_modified) {
272               // Save the modified row if we don't already have a CFI row in
273               // the current address
274               if (saved_unwind_states.count(
275                       current_offset + inst->GetOpcode().GetByteSize()) == 0) {
276                 m_curr_row->SetOffset(current_offset +
277                                       inst->GetOpcode().GetByteSize());
278                 unwind_plan.InsertRow(m_curr_row);
279                 saved_unwind_states.insert(
280                     {current_offset + inst->GetOpcode().GetByteSize(),
281                      {m_curr_row, m_register_values}});
282 
283                 // Allocate a new Row for m_curr_row, copy the current state
284                 // into it
285                 UnwindPlan::Row *newrow = new UnwindPlan::Row;
286                 *newrow = *m_curr_row.get();
287                 m_curr_row.reset(newrow);
288               }
289             }
290           }
291         }
292       }
293     }
294 
295     if (log && log->GetVerbose()) {
296       StreamString strm;
297       lldb::addr_t base_addr = range.GetBaseAddress().GetFileAddress();
298       strm.Printf("Resulting unwind rows for [0x%" PRIx64 " - 0x%" PRIx64 "):",
299                   base_addr, base_addr + range.GetByteSize());
300       unwind_plan.Dump(strm, nullptr, base_addr);
301       log->PutString(strm.GetString());
302     }
303     return unwind_plan.GetRowCount() > 0;
304   }
305   return false;
306 }
307 
308 bool UnwindAssemblyInstEmulation::AugmentUnwindPlanFromCallSite(
309     AddressRange &func, Thread &thread, UnwindPlan &unwind_plan) {
310   return false;
311 }
312 
313 bool UnwindAssemblyInstEmulation::GetFastUnwindPlan(AddressRange &func,
314                                                     Thread &thread,
315                                                     UnwindPlan &unwind_plan) {
316   return false;
317 }
318 
319 bool UnwindAssemblyInstEmulation::FirstNonPrologueInsn(
320     AddressRange &func, const ExecutionContext &exe_ctx,
321     Address &first_non_prologue_insn) {
322   return false;
323 }
324 
325 UnwindAssembly *
326 UnwindAssemblyInstEmulation::CreateInstance(const ArchSpec &arch) {
327   std::unique_ptr<EmulateInstruction> inst_emulator_up(
328       EmulateInstruction::FindPlugin(arch, eInstructionTypePrologueEpilogue,
329                                      nullptr));
330   // Make sure that all prologue instructions are handled
331   if (inst_emulator_up)
332     return new UnwindAssemblyInstEmulation(arch, inst_emulator_up.release());
333   return nullptr;
334 }
335 
336 void UnwindAssemblyInstEmulation::Initialize() {
337   PluginManager::RegisterPlugin(GetPluginNameStatic(),
338                                 GetPluginDescriptionStatic(), CreateInstance);
339 }
340 
341 void UnwindAssemblyInstEmulation::Terminate() {
342   PluginManager::UnregisterPlugin(CreateInstance);
343 }
344 
345 llvm::StringRef UnwindAssemblyInstEmulation::GetPluginDescriptionStatic() {
346   return "Instruction emulation based unwind information.";
347 }
348 
349 uint64_t UnwindAssemblyInstEmulation::MakeRegisterKindValuePair(
350     const RegisterInfo &reg_info) {
351   lldb::RegisterKind reg_kind;
352   uint32_t reg_num;
353   if (EmulateInstruction::GetBestRegisterKindAndNumber(&reg_info, reg_kind,
354                                                        reg_num))
355     return (uint64_t)reg_kind << 24 | reg_num;
356   return 0ull;
357 }
358 
359 void UnwindAssemblyInstEmulation::SetRegisterValue(
360     const RegisterInfo &reg_info, const RegisterValue &reg_value) {
361   m_register_values[MakeRegisterKindValuePair(reg_info)] = reg_value;
362 }
363 
364 bool UnwindAssemblyInstEmulation::GetRegisterValue(const RegisterInfo &reg_info,
365                                                    RegisterValue &reg_value) {
366   const uint64_t reg_id = MakeRegisterKindValuePair(reg_info);
367   RegisterValueMap::const_iterator pos = m_register_values.find(reg_id);
368   if (pos != m_register_values.end()) {
369     reg_value = pos->second;
370     return true; // We had a real value that comes from an opcode that wrote
371                  // to it...
372   }
373   // We are making up a value that is recognizable...
374   reg_value.SetUInt(reg_id, reg_info.byte_size);
375   return false;
376 }
377 
378 size_t UnwindAssemblyInstEmulation::ReadMemory(
379     EmulateInstruction *instruction, void *baton,
380     const EmulateInstruction::Context &context, lldb::addr_t addr, void *dst,
381     size_t dst_len) {
382   Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_UNWIND));
383 
384   if (log && log->GetVerbose()) {
385     StreamString strm;
386     strm.Printf(
387         "UnwindAssemblyInstEmulation::ReadMemory    (addr = 0x%16.16" PRIx64
388         ", dst = %p, dst_len = %" PRIu64 ", context = ",
389         addr, dst, (uint64_t)dst_len);
390     context.Dump(strm, instruction);
391     log->PutString(strm.GetString());
392   }
393   memset(dst, 0, dst_len);
394   return dst_len;
395 }
396 
397 size_t UnwindAssemblyInstEmulation::WriteMemory(
398     EmulateInstruction *instruction, void *baton,
399     const EmulateInstruction::Context &context, lldb::addr_t addr,
400     const void *dst, size_t dst_len) {
401   if (baton && dst && dst_len)
402     return ((UnwindAssemblyInstEmulation *)baton)
403         ->WriteMemory(instruction, context, addr, dst, dst_len);
404   return 0;
405 }
406 
407 size_t UnwindAssemblyInstEmulation::WriteMemory(
408     EmulateInstruction *instruction, const EmulateInstruction::Context &context,
409     lldb::addr_t addr, const void *dst, size_t dst_len) {
410   DataExtractor data(dst, dst_len,
411                      instruction->GetArchitecture().GetByteOrder(),
412                      instruction->GetArchitecture().GetAddressByteSize());
413 
414   Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_UNWIND));
415 
416   if (log && log->GetVerbose()) {
417     StreamString strm;
418 
419     strm.PutCString("UnwindAssemblyInstEmulation::WriteMemory   (");
420     DumpDataExtractor(data, &strm, 0, eFormatBytes, 1, dst_len, UINT32_MAX,
421                       addr, 0, 0);
422     strm.PutCString(", context = ");
423     context.Dump(strm, instruction);
424     log->PutString(strm.GetString());
425   }
426 
427   const bool cant_replace = false;
428 
429   switch (context.type) {
430   default:
431   case EmulateInstruction::eContextInvalid:
432   case EmulateInstruction::eContextReadOpcode:
433   case EmulateInstruction::eContextImmediate:
434   case EmulateInstruction::eContextAdjustBaseRegister:
435   case EmulateInstruction::eContextRegisterPlusOffset:
436   case EmulateInstruction::eContextAdjustPC:
437   case EmulateInstruction::eContextRegisterStore:
438   case EmulateInstruction::eContextRegisterLoad:
439   case EmulateInstruction::eContextRelativeBranchImmediate:
440   case EmulateInstruction::eContextAbsoluteBranchRegister:
441   case EmulateInstruction::eContextSupervisorCall:
442   case EmulateInstruction::eContextTableBranchReadMemory:
443   case EmulateInstruction::eContextWriteRegisterRandomBits:
444   case EmulateInstruction::eContextWriteMemoryRandomBits:
445   case EmulateInstruction::eContextArithmetic:
446   case EmulateInstruction::eContextAdvancePC:
447   case EmulateInstruction::eContextReturnFromException:
448   case EmulateInstruction::eContextPopRegisterOffStack:
449   case EmulateInstruction::eContextAdjustStackPointer:
450     break;
451 
452   case EmulateInstruction::eContextPushRegisterOnStack: {
453     uint32_t reg_num = LLDB_INVALID_REGNUM;
454     uint32_t generic_regnum = LLDB_INVALID_REGNUM;
455     assert(context.info_type ==
456                EmulateInstruction::eInfoTypeRegisterToRegisterPlusOffset &&
457            "unhandled case, add code to handle this!");
458     const uint32_t unwind_reg_kind = m_unwind_plan_ptr->GetRegisterKind();
459     reg_num = context.info.RegisterToRegisterPlusOffset.data_reg
460                   .kinds[unwind_reg_kind];
461     generic_regnum = context.info.RegisterToRegisterPlusOffset.data_reg
462                          .kinds[eRegisterKindGeneric];
463 
464     if (reg_num != LLDB_INVALID_REGNUM &&
465         generic_regnum != LLDB_REGNUM_GENERIC_SP) {
466       if (m_pushed_regs.find(reg_num) == m_pushed_regs.end()) {
467         m_pushed_regs[reg_num] = addr;
468         const int32_t offset = addr - m_initial_sp;
469         m_curr_row->SetRegisterLocationToAtCFAPlusOffset(reg_num, offset,
470                                                          cant_replace);
471         m_curr_row_modified = true;
472       }
473     }
474   } break;
475   }
476 
477   return dst_len;
478 }
479 
480 bool UnwindAssemblyInstEmulation::ReadRegister(EmulateInstruction *instruction,
481                                                void *baton,
482                                                const RegisterInfo *reg_info,
483                                                RegisterValue &reg_value) {
484 
485   if (baton && reg_info)
486     return ((UnwindAssemblyInstEmulation *)baton)
487         ->ReadRegister(instruction, reg_info, reg_value);
488   return false;
489 }
490 bool UnwindAssemblyInstEmulation::ReadRegister(EmulateInstruction *instruction,
491                                                const RegisterInfo *reg_info,
492                                                RegisterValue &reg_value) {
493   bool synthetic = GetRegisterValue(*reg_info, reg_value);
494 
495   Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_UNWIND));
496 
497   if (log && log->GetVerbose()) {
498 
499     StreamString strm;
500     strm.Printf("UnwindAssemblyInstEmulation::ReadRegister  (name = \"%s\") => "
501                 "synthetic_value = %i, value = ",
502                 reg_info->name, synthetic);
503     DumpRegisterValue(reg_value, &strm, reg_info, false, false, eFormatDefault);
504     log->PutString(strm.GetString());
505   }
506   return true;
507 }
508 
509 bool UnwindAssemblyInstEmulation::WriteRegister(
510     EmulateInstruction *instruction, void *baton,
511     const EmulateInstruction::Context &context, const RegisterInfo *reg_info,
512     const RegisterValue &reg_value) {
513   if (baton && reg_info)
514     return ((UnwindAssemblyInstEmulation *)baton)
515         ->WriteRegister(instruction, context, reg_info, reg_value);
516   return false;
517 }
518 bool UnwindAssemblyInstEmulation::WriteRegister(
519     EmulateInstruction *instruction, const EmulateInstruction::Context &context,
520     const RegisterInfo *reg_info, const RegisterValue &reg_value) {
521   Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_UNWIND));
522 
523   if (log && log->GetVerbose()) {
524 
525     StreamString strm;
526     strm.Printf(
527         "UnwindAssemblyInstEmulation::WriteRegister (name = \"%s\", value = ",
528         reg_info->name);
529     DumpRegisterValue(reg_value, &strm, reg_info, false, false, eFormatDefault);
530     strm.PutCString(", context = ");
531     context.Dump(strm, instruction);
532     log->PutString(strm.GetString());
533   }
534 
535   SetRegisterValue(*reg_info, reg_value);
536 
537   switch (context.type) {
538   case EmulateInstruction::eContextInvalid:
539   case EmulateInstruction::eContextReadOpcode:
540   case EmulateInstruction::eContextImmediate:
541   case EmulateInstruction::eContextAdjustBaseRegister:
542   case EmulateInstruction::eContextRegisterPlusOffset:
543   case EmulateInstruction::eContextAdjustPC:
544   case EmulateInstruction::eContextRegisterStore:
545   case EmulateInstruction::eContextSupervisorCall:
546   case EmulateInstruction::eContextTableBranchReadMemory:
547   case EmulateInstruction::eContextWriteRegisterRandomBits:
548   case EmulateInstruction::eContextWriteMemoryRandomBits:
549   case EmulateInstruction::eContextAdvancePC:
550   case EmulateInstruction::eContextReturnFromException:
551   case EmulateInstruction::eContextPushRegisterOnStack:
552   case EmulateInstruction::eContextRegisterLoad:
553     //            {
554     //                const uint32_t reg_num =
555     //                reg_info->kinds[m_unwind_plan_ptr->GetRegisterKind()];
556     //                if (reg_num != LLDB_INVALID_REGNUM)
557     //                {
558     //                    const bool can_replace_only_if_unspecified = true;
559     //
560     //                    m_curr_row.SetRegisterLocationToUndefined (reg_num,
561     //                                                               can_replace_only_if_unspecified,
562     //                                                               can_replace_only_if_unspecified);
563     //                    m_curr_row_modified = true;
564     //                }
565     //            }
566     break;
567 
568   case EmulateInstruction::eContextArithmetic: {
569     // If we adjusted the current frame pointer by a constant then adjust the
570     // CFA offset
571     // with the same amount.
572     lldb::RegisterKind kind = m_unwind_plan_ptr->GetRegisterKind();
573     if (m_fp_is_cfa && reg_info->kinds[kind] == m_cfa_reg_info.kinds[kind] &&
574         context.info_type == EmulateInstruction::eInfoTypeRegisterPlusOffset &&
575         context.info.RegisterPlusOffset.reg.kinds[kind] ==
576             m_cfa_reg_info.kinds[kind]) {
577       const int64_t offset = context.info.RegisterPlusOffset.signed_offset;
578       m_curr_row->GetCFAValue().IncOffset(-1 * offset);
579       m_curr_row_modified = true;
580     }
581   } break;
582 
583   case EmulateInstruction::eContextAbsoluteBranchRegister:
584   case EmulateInstruction::eContextRelativeBranchImmediate: {
585     if (context.info_type == EmulateInstruction::eInfoTypeISAAndImmediate &&
586         context.info.ISAAndImmediate.unsigned_data32 > 0) {
587       m_forward_branch_offset =
588           context.info.ISAAndImmediateSigned.signed_data32;
589     } else if (context.info_type ==
590                    EmulateInstruction::eInfoTypeISAAndImmediateSigned &&
591                context.info.ISAAndImmediateSigned.signed_data32 > 0) {
592       m_forward_branch_offset = context.info.ISAAndImmediate.unsigned_data32;
593     } else if (context.info_type == EmulateInstruction::eInfoTypeImmediate &&
594                context.info.unsigned_immediate > 0) {
595       m_forward_branch_offset = context.info.unsigned_immediate;
596     } else if (context.info_type ==
597                    EmulateInstruction::eInfoTypeImmediateSigned &&
598                context.info.signed_immediate > 0) {
599       m_forward_branch_offset = context.info.signed_immediate;
600     }
601   } break;
602 
603   case EmulateInstruction::eContextPopRegisterOffStack: {
604     const uint32_t reg_num =
605         reg_info->kinds[m_unwind_plan_ptr->GetRegisterKind()];
606     const uint32_t generic_regnum = reg_info->kinds[eRegisterKindGeneric];
607     if (reg_num != LLDB_INVALID_REGNUM &&
608         generic_regnum != LLDB_REGNUM_GENERIC_SP) {
609       switch (context.info_type) {
610       case EmulateInstruction::eInfoTypeAddress:
611         if (m_pushed_regs.find(reg_num) != m_pushed_regs.end() &&
612             context.info.address == m_pushed_regs[reg_num]) {
613           m_curr_row->SetRegisterLocationToSame(reg_num,
614                                                 false /*must_replace*/);
615           m_curr_row_modified = true;
616         }
617         break;
618       case EmulateInstruction::eInfoTypeISA:
619         assert(
620             (generic_regnum == LLDB_REGNUM_GENERIC_PC ||
621              generic_regnum == LLDB_REGNUM_GENERIC_FLAGS) &&
622             "eInfoTypeISA used for popping a register other the PC/FLAGS");
623         if (generic_regnum != LLDB_REGNUM_GENERIC_FLAGS) {
624           m_curr_row->SetRegisterLocationToSame(reg_num,
625                                                 false /*must_replace*/);
626           m_curr_row_modified = true;
627         }
628         break;
629       default:
630         assert(false && "unhandled case, add code to handle this!");
631         break;
632       }
633     }
634   } break;
635 
636   case EmulateInstruction::eContextSetFramePointer:
637     if (!m_fp_is_cfa) {
638       m_fp_is_cfa = true;
639       m_cfa_reg_info = *reg_info;
640       const uint32_t cfa_reg_num =
641           reg_info->kinds[m_unwind_plan_ptr->GetRegisterKind()];
642       assert(cfa_reg_num != LLDB_INVALID_REGNUM);
643       m_curr_row->GetCFAValue().SetIsRegisterPlusOffset(
644           cfa_reg_num, m_initial_sp - reg_value.GetAsUInt64());
645       m_curr_row_modified = true;
646     }
647     break;
648 
649   case EmulateInstruction::eContextRestoreStackPointer:
650     if (m_fp_is_cfa) {
651       m_fp_is_cfa = false;
652       m_cfa_reg_info = *reg_info;
653       const uint32_t cfa_reg_num =
654           reg_info->kinds[m_unwind_plan_ptr->GetRegisterKind()];
655       assert(cfa_reg_num != LLDB_INVALID_REGNUM);
656       m_curr_row->GetCFAValue().SetIsRegisterPlusOffset(
657           cfa_reg_num, m_initial_sp - reg_value.GetAsUInt64());
658       m_curr_row_modified = true;
659     }
660     break;
661 
662   case EmulateInstruction::eContextAdjustStackPointer:
663     // If we have created a frame using the frame pointer, don't follow
664     // subsequent adjustments to the stack pointer.
665     if (!m_fp_is_cfa) {
666       m_curr_row->GetCFAValue().SetIsRegisterPlusOffset(
667           m_curr_row->GetCFAValue().GetRegisterNumber(),
668           m_initial_sp - reg_value.GetAsUInt64());
669       m_curr_row_modified = true;
670     }
671     break;
672   }
673   return true;
674 }
675