1 //===- llvm/CodeGen/GlobalISel/CallLowering.h - Call lowering ---*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 /// 9 /// \file 10 /// This file describes how to lower LLVM calls to machine code calls. 11 /// 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_CODEGEN_GLOBALISEL_CALLLOWERING_H 15 #define LLVM_CODEGEN_GLOBALISEL_CALLLOWERING_H 16 17 #include "llvm/ADT/ArrayRef.h" 18 #include "llvm/ADT/SmallVector.h" 19 #include "llvm/CodeGen/CallingConvLower.h" 20 #include "llvm/CodeGen/LowLevelType.h" 21 #include "llvm/CodeGen/MachineOperand.h" 22 #include "llvm/CodeGen/MachineValueType.h" 23 #include "llvm/CodeGen/TargetCallingConv.h" 24 #include "llvm/IR/CallingConv.h" 25 #include "llvm/IR/Type.h" 26 #include "llvm/IR/Value.h" 27 #include "llvm/Support/ErrorHandling.h" 28 #include <cstdint> 29 #include <functional> 30 31 namespace llvm { 32 33 class AttributeList; 34 class CallBase; 35 class DataLayout; 36 class Function; 37 class FunctionLoweringInfo; 38 class MachineIRBuilder; 39 class MachineFunction; 40 struct MachinePointerInfo; 41 class MachineRegisterInfo; 42 class TargetLowering; 43 44 class CallLowering { 45 const TargetLowering *TLI; 46 47 virtual void anchor(); 48 public: 49 struct BaseArgInfo { 50 Type *Ty; 51 SmallVector<ISD::ArgFlagsTy, 4> Flags; 52 bool IsFixed; 53 54 BaseArgInfo(Type *Ty, 55 ArrayRef<ISD::ArgFlagsTy> Flags = ArrayRef<ISD::ArgFlagsTy>(), 56 bool IsFixed = true) 57 : Ty(Ty), Flags(Flags.begin(), Flags.end()), IsFixed(IsFixed) {} 58 59 BaseArgInfo() : Ty(nullptr), IsFixed(false) {} 60 }; 61 62 struct ArgInfo : public BaseArgInfo { 63 SmallVector<Register, 4> Regs; 64 // If the argument had to be split into multiple parts according to the 65 // target calling convention, then this contains the original vregs 66 // if the argument was an incoming arg. 67 SmallVector<Register, 2> OrigRegs; 68 69 /// Optionally track the original IR value for the argument. This may not be 70 /// meaningful in all contexts. This should only be used on for forwarding 71 /// through to use for aliasing information in MachinePointerInfo for memory 72 /// arguments. 73 const Value *OrigValue = nullptr; 74 75 /// Index original Function's argument. 76 unsigned OrigArgIndex; 77 78 /// Sentinel value for implicit machine-level input arguments. 79 static const unsigned NoArgIndex = UINT_MAX; 80 81 ArgInfo(ArrayRef<Register> Regs, Type *Ty, unsigned OrigIndex, 82 ArrayRef<ISD::ArgFlagsTy> Flags = ArrayRef<ISD::ArgFlagsTy>(), 83 bool IsFixed = true, const Value *OrigValue = nullptr) 84 : BaseArgInfo(Ty, Flags, IsFixed), Regs(Regs.begin(), Regs.end()), 85 OrigValue(OrigValue), OrigArgIndex(OrigIndex) { 86 if (!Regs.empty() && Flags.empty()) 87 this->Flags.push_back(ISD::ArgFlagsTy()); 88 // FIXME: We should have just one way of saying "no register". 89 assert(((Ty->isVoidTy() || Ty->isEmptyTy()) == 90 (Regs.empty() || Regs[0] == 0)) && 91 "only void types should have no register"); 92 } 93 94 ArgInfo(ArrayRef<Register> Regs, const Value &OrigValue, unsigned OrigIndex, 95 ArrayRef<ISD::ArgFlagsTy> Flags = ArrayRef<ISD::ArgFlagsTy>(), 96 bool IsFixed = true) 97 : ArgInfo(Regs, OrigValue.getType(), OrigIndex, Flags, IsFixed, &OrigValue) {} 98 99 ArgInfo() = default; 100 }; 101 102 struct CallLoweringInfo { 103 /// Calling convention to be used for the call. 104 CallingConv::ID CallConv = CallingConv::C; 105 106 /// Destination of the call. It should be either a register, globaladdress, 107 /// or externalsymbol. 108 MachineOperand Callee = MachineOperand::CreateImm(0); 109 110 /// Descriptor for the return type of the function. 111 ArgInfo OrigRet; 112 113 /// List of descriptors of the arguments passed to the function. 114 SmallVector<ArgInfo, 32> OrigArgs; 115 116 /// Valid if the call has a swifterror inout parameter, and contains the 117 /// vreg that the swifterror should be copied into after the call. 118 Register SwiftErrorVReg; 119 120 /// Original IR callsite corresponding to this call, if available. 121 const CallBase *CB = nullptr; 122 123 MDNode *KnownCallees = nullptr; 124 125 /// True if the call must be tail call optimized. 126 bool IsMustTailCall = false; 127 128 /// True if the call passes all target-independent checks for tail call 129 /// optimization. 130 bool IsTailCall = false; 131 132 /// True if the call was lowered as a tail call. This is consumed by the 133 /// legalizer. This allows the legalizer to lower libcalls as tail calls. 134 bool LoweredTailCall = false; 135 136 /// True if the call is to a vararg function. 137 bool IsVarArg = false; 138 139 /// True if the function's return value can be lowered to registers. 140 bool CanLowerReturn = true; 141 142 /// VReg to hold the hidden sret parameter. 143 Register DemoteRegister; 144 145 /// The stack index for sret demotion. 146 int DemoteStackIndex; 147 148 /// Expected type identifier for indirect calls with a CFI check. 149 const ConstantInt *CFIType = nullptr; 150 }; 151 152 /// Argument handling is mostly uniform between the four places that 153 /// make these decisions: function formal arguments, call 154 /// instruction args, call instruction returns and function 155 /// returns. However, once a decision has been made on where an 156 /// argument should go, exactly what happens can vary slightly. This 157 /// class abstracts the differences. 158 /// 159 /// ValueAssigner should not depend on any specific function state, and 160 /// only determine the types and locations for arguments. 161 struct ValueAssigner { 162 ValueAssigner(bool IsIncoming, CCAssignFn *AssignFn_, 163 CCAssignFn *AssignFnVarArg_ = nullptr) 164 : AssignFn(AssignFn_), AssignFnVarArg(AssignFnVarArg_), 165 IsIncomingArgumentHandler(IsIncoming) { 166 167 // Some targets change the handler depending on whether the call is 168 // varargs or not. If 169 if (!AssignFnVarArg) 170 AssignFnVarArg = AssignFn; 171 } 172 173 virtual ~ValueAssigner() = default; 174 175 /// Returns true if the handler is dealing with incoming arguments, 176 /// i.e. those that move values from some physical location to vregs. 177 bool isIncomingArgumentHandler() const { 178 return IsIncomingArgumentHandler; 179 } 180 181 /// Wrap call to (typically tablegenerated CCAssignFn). This may be 182 /// overridden to track additional state information as arguments are 183 /// assigned or apply target specific hacks around the legacy 184 /// infrastructure. 185 virtual bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, 186 CCValAssign::LocInfo LocInfo, const ArgInfo &Info, 187 ISD::ArgFlagsTy Flags, CCState &State) { 188 if (getAssignFn(State.isVarArg())(ValNo, ValVT, LocVT, LocInfo, Flags, 189 State)) 190 return true; 191 StackSize = State.getStackSize(); 192 return false; 193 } 194 195 /// Assignment function to use for a general call. 196 CCAssignFn *AssignFn; 197 198 /// Assignment function to use for a variadic call. This is usually the same 199 /// as AssignFn on most targets. 200 CCAssignFn *AssignFnVarArg; 201 202 /// The size of the currently allocated portion of the stack. 203 uint64_t StackSize = 0; 204 205 /// Select the appropriate assignment function depending on whether this is 206 /// a variadic call. 207 CCAssignFn *getAssignFn(bool IsVarArg) const { 208 return IsVarArg ? AssignFnVarArg : AssignFn; 209 } 210 211 private: 212 const bool IsIncomingArgumentHandler; 213 virtual void anchor(); 214 }; 215 216 struct IncomingValueAssigner : public ValueAssigner { 217 IncomingValueAssigner(CCAssignFn *AssignFn_, 218 CCAssignFn *AssignFnVarArg_ = nullptr) 219 : ValueAssigner(true, AssignFn_, AssignFnVarArg_) {} 220 }; 221 222 struct OutgoingValueAssigner : public ValueAssigner { 223 OutgoingValueAssigner(CCAssignFn *AssignFn_, 224 CCAssignFn *AssignFnVarArg_ = nullptr) 225 : ValueAssigner(false, AssignFn_, AssignFnVarArg_) {} 226 }; 227 228 struct ValueHandler { 229 MachineIRBuilder &MIRBuilder; 230 MachineRegisterInfo &MRI; 231 const bool IsIncomingArgumentHandler; 232 233 ValueHandler(bool IsIncoming, MachineIRBuilder &MIRBuilder, 234 MachineRegisterInfo &MRI) 235 : MIRBuilder(MIRBuilder), MRI(MRI), 236 IsIncomingArgumentHandler(IsIncoming) {} 237 238 virtual ~ValueHandler() = default; 239 240 /// Returns true if the handler is dealing with incoming arguments, 241 /// i.e. those that move values from some physical location to vregs. 242 bool isIncomingArgumentHandler() const { 243 return IsIncomingArgumentHandler; 244 } 245 246 /// Materialize a VReg containing the address of the specified 247 /// stack-based object. This is either based on a FrameIndex or 248 /// direct SP manipulation, depending on the context. \p MPO 249 /// should be initialized to an appropriate description of the 250 /// address created. 251 virtual Register getStackAddress(uint64_t MemSize, int64_t Offset, 252 MachinePointerInfo &MPO, 253 ISD::ArgFlagsTy Flags) = 0; 254 255 /// Return the in-memory size to write for the argument at \p VA. This may 256 /// be smaller than the allocated stack slot size. 257 /// 258 /// This is overridable primarily for targets to maintain compatibility with 259 /// hacks around the existing DAG call lowering infrastructure. 260 virtual LLT getStackValueStoreType(const DataLayout &DL, 261 const CCValAssign &VA, 262 ISD::ArgFlagsTy Flags) const; 263 264 /// The specified value has been assigned to a physical register, 265 /// handle the appropriate COPY (either to or from) and mark any 266 /// relevant uses/defines as needed. 267 virtual void assignValueToReg(Register ValVReg, Register PhysReg, 268 CCValAssign VA) = 0; 269 270 /// The specified value has been assigned to a stack 271 /// location. Load or store it there, with appropriate extension 272 /// if necessary. 273 virtual void assignValueToAddress(Register ValVReg, Register Addr, 274 LLT MemTy, MachinePointerInfo &MPO, 275 CCValAssign &VA) = 0; 276 277 /// An overload which takes an ArgInfo if additional information about the 278 /// arg is needed. \p ValRegIndex is the index in \p Arg.Regs for the value 279 /// to store. 280 virtual void assignValueToAddress(const ArgInfo &Arg, unsigned ValRegIndex, 281 Register Addr, LLT MemTy, 282 MachinePointerInfo &MPO, 283 CCValAssign &VA) { 284 assignValueToAddress(Arg.Regs[ValRegIndex], Addr, MemTy, MPO, VA); 285 } 286 287 /// Handle custom values, which may be passed into one or more of \p VAs. 288 /// \p If the handler wants the assignments to be delayed until after 289 /// mem loc assignments, then it sets \p Thunk to the thunk to do the 290 /// assignment. 291 /// \return The number of \p VAs that have been assigned after the first 292 /// one, and which should therefore be skipped from further 293 /// processing. 294 virtual unsigned assignCustomValue(ArgInfo &Arg, ArrayRef<CCValAssign> VAs, 295 std::function<void()> *Thunk = nullptr) { 296 // This is not a pure virtual method because not all targets need to worry 297 // about custom values. 298 llvm_unreachable("Custom values not supported"); 299 } 300 301 /// Do a memory copy of \p MemSize bytes from \p SrcPtr to \p DstPtr. This 302 /// is necessary for outgoing stack-passed byval arguments. 303 void 304 copyArgumentMemory(const ArgInfo &Arg, Register DstPtr, Register SrcPtr, 305 const MachinePointerInfo &DstPtrInfo, Align DstAlign, 306 const MachinePointerInfo &SrcPtrInfo, Align SrcAlign, 307 uint64_t MemSize, CCValAssign &VA) const; 308 309 /// Extend a register to the location type given in VA, capped at extending 310 /// to at most MaxSize bits. If MaxSizeBits is 0 then no maximum is set. 311 Register extendRegister(Register ValReg, CCValAssign &VA, 312 unsigned MaxSizeBits = 0); 313 }; 314 315 /// Base class for ValueHandlers used for arguments coming into the current 316 /// function, or for return values received from a call. 317 struct IncomingValueHandler : public ValueHandler { 318 IncomingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) 319 : ValueHandler(/*IsIncoming*/ true, MIRBuilder, MRI) {} 320 321 /// Insert G_ASSERT_ZEXT/G_ASSERT_SEXT or other hint instruction based on \p 322 /// VA, returning the new register if a hint was inserted. 323 Register buildExtensionHint(CCValAssign &VA, Register SrcReg, LLT NarrowTy); 324 325 /// Provides a default implementation for argument handling. 326 void assignValueToReg(Register ValVReg, Register PhysReg, 327 CCValAssign VA) override; 328 }; 329 330 /// Base class for ValueHandlers used for arguments passed to a function call, 331 /// or for return values. 332 struct OutgoingValueHandler : public ValueHandler { 333 OutgoingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) 334 : ValueHandler(/*IsIncoming*/ false, MIRBuilder, MRI) {} 335 }; 336 337 protected: 338 /// Getter for generic TargetLowering class. 339 const TargetLowering *getTLI() const { 340 return TLI; 341 } 342 343 /// Getter for target specific TargetLowering class. 344 template <class XXXTargetLowering> 345 const XXXTargetLowering *getTLI() const { 346 return static_cast<const XXXTargetLowering *>(TLI); 347 } 348 349 /// \returns Flags corresponding to the attributes on the \p ArgIdx-th 350 /// parameter of \p Call. 351 ISD::ArgFlagsTy getAttributesForArgIdx(const CallBase &Call, 352 unsigned ArgIdx) const; 353 354 /// \returns Flags corresponding to the attributes on the return from \p Call. 355 ISD::ArgFlagsTy getAttributesForReturn(const CallBase &Call) const; 356 357 /// Adds flags to \p Flags based off of the attributes in \p Attrs. 358 /// \p OpIdx is the index in \p Attrs to add flags from. 359 void addArgFlagsFromAttributes(ISD::ArgFlagsTy &Flags, 360 const AttributeList &Attrs, 361 unsigned OpIdx) const; 362 363 template <typename FuncInfoTy> 364 void setArgFlags(ArgInfo &Arg, unsigned OpIdx, const DataLayout &DL, 365 const FuncInfoTy &FuncInfo) const; 366 367 /// Break \p OrigArgInfo into one or more pieces the calling convention can 368 /// process, returned in \p SplitArgs. For example, this should break structs 369 /// down into individual fields. 370 /// 371 /// If \p Offsets is non-null, it points to a vector to be filled in 372 /// with the in-memory offsets of each of the individual values. 373 void splitToValueTypes(const ArgInfo &OrigArgInfo, 374 SmallVectorImpl<ArgInfo> &SplitArgs, 375 const DataLayout &DL, CallingConv::ID CallConv, 376 SmallVectorImpl<uint64_t> *Offsets = nullptr) const; 377 378 /// Analyze the argument list in \p Args, using \p Assigner to populate \p 379 /// CCInfo. This will determine the types and locations to use for passed or 380 /// returned values. This may resize fields in \p Args if the value is split 381 /// across multiple registers or stack slots. 382 /// 383 /// This is independent of the function state and can be used 384 /// to determine how a call would pass arguments without needing to change the 385 /// function. This can be used to check if arguments are suitable for tail 386 /// call lowering. 387 /// 388 /// \return True if everything has succeeded, false otherwise. 389 bool determineAssignments(ValueAssigner &Assigner, 390 SmallVectorImpl<ArgInfo> &Args, 391 CCState &CCInfo) const; 392 393 /// Invoke ValueAssigner::assignArg on each of the given \p Args and then use 394 /// \p Handler to move them to the assigned locations. 395 /// 396 /// \return True if everything has succeeded, false otherwise. 397 bool determineAndHandleAssignments( 398 ValueHandler &Handler, ValueAssigner &Assigner, 399 SmallVectorImpl<ArgInfo> &Args, MachineIRBuilder &MIRBuilder, 400 CallingConv::ID CallConv, bool IsVarArg, 401 ArrayRef<Register> ThisReturnRegs = std::nullopt) const; 402 403 /// Use \p Handler to insert code to handle the argument/return values 404 /// represented by \p Args. It's expected determineAssignments previously 405 /// processed these arguments to populate \p CCState and \p ArgLocs. 406 bool 407 handleAssignments(ValueHandler &Handler, SmallVectorImpl<ArgInfo> &Args, 408 CCState &CCState, SmallVectorImpl<CCValAssign> &ArgLocs, 409 MachineIRBuilder &MIRBuilder, 410 ArrayRef<Register> ThisReturnRegs = std::nullopt) const; 411 412 /// Check whether parameters to a call that are passed in callee saved 413 /// registers are the same as from the calling function. This needs to be 414 /// checked for tail call eligibility. 415 bool parametersInCSRMatch(const MachineRegisterInfo &MRI, 416 const uint32_t *CallerPreservedMask, 417 const SmallVectorImpl<CCValAssign> &ArgLocs, 418 const SmallVectorImpl<ArgInfo> &OutVals) const; 419 420 /// \returns True if the calling convention for a callee and its caller pass 421 /// results in the same way. Typically used for tail call eligibility checks. 422 /// 423 /// \p Info is the CallLoweringInfo for the call. 424 /// \p MF is the MachineFunction for the caller. 425 /// \p InArgs contains the results of the call. 426 /// \p CalleeAssigner specifies the target's handling of the argument types 427 /// for the callee. 428 /// \p CallerAssigner specifies the target's handling of the 429 /// argument types for the caller. 430 bool resultsCompatible(CallLoweringInfo &Info, MachineFunction &MF, 431 SmallVectorImpl<ArgInfo> &InArgs, 432 ValueAssigner &CalleeAssigner, 433 ValueAssigner &CallerAssigner) const; 434 435 public: 436 CallLowering(const TargetLowering *TLI) : TLI(TLI) {} 437 virtual ~CallLowering() = default; 438 439 /// \return true if the target is capable of handling swifterror values that 440 /// have been promoted to a specified register. The extended versions of 441 /// lowerReturn and lowerCall should be implemented. 442 virtual bool supportSwiftError() const { 443 return false; 444 } 445 446 /// Load the returned value from the stack into virtual registers in \p VRegs. 447 /// It uses the frame index \p FI and the start offset from \p DemoteReg. 448 /// The loaded data size will be determined from \p RetTy. 449 void insertSRetLoads(MachineIRBuilder &MIRBuilder, Type *RetTy, 450 ArrayRef<Register> VRegs, Register DemoteReg, 451 int FI) const; 452 453 /// Store the return value given by \p VRegs into stack starting at the offset 454 /// specified in \p DemoteReg. 455 void insertSRetStores(MachineIRBuilder &MIRBuilder, Type *RetTy, 456 ArrayRef<Register> VRegs, Register DemoteReg) const; 457 458 /// Insert the hidden sret ArgInfo to the beginning of \p SplitArgs. 459 /// This function should be called from the target specific 460 /// lowerFormalArguments when \p F requires the sret demotion. 461 void insertSRetIncomingArgument(const Function &F, 462 SmallVectorImpl<ArgInfo> &SplitArgs, 463 Register &DemoteReg, MachineRegisterInfo &MRI, 464 const DataLayout &DL) const; 465 466 /// For the call-base described by \p CB, insert the hidden sret ArgInfo to 467 /// the OrigArgs field of \p Info. 468 void insertSRetOutgoingArgument(MachineIRBuilder &MIRBuilder, 469 const CallBase &CB, 470 CallLoweringInfo &Info) const; 471 472 /// \return True if the return type described by \p Outs can be returned 473 /// without performing sret demotion. 474 bool checkReturn(CCState &CCInfo, SmallVectorImpl<BaseArgInfo> &Outs, 475 CCAssignFn *Fn) const; 476 477 /// Get the type and the ArgFlags for the split components of \p RetTy as 478 /// returned by \c ComputeValueVTs. 479 void getReturnInfo(CallingConv::ID CallConv, Type *RetTy, AttributeList Attrs, 480 SmallVectorImpl<BaseArgInfo> &Outs, 481 const DataLayout &DL) const; 482 483 /// Toplevel function to check the return type based on the target calling 484 /// convention. \return True if the return value of \p MF can be returned 485 /// without performing sret demotion. 486 bool checkReturnTypeForCallConv(MachineFunction &MF) const; 487 488 /// This hook must be implemented to check whether the return values 489 /// described by \p Outs can fit into the return registers. If false 490 /// is returned, an sret-demotion is performed. 491 virtual bool canLowerReturn(MachineFunction &MF, CallingConv::ID CallConv, 492 SmallVectorImpl<BaseArgInfo> &Outs, 493 bool IsVarArg) const { 494 return true; 495 } 496 497 /// This hook must be implemented to lower outgoing return values, described 498 /// by \p Val, into the specified virtual registers \p VRegs. 499 /// This hook is used by GlobalISel. 500 /// 501 /// \p FLI is required for sret demotion. 502 /// 503 /// \p SwiftErrorVReg is non-zero if the function has a swifterror parameter 504 /// that needs to be implicitly returned. 505 /// 506 /// \return True if the lowering succeeds, false otherwise. 507 virtual bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, 508 ArrayRef<Register> VRegs, FunctionLoweringInfo &FLI, 509 Register SwiftErrorVReg) const { 510 if (!supportSwiftError()) { 511 assert(SwiftErrorVReg == 0 && "attempt to use unsupported swifterror"); 512 return lowerReturn(MIRBuilder, Val, VRegs, FLI); 513 } 514 return false; 515 } 516 517 /// This hook behaves as the extended lowerReturn function, but for targets 518 /// that do not support swifterror value promotion. 519 virtual bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, 520 ArrayRef<Register> VRegs, 521 FunctionLoweringInfo &FLI) const { 522 return false; 523 } 524 525 virtual bool fallBackToDAGISel(const MachineFunction &MF) const { 526 return false; 527 } 528 529 /// This hook must be implemented to lower the incoming (formal) 530 /// arguments, described by \p VRegs, for GlobalISel. Each argument 531 /// must end up in the related virtual registers described by \p VRegs. 532 /// In other words, the first argument should end up in \c VRegs[0], 533 /// the second in \c VRegs[1], and so on. For each argument, there will be one 534 /// register for each non-aggregate type, as returned by \c computeValueLLTs. 535 /// \p MIRBuilder is set to the proper insertion for the argument 536 /// lowering. \p FLI is required for sret demotion. 537 /// 538 /// \return True if the lowering succeeded, false otherwise. 539 virtual bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, 540 const Function &F, 541 ArrayRef<ArrayRef<Register>> VRegs, 542 FunctionLoweringInfo &FLI) const { 543 return false; 544 } 545 546 /// This hook must be implemented to lower the given call instruction, 547 /// including argument and return value marshalling. 548 /// 549 /// 550 /// \return true if the lowering succeeded, false otherwise. 551 virtual bool lowerCall(MachineIRBuilder &MIRBuilder, 552 CallLoweringInfo &Info) const { 553 return false; 554 } 555 556 /// Lower the given call instruction, including argument and return value 557 /// marshalling. 558 /// 559 /// \p CI is the call/invoke instruction. 560 /// 561 /// \p ResRegs are the registers where the call's return value should be 562 /// stored (or 0 if there is no return value). There will be one register for 563 /// each non-aggregate type, as returned by \c computeValueLLTs. 564 /// 565 /// \p ArgRegs is a list of lists of virtual registers containing each 566 /// argument that needs to be passed (argument \c i should be placed in \c 567 /// ArgRegs[i]). For each argument, there will be one register for each 568 /// non-aggregate type, as returned by \c computeValueLLTs. 569 /// 570 /// \p SwiftErrorVReg is non-zero if the call has a swifterror inout 571 /// parameter, and contains the vreg that the swifterror should be copied into 572 /// after the call. 573 /// 574 /// \p GetCalleeReg is a callback to materialize a register for the callee if 575 /// the target determines it cannot jump to the destination based purely on \p 576 /// CI. This might be because \p CI is indirect, or because of the limited 577 /// range of an immediate jump. 578 /// 579 /// \return true if the lowering succeeded, false otherwise. 580 bool lowerCall(MachineIRBuilder &MIRBuilder, const CallBase &Call, 581 ArrayRef<Register> ResRegs, 582 ArrayRef<ArrayRef<Register>> ArgRegs, Register SwiftErrorVReg, 583 std::function<unsigned()> GetCalleeReg) const; 584 585 /// For targets which want to use big-endian can enable it with 586 /// enableBigEndian() hook 587 virtual bool enableBigEndian() const { return false; } 588 589 /// For targets which support the "returned" parameter attribute, returns 590 /// true if the given type is a valid one to use with "returned". 591 virtual bool isTypeIsValidForThisReturn(EVT Ty) const { return false; } 592 }; 593 594 } // end namespace llvm 595 596 #endif // LLVM_CODEGEN_GLOBALISEL_CALLLOWERING_H 597