1 //===- llvm/CodeGen/GlobalISel/GIMatchTableExecutor.h -----------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 /// \file This file declares the GIMatchTableExecutor API, the opcodes supported 10 /// by the match table, and some associated data structures used by the 11 /// executor's implementation (see `GIMatchTableExecutorImpl.h`). 12 // 13 //===----------------------------------------------------------------------===// 14 15 #ifndef LLVM_CODEGEN_GLOBALISEL_GIMATCHTABLEEXECUTOR_H 16 #define LLVM_CODEGEN_GLOBALISEL_GIMATCHTABLEEXECUTOR_H 17 18 #include "llvm/ADT/Bitset.h" 19 #include "llvm/ADT/DenseMap.h" 20 #include "llvm/ADT/SmallVector.h" 21 #include "llvm/CodeGen/GlobalISel/Utils.h" 22 #include "llvm/CodeGen/LowLevelType.h" 23 #include "llvm/CodeGen/MachineFunction.h" 24 #include "llvm/IR/Function.h" 25 #include <bitset> 26 #include <cstddef> 27 #include <cstdint> 28 #include <functional> 29 #include <initializer_list> 30 #include <optional> 31 #include <vector> 32 33 namespace llvm { 34 35 class BlockFrequencyInfo; 36 class CodeGenCoverage; 37 class MachineBasicBlock; 38 class ProfileSummaryInfo; 39 class APInt; 40 class APFloat; 41 class GISelKnownBits; 42 class MachineInstr; 43 class MachineIRBuilder; 44 class MachineInstrBuilder; 45 class MachineFunction; 46 class MachineOperand; 47 class MachineRegisterInfo; 48 class RegisterBankInfo; 49 class TargetInstrInfo; 50 class TargetRegisterInfo; 51 52 enum { 53 GICXXPred_Invalid = 0, 54 GICXXCustomAction_Invalid = 0, 55 }; 56 57 /// The MatchTable is encoded as an array of bytes. 58 /// Thus, opcodes are expected to be <255. 59 /// 60 /// Operands can be variable-sized, their size is always after their name 61 /// in the docs, e.g. "Foo(4)" means that "Foo" takes 4 entries in the table, 62 /// so 4 bytes. "Foo()" 63 /// 64 /// As a general rule of thumb: 65 /// - Instruction & Operand IDs are ULEB128 66 /// - LLT IDs are 1 byte 67 /// - Predicates and target opcodes, register and register class IDs are 2 68 /// bytes. 69 /// - Indexes into the table are 4 bytes. 70 /// - Inline constants are 8 bytes 71 /// 72 /// Design notes: 73 /// - Inst/Op IDs have to be LEB128 because some targets generate 74 /// extremely long patterns which need more than 255 temporaries. 75 /// We could just use 2 bytes everytime, but then some targets like 76 /// X86/AMDGPU that have no need for it will pay the price all the time. 77 enum { 78 /// Begin a try-block to attempt a match and jump to OnFail if it is 79 /// unsuccessful. 80 /// - OnFail(4) - The MatchTable entry at which to resume if the match fails. 81 /// 82 /// FIXME: This ought to take an argument indicating the number of try-blocks 83 /// to exit on failure. It's usually one but the last match attempt of 84 /// a block will need more. The (implemented) alternative is to tack a 85 /// GIM_Reject on the end of each try-block which is simpler but 86 /// requires an extra opcode and iteration in the interpreter on each 87 /// failed match. 88 GIM_Try, 89 90 /// Switch over the opcode on the specified instruction 91 /// - InsnID(ULEB128) - Instruction ID 92 /// - LowerBound(2) - numerically minimum opcode supported 93 /// - UpperBound(2) - numerically maximum + 1 opcode supported 94 /// - Default(4) - failure jump target 95 /// - JumpTable(4)... - (UpperBound - LowerBound) (at least 2) jump targets 96 GIM_SwitchOpcode, 97 98 /// Switch over the LLT on the specified instruction operand 99 /// - InsnID(ULEB128) - Instruction ID 100 /// - OpIdx(ULEB128) - Operand index 101 /// - LowerBound(2) - numerically minimum Type ID supported 102 /// - UpperBound(2) - numerically maximum + 1 Type ID supported 103 /// - Default(4) - failure jump target 104 /// - JumpTable(4)... - (UpperBound - LowerBound) (at least 2) jump targets 105 GIM_SwitchType, 106 107 /// Record the specified instruction. 108 /// The IgnoreCopies variant ignores COPY instructions. 109 /// - NewInsnID(ULEB128) - Instruction ID to define 110 /// - InsnID(ULEB128) - Instruction ID 111 /// - OpIdx(ULEB128) - Operand index 112 GIM_RecordInsn, 113 GIM_RecordInsnIgnoreCopies, 114 115 /// Check the feature bits 116 /// Feature(2) - Expected features 117 GIM_CheckFeatures, 118 119 /// Check the opcode on the specified instruction 120 /// - InsnID(ULEB128) - Instruction ID 121 /// - Opc(2) - Expected opcode 122 GIM_CheckOpcode, 123 124 /// Check the opcode on the specified instruction, checking 2 acceptable 125 /// alternatives. 126 /// - InsnID(ULEB128) - Instruction ID 127 /// - Opc(2) - Expected opcode 128 /// - Opc(2) - Alternative expected opcode 129 GIM_CheckOpcodeIsEither, 130 131 /// Check the instruction has the right number of operands 132 /// - InsnID(ULEB128) - Instruction ID 133 /// - Ops(ULEB128) - Expected number of operands 134 GIM_CheckNumOperands, 135 136 /// Check an immediate predicate on the specified instruction 137 /// - InsnID(ULEB128) - Instruction ID 138 /// - Pred(2) - The predicate to test 139 GIM_CheckI64ImmPredicate, 140 /// Check an immediate predicate on the specified instruction via an APInt. 141 /// - InsnID(ULEB128) - Instruction ID 142 /// - Pred(2) - The predicate to test 143 GIM_CheckAPIntImmPredicate, 144 /// Check a floating point immediate predicate on the specified instruction. 145 /// - InsnID(ULEB128) - Instruction ID 146 /// - Pred(2) - The predicate to test 147 GIM_CheckAPFloatImmPredicate, 148 /// Check an immediate predicate on the specified instruction 149 /// - InsnID(ULEB128) - Instruction ID 150 /// - OpIdx(ULEB128) - Operand index 151 /// - Pred(2) - The predicate to test 152 GIM_CheckImmOperandPredicate, 153 154 /// Check a memory operation has the specified atomic ordering. 155 /// - InsnID(ULEB128) - Instruction ID 156 /// - Ordering(ULEB128) - The AtomicOrdering value 157 GIM_CheckAtomicOrdering, 158 GIM_CheckAtomicOrderingOrStrongerThan, 159 GIM_CheckAtomicOrderingWeakerThan, 160 161 /// Check the size of the memory access for the given machine memory operand. 162 /// - InsnID(ULEB128) - Instruction ID 163 /// - MMOIdx(ULEB128) - MMO index 164 /// - Size(4) - The size in bytes of the memory access 165 GIM_CheckMemorySizeEqualTo, 166 167 /// Check the address space of the memory access for the given machine memory 168 /// operand. 169 /// - InsnID(ULEB128) - Instruction ID 170 /// - MMOIdx(ULEB128) - MMO index 171 /// - NumAddrSpace(ULEB128) - Number of valid address spaces 172 /// - AddrSpaceN(ULEB128) - An allowed space of the memory access 173 /// - AddrSpaceN+1 ... 174 GIM_CheckMemoryAddressSpace, 175 176 /// Check the minimum alignment of the memory access for the given machine 177 /// memory operand. 178 /// - InsnID(ULEB128) - Instruction ID 179 /// - MMOIdx(ULEB128) - MMO index 180 /// - MinAlign(ULEB128) - Minimum acceptable alignment 181 GIM_CheckMemoryAlignment, 182 183 /// Check the size of the memory access for the given machine memory operand 184 /// against the size of an operand. 185 /// - InsnID(ULEB128) - Instruction ID 186 /// - MMOIdx(ULEB128) - MMO index 187 /// - OpIdx(ULEB128) - The operand index to compare the MMO against 188 GIM_CheckMemorySizeEqualToLLT, 189 GIM_CheckMemorySizeLessThanLLT, 190 GIM_CheckMemorySizeGreaterThanLLT, 191 192 /// Check if this is a vector that can be treated as a vector splat 193 /// constant. This is valid for both G_BUILD_VECTOR as well as 194 /// G_BUILD_VECTOR_TRUNC. For AllOnes refers to individual bits, so a -1 195 /// element. 196 /// - InsnID(ULEB128) - Instruction ID 197 GIM_CheckIsBuildVectorAllOnes, 198 GIM_CheckIsBuildVectorAllZeros, 199 200 /// Check a trivial predicate which takes no arguments. 201 /// This can be used by executors to implement custom flags that don't fit in 202 /// target features. 203 /// - Pred(2) - Predicate ID to check. 204 GIM_CheckSimplePredicate, 205 206 /// Check a generic C++ instruction predicate 207 /// - InsnID(ULEB128) - Instruction ID 208 /// - PredicateID(2) - The ID of the predicate function to call 209 GIM_CheckCxxInsnPredicate, 210 211 /// Check if there's no use of the first result. 212 /// - InsnID(ULEB128) - Instruction ID 213 GIM_CheckHasNoUse, 214 215 /// Check the type for the specified operand 216 /// - InsnID(ULEB128) - Instruction ID 217 /// - OpIdx(ULEB128) - Operand index 218 /// - Ty(1) - Expected type 219 GIM_CheckType, 220 221 /// Check the type of a pointer to any address space. 222 /// - InsnID(ULEB128) - Instruction ID 223 /// - OpIdx(ULEB128) - Operand index 224 /// - SizeInBits(ULEB128) - The size of the pointer value in bits. 225 GIM_CheckPointerToAny, 226 227 /// Check the register bank for the specified operand 228 /// - InsnID(ULEB128) - Instruction ID 229 /// - OpIdx(ULEB128) - Operand index 230 /// - RC(2) - Expected register bank (specified as a register class) 231 GIM_CheckRegBankForClass, 232 233 /// Check the operand matches a complex predicate 234 /// - InsnID(ULEB128) - Instruction ID 235 /// - OpIdx(ULEB128) - Operand index 236 /// - RendererID(2) - The renderer to hold the result 237 /// - Pred(2) - Complex predicate ID 238 GIM_CheckComplexPattern, 239 240 /// Check the operand is a specific integer 241 /// - InsnID(ULEB128) - Instruction ID 242 /// - OpIdx(ULEB128) - Operand index 243 /// - Val(8) Expected integer 244 GIM_CheckConstantInt, 245 246 /// Check the operand is a specific 8-bit signed integer 247 /// - InsnID(ULEB128) - Instruction ID 248 /// - OpIdx(ULEB128) - Operand index 249 /// - Val(1) Expected integer 250 GIM_CheckConstantInt8, 251 252 /// Check the operand is a specific literal integer (i.e. MO.isImm() or 253 /// MO.isCImm() is true). 254 /// - InsnID(ULEB128) - Instruction ID 255 /// - OpIdx(ULEB128) - Operand index 256 /// - Val(8) - Expected integer 257 GIM_CheckLiteralInt, 258 259 /// Check the operand is a specific intrinsic ID 260 /// - InsnID(ULEB128) - Instruction ID 261 /// - OpIdx(ULEB128) - Operand index 262 /// - IID(2) - Expected Intrinsic ID 263 GIM_CheckIntrinsicID, 264 265 /// Check the operand is a specific predicate 266 /// - InsnID(ULEB128) - Instruction ID 267 /// - OpIdx(ULEB128) - Operand index 268 /// - Pred(2) - Expected predicate 269 GIM_CheckCmpPredicate, 270 271 /// Check the specified operand is an MBB 272 /// - InsnID(ULEB128) - Instruction ID 273 /// - OpIdx(ULEB128) - Operand index 274 GIM_CheckIsMBB, 275 276 /// Check the specified operand is an Imm 277 /// - InsnID(ULEB128) - Instruction ID 278 /// - OpIdx(ULEB128) - Operand index 279 GIM_CheckIsImm, 280 281 /// Check if the specified operand is safe to fold into the current 282 /// instruction. 283 /// - InsnID(ULEB128) - Instruction ID 284 GIM_CheckIsSafeToFold, 285 286 /// Check the specified operands are identical. 287 /// The IgnoreCopies variant looks through COPY instructions before 288 /// comparing the operands. 289 /// - InsnID(ULEB128) - Instruction ID 290 /// - OpIdx(ULEB128) - Operand index 291 /// - OtherInsnID(ULEB128) - Other instruction ID 292 /// - OtherOpIdx(ULEB128) - Other operand index 293 GIM_CheckIsSameOperand, 294 GIM_CheckIsSameOperandIgnoreCopies, 295 296 /// Check we can replace all uses of a register with another. 297 /// - OldInsnID(ULEB128) 298 /// - OldOpIdx(ULEB128) 299 /// - NewInsnID(ULEB128) 300 /// - NewOpIdx(ULEB128) 301 GIM_CheckCanReplaceReg, 302 303 /// Check that a matched instruction has, or doesn't have a MIFlag. 304 /// 305 /// - InsnID(ULEB128) - Instruction to check. 306 /// - Flags(4) - (can be one or more flags OR'd together) 307 GIM_MIFlags, 308 GIM_MIFlagsNot, 309 310 /// Predicates with 'let PredicateCodeUsesOperands = 1' need to examine some 311 /// named operands that will be recorded in RecordedOperands. Names of these 312 /// operands are referenced in predicate argument list. Emitter determines 313 /// StoreIdx(corresponds to the order in which names appear in argument list). 314 /// - InsnID(ULEB128) - Instruction ID 315 /// - OpIdx(ULEB128) - Operand index 316 /// - StoreIdx(ULEB128) - Store location in RecordedOperands. 317 GIM_RecordNamedOperand, 318 319 /// Records an operand's register type into the set of temporary types. 320 /// - InsnID(ULEB128) - Instruction ID 321 /// - OpIdx(ULEB128) - Operand index 322 /// - TempTypeIdx(1) - Temp Type Index, always negative. 323 GIM_RecordRegType, 324 325 /// Fail the current try-block, or completely fail to match if there is no 326 /// current try-block. 327 GIM_Reject, 328 329 //=== Renderers === 330 331 /// Mutate an instruction 332 /// - NewInsnID(ULEB128) - Instruction ID to define 333 /// - OldInsnID(ULEB128) - Instruction ID to mutate 334 /// - NewOpcode(2) - The new opcode to use 335 GIR_MutateOpcode, 336 337 /// Build a new instruction 338 /// - InsnID(ULEB128) - Instruction ID to define 339 /// - Opcode(2) - The new opcode to use 340 GIR_BuildMI, 341 342 /// Builds a constant and stores its result in a TempReg. 343 /// - TempRegID(ULEB128) - Temp Register to define. 344 /// - Imm(8) - The immediate to add 345 GIR_BuildConstant, 346 347 /// Copy an operand to the specified instruction 348 /// - NewInsnID(ULEB128) - Instruction ID to modify 349 /// - OldInsnID(ULEB128) - Instruction ID to copy from 350 /// - OpIdx(ULEB128) - The operand to copy 351 GIR_Copy, 352 353 /// Copy an operand to the specified instruction or add a zero register if the 354 /// operand is a zero immediate. 355 /// - NewInsnID(ULEB128) - Instruction ID to modify 356 /// - OldInsnID(ULEB128) - Instruction ID to copy from 357 /// - OpIdx(ULEB128) - The operand to copy 358 /// - ZeroReg(2) - The zero register to use 359 GIR_CopyOrAddZeroReg, 360 /// Copy an operand to the specified instruction 361 /// - NewInsnID(ULEB128) - Instruction ID to modify 362 /// - OldInsnID(ULEB128) - Instruction ID to copy from 363 /// - OpIdx(ULEB128) - The operand to copy 364 /// - SubRegIdx(2) - The subregister to copy 365 GIR_CopySubReg, 366 367 /// Add an implicit register def to the specified instruction 368 /// - InsnID(ULEB128) - Instruction ID to modify 369 /// - RegNum(2) - The register to add 370 /// - Flags(2) - Register Flags 371 GIR_AddImplicitDef, 372 /// Add an implicit register use to the specified instruction 373 /// - InsnID(ULEB128) - Instruction ID to modify 374 /// - RegNum(2) - The register to add 375 GIR_AddImplicitUse, 376 /// Add an register to the specified instruction 377 /// - InsnID(ULEB128) - Instruction ID to modify 378 /// - RegNum(2) - The register to add 379 /// - Flags(2) - Register Flags 380 GIR_AddRegister, 381 382 /// Marks the implicit def of a register as dead. 383 /// - InsnID(ULEB128) - Instruction ID to modify 384 /// - OpIdx(ULEB128) - The implicit def operand index 385 /// 386 /// OpIdx starts at 0 for the first implicit def. 387 GIR_SetImplicitDefDead, 388 389 /// Set or unset a MIFlag on an instruction. 390 /// 391 /// - InsnID(ULEB128) - Instruction to modify. 392 /// - Flags(4) - (can be one or more flags OR'd together) 393 GIR_SetMIFlags, 394 GIR_UnsetMIFlags, 395 396 /// Copy the MIFlags of a matched instruction into an 397 /// output instruction. The flags are OR'd together. 398 /// 399 /// - InsnID(ULEB128) - Instruction to modify. 400 /// - OldInsnID(ULEB128) - Matched instruction to copy flags from. 401 GIR_CopyMIFlags, 402 403 /// Add a temporary register to the specified instruction 404 /// - InsnID(ULEB128) - Instruction ID to modify 405 /// - TempRegID(ULEB128) - The temporary register ID to add 406 /// - TempRegFlags(2) - The register flags to set 407 GIR_AddTempRegister, 408 409 /// Add a temporary register to the specified instruction without 410 /// setting any flags. 411 /// - InsnID(ULEB128) - Instruction ID to modify 412 /// - TempRegID(ULEB128) - The temporary register ID to add 413 GIR_AddSimpleTempRegister, 414 415 /// Add a temporary register to the specified instruction 416 /// - InsnID(ULEB128) - Instruction ID to modify 417 /// - TempRegID(ULEB128) - The temporary register ID to add 418 /// - TempRegFlags(2) - The register flags to set 419 /// - SubRegIndex(2) - The subregister index to set 420 GIR_AddTempSubRegister, 421 422 /// Add an immediate to the specified instruction 423 /// - InsnID(ULEB128) - Instruction ID to modify 424 /// - Imm(8) - The immediate to add 425 GIR_AddImm, 426 427 /// Add signed 8 bit immediate to the specified instruction 428 /// - InsnID(ULEB128) - Instruction ID to modify 429 /// - Imm(1) - The immediate to add 430 GIR_AddImm8, 431 432 /// Add an CImm to the specified instruction 433 /// - InsnID(ULEB128) - Instruction ID to modify 434 /// - Ty(1) - Type of the constant immediate. 435 /// - Imm(8) - The immediate to add 436 GIR_AddCImm, 437 438 /// Render complex operands to the specified instruction 439 /// - InsnID(ULEB128) - Instruction ID to modify 440 /// - RendererID(2) - The renderer to call 441 GIR_ComplexRenderer, 442 /// Render sub-operands of complex operands to the specified instruction 443 /// - InsnID(ULEB128) - Instruction ID to modify 444 /// - RendererID(2) - The renderer to call 445 /// - RenderOpID(ULEB128) - The suboperand to render. 446 GIR_ComplexSubOperandRenderer, 447 /// Render subregisters of suboperands of complex operands to the 448 /// specified instruction 449 /// - InsnID(ULEB128) - Instruction ID to modify 450 /// - RendererID(2) - The renderer to call 451 /// - RenderOpID(ULEB128) - The suboperand to render 452 /// - SubRegIdx(2) - The subregister to extract 453 GIR_ComplexSubOperandSubRegRenderer, 454 455 /// Render operands to the specified instruction using a custom function 456 /// - InsnID(ULEB128) - Instruction ID to modify 457 /// - OldInsnID(ULEB128) - Instruction ID to get the matched operand from 458 /// - RendererFnID(2) - Custom renderer function to call 459 GIR_CustomRenderer, 460 461 /// Calls a C++ function to perform an action when a match is complete. 462 /// The MatcherState is passed to the function to allow it to modify 463 /// instructions. 464 /// This is less constrained than a custom renderer and can update 465 /// instructions 466 /// in the state. 467 /// - FnID(2) - The function to call. 468 /// TODO: Remove this at some point when combiners aren't reliant on it. It's 469 /// a bit of a hack. 470 GIR_CustomAction, 471 472 /// Render operands to the specified instruction using a custom function, 473 /// reading from a specific operand. 474 /// - InsnID(ULEB128) - Instruction ID to modify 475 /// - OldInsnID(ULEB128) - Instruction ID to get the matched operand from 476 /// - OpIdx(ULEB128) - Operand index in OldInsnID the render function should 477 /// read 478 /// from.. 479 /// - RendererFnID(2) - Custom renderer function to call 480 GIR_CustomOperandRenderer, 481 482 /// Render a G_CONSTANT operator as a sign-extended immediate. 483 /// - NewInsnID(ULEB128) - Instruction ID to modify 484 /// - OldInsnID(ULEB128) - Instruction ID to copy from 485 /// The operand index is implicitly 1. 486 GIR_CopyConstantAsSImm, 487 488 /// Render a G_FCONSTANT operator as a sign-extended immediate. 489 /// - NewInsnID(ULEB128) - Instruction ID to modify 490 /// - OldInsnID(ULEB128) - Instruction ID to copy from 491 /// The operand index is implicitly 1. 492 GIR_CopyFConstantAsFPImm, 493 494 /// Constrain an instruction operand to a register class. 495 /// - InsnID(ULEB128) - Instruction ID to modify 496 /// - OpIdx(ULEB128) - Operand index 497 /// - RCEnum(2) - Register class enumeration value 498 GIR_ConstrainOperandRC, 499 500 /// Constrain an instructions operands according to the instruction 501 /// description. 502 /// - InsnID(ULEB128) - Instruction ID to modify 503 GIR_ConstrainSelectedInstOperands, 504 505 /// Merge all memory operands into instruction. 506 /// - InsnID(ULEB128) - Instruction ID to modify 507 /// - NumInsnID(1) - Number of instruction IDs following this argument 508 /// - MergeInsnID(ULEB128)... - One or more Instruction ID to merge into the 509 /// result. 510 GIR_MergeMemOperands, 511 512 /// Erase from parent. 513 /// - InsnID(ULEB128) - Instruction ID to erase 514 GIR_EraseFromParent, 515 516 /// Create a new temporary register that's not constrained. 517 /// - TempRegID(ULEB128) - The temporary register ID to initialize. 518 /// - Ty(1) - Expected type 519 GIR_MakeTempReg, 520 521 /// Replaces all references to a register from an instruction 522 /// with another register from another instruction. 523 /// - OldInsnID(ULEB128) 524 /// - OldOpIdx(ULEB128) 525 /// - NewInsnID(ULEB128) 526 /// - NewOpIdx(ULEB128) 527 GIR_ReplaceReg, 528 529 /// Replaces all references to a register with a temporary register. 530 /// - OldInsnID(ULEB128) 531 /// - OldOpIdx(ULEB128) 532 /// - TempRegIdx(ULEB128) 533 GIR_ReplaceRegWithTempReg, 534 535 /// A successful emission 536 GIR_Done, 537 538 /// Increment the rule coverage counter. 539 /// - RuleID(4) - The ID of the rule that was covered. 540 GIR_Coverage, 541 542 /// Keeping track of the number of the GI opcodes. Must be the last entry. 543 GIU_NumOpcodes, 544 }; 545 546 /// Provides the logic to execute GlobalISel match tables, which are used by the 547 /// instruction selector and instruction combiners as their engine to match and 548 /// apply MIR patterns. 549 class GIMatchTableExecutor { 550 public: 551 virtual ~GIMatchTableExecutor() = default; 552 553 CodeGenCoverage *CoverageInfo = nullptr; 554 GISelKnownBits *KB = nullptr; 555 MachineFunction *MF = nullptr; 556 ProfileSummaryInfo *PSI = nullptr; 557 BlockFrequencyInfo *BFI = nullptr; 558 // For some predicates, we need to track the current MBB. 559 MachineBasicBlock *CurMBB = nullptr; 560 561 virtual void setupGeneratedPerFunctionState(MachineFunction &MF) = 0; 562 563 /// Setup per-MF executor state. 564 virtual void setupMF(MachineFunction &mf, GISelKnownBits *kb, 565 CodeGenCoverage *covinfo = nullptr, 566 ProfileSummaryInfo *psi = nullptr, 567 BlockFrequencyInfo *bfi = nullptr) { 568 CoverageInfo = covinfo; 569 KB = kb; 570 MF = &mf; 571 PSI = psi; 572 BFI = bfi; 573 CurMBB = nullptr; 574 setupGeneratedPerFunctionState(mf); 575 } 576 577 protected: 578 using ComplexRendererFns = 579 std::optional<SmallVector<std::function<void(MachineInstrBuilder &)>, 4>>; 580 using RecordedMIVector = SmallVector<MachineInstr *, 4>; 581 using NewMIVector = SmallVector<MachineInstrBuilder, 4>; 582 583 struct MatcherState { 584 std::vector<ComplexRendererFns::value_type> Renderers; 585 RecordedMIVector MIs; 586 DenseMap<unsigned, unsigned> TempRegisters; 587 /// Named operands that predicate with 'let PredicateCodeUsesOperands = 1' 588 /// referenced in its argument list. Operands are inserted at index set by 589 /// emitter, it corresponds to the order in which names appear in argument 590 /// list. Currently such predicates don't have more then 3 arguments. 591 std::array<const MachineOperand *, 3> RecordedOperands; 592 593 /// Types extracted from an instruction's operand. 594 /// Whenever a type index is negative, we look here instead. 595 SmallVector<LLT, 4> RecordedTypes; 596 597 MatcherState(unsigned MaxRenderers); 598 }; 599 shouldOptForSize(const MachineFunction * MF)600 bool shouldOptForSize(const MachineFunction *MF) const { 601 const auto &F = MF->getFunction(); 602 return F.hasOptSize() || F.hasMinSize() || 603 (PSI && BFI && CurMBB && llvm::shouldOptForSize(*CurMBB, PSI, BFI)); 604 } 605 606 public: 607 template <class PredicateBitset, class ComplexMatcherMemFn, 608 class CustomRendererFn> 609 struct ExecInfoTy { ExecInfoTyExecInfoTy610 ExecInfoTy(const LLT *TypeObjects, size_t NumTypeObjects, 611 const PredicateBitset *FeatureBitsets, 612 const ComplexMatcherMemFn *ComplexPredicates, 613 const CustomRendererFn *CustomRenderers) 614 : TypeObjects(TypeObjects), FeatureBitsets(FeatureBitsets), 615 ComplexPredicates(ComplexPredicates), 616 CustomRenderers(CustomRenderers) { 617 618 for (size_t I = 0; I < NumTypeObjects; ++I) 619 TypeIDMap[TypeObjects[I]] = I; 620 } 621 const LLT *TypeObjects; 622 const PredicateBitset *FeatureBitsets; 623 const ComplexMatcherMemFn *ComplexPredicates; 624 const CustomRendererFn *CustomRenderers; 625 626 SmallDenseMap<LLT, unsigned, 64> TypeIDMap; 627 }; 628 629 protected: 630 GIMatchTableExecutor(); 631 632 /// Execute a given matcher table and return true if the match was successful 633 /// and false otherwise. 634 template <class TgtExecutor, class PredicateBitset, class ComplexMatcherMemFn, 635 class CustomRendererFn> 636 bool executeMatchTable(TgtExecutor &Exec, MatcherState &State, 637 const ExecInfoTy<PredicateBitset, ComplexMatcherMemFn, 638 CustomRendererFn> &ExecInfo, 639 MachineIRBuilder &Builder, const uint8_t *MatchTable, 640 const TargetInstrInfo &TII, MachineRegisterInfo &MRI, 641 const TargetRegisterInfo &TRI, 642 const RegisterBankInfo &RBI, 643 const PredicateBitset &AvailableFeatures, 644 CodeGenCoverage *CoverageInfo) const; 645 getMatchTable()646 virtual const uint8_t *getMatchTable() const { 647 llvm_unreachable("Should have been overridden by tablegen if used"); 648 } 649 testImmPredicate_I64(unsigned,int64_t)650 virtual bool testImmPredicate_I64(unsigned, int64_t) const { 651 llvm_unreachable( 652 "Subclasses must override this with a tablegen-erated function"); 653 } testImmPredicate_APInt(unsigned,const APInt &)654 virtual bool testImmPredicate_APInt(unsigned, const APInt &) const { 655 llvm_unreachable( 656 "Subclasses must override this with a tablegen-erated function"); 657 } testImmPredicate_APFloat(unsigned,const APFloat &)658 virtual bool testImmPredicate_APFloat(unsigned, const APFloat &) const { 659 llvm_unreachable( 660 "Subclasses must override this with a tablegen-erated function"); 661 } testMIPredicate_MI(unsigned,const MachineInstr &,const MatcherState & State)662 virtual bool testMIPredicate_MI(unsigned, const MachineInstr &, 663 const MatcherState &State) const { 664 llvm_unreachable( 665 "Subclasses must override this with a tablegen-erated function"); 666 } 667 testSimplePredicate(unsigned)668 virtual bool testSimplePredicate(unsigned) const { 669 llvm_unreachable("Subclass does not implement testSimplePredicate!"); 670 } 671 runCustomAction(unsigned,const MatcherState & State,NewMIVector & OutMIs)672 virtual void runCustomAction(unsigned, const MatcherState &State, 673 NewMIVector &OutMIs) const { 674 llvm_unreachable("Subclass does not implement runCustomAction!"); 675 } 676 677 bool isOperandImmEqual(const MachineOperand &MO, int64_t Value, 678 const MachineRegisterInfo &MRI, 679 bool Splat = false) const; 680 681 /// Return true if the specified operand is a G_PTR_ADD with a G_CONSTANT on 682 /// the right-hand side. GlobalISel's separation of pointer and integer types 683 /// means that we don't need to worry about G_OR with equivalent semantics. 684 bool isBaseWithConstantOffset(const MachineOperand &Root, 685 const MachineRegisterInfo &MRI) const; 686 687 /// Return true if MI can obviously be folded into IntoMI. 688 /// MI and IntoMI do not need to be in the same basic blocks, but MI must 689 /// preceed IntoMI. 690 bool isObviouslySafeToFold(MachineInstr &MI, MachineInstr &IntoMI) const; 691 readBytesAs(const uint8_t * MatchTable)692 template <typename Ty> static Ty readBytesAs(const uint8_t *MatchTable) { 693 Ty Ret; 694 memcpy(&Ret, MatchTable, sizeof(Ret)); 695 return Ret; 696 } 697 }; 698 699 } // end namespace llvm 700 701 #endif // LLVM_CODEGEN_GLOBALISEL_GIMATCHTABLEEXECUTOR_H 702