1 //===- LiveStacks.h - Live Stack Slot Analysis ------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the live stack slot analysis pass. It is analogous to
10 // live interval analysis except it's analyzing liveness of stack slots rather
11 // than registers.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_CODEGEN_LIVESTACKS_H
16 #define LLVM_CODEGEN_LIVESTACKS_H
17 
18 #include "llvm/CodeGen/LiveInterval.h"
19 #include "llvm/CodeGen/MachineFunctionPass.h"
20 #include "llvm/InitializePasses.h"
21 #include "llvm/PassRegistry.h"
22 #include <cassert>
23 #include <map>
24 #include <unordered_map>
25 
26 namespace llvm {
27 
28 class AnalysisUsage;
29 class MachineFunction;
30 class Module;
31 class raw_ostream;
32 class TargetRegisterClass;
33 class TargetRegisterInfo;
34 
35 class LiveStacks : public MachineFunctionPass {
36   const TargetRegisterInfo *TRI;
37 
38   /// Special pool allocator for VNInfo's (LiveInterval val#).
39   ///
40   VNInfo::Allocator VNInfoAllocator;
41 
42   /// S2IMap - Stack slot indices to live interval mapping.
43   using SS2IntervalMap = std::unordered_map<int, LiveInterval>;
44   SS2IntervalMap S2IMap;
45 
46   /// S2RCMap - Stack slot indices to register class mapping.
47   std::map<int, const TargetRegisterClass *> S2RCMap;
48 
49 public:
50   static char ID; // Pass identification, replacement for typeid
51 
52   LiveStacks() : MachineFunctionPass(ID) {
53     initializeLiveStacksPass(*PassRegistry::getPassRegistry());
54   }
55 
56   using iterator = SS2IntervalMap::iterator;
57   using const_iterator = SS2IntervalMap::const_iterator;
58 
59   const_iterator begin() const { return S2IMap.begin(); }
60   const_iterator end() const { return S2IMap.end(); }
61   iterator begin() { return S2IMap.begin(); }
62   iterator end() { return S2IMap.end(); }
63 
64   unsigned getNumIntervals() const { return (unsigned)S2IMap.size(); }
65 
66   LiveInterval &getOrCreateInterval(int Slot, const TargetRegisterClass *RC);
67 
68   LiveInterval &getInterval(int Slot) {
69     assert(Slot >= 0 && "Spill slot indice must be >= 0");
70     SS2IntervalMap::iterator I = S2IMap.find(Slot);
71     assert(I != S2IMap.end() && "Interval does not exist for stack slot");
72     return I->second;
73   }
74 
75   const LiveInterval &getInterval(int Slot) const {
76     assert(Slot >= 0 && "Spill slot indice must be >= 0");
77     SS2IntervalMap::const_iterator I = S2IMap.find(Slot);
78     assert(I != S2IMap.end() && "Interval does not exist for stack slot");
79     return I->second;
80   }
81 
82   bool hasInterval(int Slot) const { return S2IMap.count(Slot); }
83 
84   const TargetRegisterClass *getIntervalRegClass(int Slot) const {
85     assert(Slot >= 0 && "Spill slot indice must be >= 0");
86     std::map<int, const TargetRegisterClass *>::const_iterator I =
87         S2RCMap.find(Slot);
88     assert(I != S2RCMap.end() &&
89            "Register class info does not exist for stack slot");
90     return I->second;
91   }
92 
93   VNInfo::Allocator &getVNInfoAllocator() { return VNInfoAllocator; }
94 
95   void getAnalysisUsage(AnalysisUsage &AU) const override;
96   void releaseMemory() override;
97 
98   /// runOnMachineFunction - pass entry point
99   bool runOnMachineFunction(MachineFunction &) override;
100 
101   /// print - Implement the dump method.
102   void print(raw_ostream &O, const Module * = nullptr) const override;
103 };
104 
105 } // end namespace llvm
106 
107 #endif
108