1 //===- CodeGen/MachineInstrBuilder.h - Simplify creation of MIs --*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file exposes a function named BuildMI, which is useful for dramatically 10 // simplifying how MachineInstr's are created. It allows use of code like this: 11 // 12 // MIMetadata MIMD(MI); // Propagates DebugLoc and other metadata 13 // M = BuildMI(MBB, MI, MIMD, TII.get(X86::ADD8rr), Dst) 14 // .addReg(argVal1) 15 // .addReg(argVal2); 16 // 17 //===----------------------------------------------------------------------===// 18 19 #ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H 20 #define LLVM_CODEGEN_MACHINEINSTRBUILDER_H 21 22 #include "llvm/ADT/ArrayRef.h" 23 #include "llvm/CodeGen/GlobalISel/Utils.h" 24 #include "llvm/CodeGen/MachineBasicBlock.h" 25 #include "llvm/CodeGen/MachineFunction.h" 26 #include "llvm/CodeGen/MachineInstr.h" 27 #include "llvm/CodeGen/MachineInstrBundle.h" 28 #include "llvm/CodeGen/MachineOperand.h" 29 #include "llvm/CodeGen/TargetRegisterInfo.h" 30 #include "llvm/IR/InstrTypes.h" 31 #include "llvm/IR/Intrinsics.h" 32 #include "llvm/Support/ErrorHandling.h" 33 #include <cassert> 34 #include <cstdint> 35 36 namespace llvm { 37 38 class MCInstrDesc; 39 class MDNode; 40 41 namespace RegState { 42 43 enum { 44 /// Register definition. 45 Define = 0x2, 46 /// Not emitted register (e.g. carry, or temporary result). 47 Implicit = 0x4, 48 /// The last use of a register. 49 Kill = 0x8, 50 /// Unused definition. 51 Dead = 0x10, 52 /// Value of the register doesn't matter. 53 Undef = 0x20, 54 /// Register definition happens before uses. 55 EarlyClobber = 0x40, 56 /// Register 'use' is for debugging purpose. 57 Debug = 0x80, 58 /// Register reads a value that is defined inside the same instruction or 59 /// bundle. 60 InternalRead = 0x100, 61 /// Register that may be renamed. 62 Renamable = 0x200, 63 DefineNoRead = Define | Undef, 64 ImplicitDefine = Implicit | Define, 65 ImplicitKill = Implicit | Kill 66 }; 67 68 } // end namespace RegState 69 70 class MachineInstrBuilder { 71 MachineFunction *MF = nullptr; 72 MachineInstr *MI = nullptr; 73 74 public: 75 MachineInstrBuilder() = default; 76 77 /// Create a MachineInstrBuilder for manipulating an existing instruction. 78 /// F must be the machine function that was used to allocate I. 79 MachineInstrBuilder(MachineFunction &F, MachineInstr *I) : MF(&F), MI(I) {} 80 MachineInstrBuilder(MachineFunction &F, MachineBasicBlock::iterator I) 81 : MF(&F), MI(&*I) {} 82 83 /// Allow automatic conversion to the machine instruction we are working on. 84 operator MachineInstr*() const { return MI; } 85 MachineInstr *operator->() const { return MI; } 86 operator MachineBasicBlock::iterator() const { return MI; } 87 88 /// If conversion operators fail, use this method to get the MachineInstr 89 /// explicitly. 90 MachineInstr *getInstr() const { return MI; } 91 92 /// Get the register for the operand index. 93 /// The operand at the index should be a register (asserted by 94 /// MachineOperand). 95 Register getReg(unsigned Idx) const { return MI->getOperand(Idx).getReg(); } 96 97 /// Add a new virtual register operand. 98 const MachineInstrBuilder &addReg(Register RegNo, unsigned flags = 0, 99 unsigned SubReg = 0) const { 100 assert((flags & 0x1) == 0 && 101 "Passing in 'true' to addReg is forbidden! Use enums instead."); 102 MI->addOperand(*MF, MachineOperand::CreateReg(RegNo, 103 flags & RegState::Define, 104 flags & RegState::Implicit, 105 flags & RegState::Kill, 106 flags & RegState::Dead, 107 flags & RegState::Undef, 108 flags & RegState::EarlyClobber, 109 SubReg, 110 flags & RegState::Debug, 111 flags & RegState::InternalRead, 112 flags & RegState::Renamable)); 113 return *this; 114 } 115 116 /// Add a virtual register definition operand. 117 const MachineInstrBuilder &addDef(Register RegNo, unsigned Flags = 0, 118 unsigned SubReg = 0) const { 119 return addReg(RegNo, Flags | RegState::Define, SubReg); 120 } 121 122 /// Add a virtual register use operand. It is an error for Flags to contain 123 /// `RegState::Define` when calling this function. 124 const MachineInstrBuilder &addUse(Register RegNo, unsigned Flags = 0, 125 unsigned SubReg = 0) const { 126 assert(!(Flags & RegState::Define) && 127 "Misleading addUse defines register, use addReg instead."); 128 return addReg(RegNo, Flags, SubReg); 129 } 130 131 /// Add a new immediate operand. 132 const MachineInstrBuilder &addImm(int64_t Val) const { 133 MI->addOperand(*MF, MachineOperand::CreateImm(Val)); 134 return *this; 135 } 136 137 const MachineInstrBuilder &addCImm(const ConstantInt *Val) const { 138 MI->addOperand(*MF, MachineOperand::CreateCImm(Val)); 139 return *this; 140 } 141 142 const MachineInstrBuilder &addFPImm(const ConstantFP *Val) const { 143 MI->addOperand(*MF, MachineOperand::CreateFPImm(Val)); 144 return *this; 145 } 146 147 const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB, 148 unsigned TargetFlags = 0) const { 149 MI->addOperand(*MF, MachineOperand::CreateMBB(MBB, TargetFlags)); 150 return *this; 151 } 152 153 const MachineInstrBuilder &addFrameIndex(int Idx) const { 154 MI->addOperand(*MF, MachineOperand::CreateFI(Idx)); 155 return *this; 156 } 157 158 const MachineInstrBuilder & 159 addConstantPoolIndex(unsigned Idx, int Offset = 0, 160 unsigned TargetFlags = 0) const { 161 MI->addOperand(*MF, MachineOperand::CreateCPI(Idx, Offset, TargetFlags)); 162 return *this; 163 } 164 165 const MachineInstrBuilder &addTargetIndex(unsigned Idx, int64_t Offset = 0, 166 unsigned TargetFlags = 0) const { 167 MI->addOperand(*MF, MachineOperand::CreateTargetIndex(Idx, Offset, 168 TargetFlags)); 169 return *this; 170 } 171 172 const MachineInstrBuilder &addJumpTableIndex(unsigned Idx, 173 unsigned TargetFlags = 0) const { 174 MI->addOperand(*MF, MachineOperand::CreateJTI(Idx, TargetFlags)); 175 return *this; 176 } 177 178 const MachineInstrBuilder &addGlobalAddress(const GlobalValue *GV, 179 int64_t Offset = 0, 180 unsigned TargetFlags = 0) const { 181 MI->addOperand(*MF, MachineOperand::CreateGA(GV, Offset, TargetFlags)); 182 return *this; 183 } 184 185 const MachineInstrBuilder &addExternalSymbol(const char *FnName, 186 unsigned TargetFlags = 0) const { 187 MI->addOperand(*MF, MachineOperand::CreateES(FnName, TargetFlags)); 188 return *this; 189 } 190 191 const MachineInstrBuilder &addBlockAddress(const BlockAddress *BA, 192 int64_t Offset = 0, 193 unsigned TargetFlags = 0) const { 194 MI->addOperand(*MF, MachineOperand::CreateBA(BA, Offset, TargetFlags)); 195 return *this; 196 } 197 198 const MachineInstrBuilder &addRegMask(const uint32_t *Mask) const { 199 MI->addOperand(*MF, MachineOperand::CreateRegMask(Mask)); 200 return *this; 201 } 202 203 const MachineInstrBuilder &addMemOperand(MachineMemOperand *MMO) const { 204 MI->addMemOperand(*MF, MMO); 205 return *this; 206 } 207 208 const MachineInstrBuilder & 209 setMemRefs(ArrayRef<MachineMemOperand *> MMOs) const { 210 MI->setMemRefs(*MF, MMOs); 211 return *this; 212 } 213 214 const MachineInstrBuilder &cloneMemRefs(const MachineInstr &OtherMI) const { 215 MI->cloneMemRefs(*MF, OtherMI); 216 return *this; 217 } 218 219 const MachineInstrBuilder & 220 cloneMergedMemRefs(ArrayRef<const MachineInstr *> OtherMIs) const { 221 MI->cloneMergedMemRefs(*MF, OtherMIs); 222 return *this; 223 } 224 225 const MachineInstrBuilder &add(const MachineOperand &MO) const { 226 MI->addOperand(*MF, MO); 227 return *this; 228 } 229 230 const MachineInstrBuilder &add(ArrayRef<MachineOperand> MOs) const { 231 for (const MachineOperand &MO : MOs) { 232 MI->addOperand(*MF, MO); 233 } 234 return *this; 235 } 236 237 const MachineInstrBuilder &addMetadata(const MDNode *MD) const { 238 MI->addOperand(*MF, MachineOperand::CreateMetadata(MD)); 239 assert((MI->isDebugValueLike() ? static_cast<bool>(MI->getDebugVariable()) 240 : true) && 241 "first MDNode argument of a DBG_VALUE not a variable"); 242 assert((MI->isDebugLabel() ? static_cast<bool>(MI->getDebugLabel()) 243 : true) && 244 "first MDNode argument of a DBG_LABEL not a label"); 245 return *this; 246 } 247 248 const MachineInstrBuilder &addCFIIndex(unsigned CFIIndex) const { 249 MI->addOperand(*MF, MachineOperand::CreateCFIIndex(CFIIndex)); 250 return *this; 251 } 252 253 const MachineInstrBuilder &addIntrinsicID(Intrinsic::ID ID) const { 254 MI->addOperand(*MF, MachineOperand::CreateIntrinsicID(ID)); 255 return *this; 256 } 257 258 const MachineInstrBuilder &addPredicate(CmpInst::Predicate Pred) const { 259 MI->addOperand(*MF, MachineOperand::CreatePredicate(Pred)); 260 return *this; 261 } 262 263 const MachineInstrBuilder &addShuffleMask(ArrayRef<int> Val) const { 264 MI->addOperand(*MF, MachineOperand::CreateShuffleMask(Val)); 265 return *this; 266 } 267 268 const MachineInstrBuilder &addSym(MCSymbol *Sym, 269 unsigned char TargetFlags = 0) const { 270 MI->addOperand(*MF, MachineOperand::CreateMCSymbol(Sym, TargetFlags)); 271 return *this; 272 } 273 274 const MachineInstrBuilder &setMIFlags(unsigned Flags) const { 275 MI->setFlags(Flags); 276 return *this; 277 } 278 279 const MachineInstrBuilder &setMIFlag(MachineInstr::MIFlag Flag) const { 280 MI->setFlag(Flag); 281 return *this; 282 } 283 284 // Add a displacement from an existing MachineOperand with an added offset. 285 const MachineInstrBuilder &addDisp(const MachineOperand &Disp, int64_t off, 286 unsigned char TargetFlags = 0) const { 287 // If caller specifies new TargetFlags then use it, otherwise the 288 // default behavior is to copy the target flags from the existing 289 // MachineOperand. This means if the caller wants to clear the 290 // target flags it needs to do so explicitly. 291 if (0 == TargetFlags) 292 TargetFlags = Disp.getTargetFlags(); 293 294 switch (Disp.getType()) { 295 default: 296 llvm_unreachable("Unhandled operand type in addDisp()"); 297 case MachineOperand::MO_Immediate: 298 return addImm(Disp.getImm() + off); 299 case MachineOperand::MO_ConstantPoolIndex: 300 return addConstantPoolIndex(Disp.getIndex(), Disp.getOffset() + off, 301 TargetFlags); 302 case MachineOperand::MO_GlobalAddress: 303 return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off, 304 TargetFlags); 305 case MachineOperand::MO_BlockAddress: 306 return addBlockAddress(Disp.getBlockAddress(), Disp.getOffset() + off, 307 TargetFlags); 308 case MachineOperand::MO_JumpTableIndex: 309 assert(off == 0 && "cannot create offset into jump tables"); 310 return addJumpTableIndex(Disp.getIndex(), TargetFlags); 311 } 312 } 313 314 const MachineInstrBuilder &setPCSections(MDNode *MD) const { 315 if (MD) 316 MI->setPCSections(*MF, MD); 317 return *this; 318 } 319 320 /// Copy all the implicit operands from OtherMI onto this one. 321 const MachineInstrBuilder & 322 copyImplicitOps(const MachineInstr &OtherMI) const { 323 MI->copyImplicitOps(*MF, OtherMI); 324 return *this; 325 } 326 327 bool constrainAllUses(const TargetInstrInfo &TII, 328 const TargetRegisterInfo &TRI, 329 const RegisterBankInfo &RBI) const { 330 return constrainSelectedInstRegOperands(*MI, TII, TRI, RBI); 331 } 332 }; 333 334 /// Set of metadata that should be preserved when using BuildMI(). This provides 335 /// a more convenient way of preserving DebugLoc and PCSections. 336 class MIMetadata { 337 public: 338 MIMetadata() = default; 339 MIMetadata(DebugLoc DL, MDNode *PCSections = nullptr) 340 : DL(std::move(DL)), PCSections(PCSections) {} 341 MIMetadata(const DILocation *DI, MDNode *PCSections = nullptr) 342 : DL(DI), PCSections(PCSections) {} 343 explicit MIMetadata(const Instruction &From) 344 : DL(From.getDebugLoc()), 345 PCSections(From.getMetadata(LLVMContext::MD_pcsections)) {} 346 explicit MIMetadata(const MachineInstr &From) 347 : DL(From.getDebugLoc()), PCSections(From.getPCSections()) {} 348 349 const DebugLoc &getDL() const { return DL; } 350 MDNode *getPCSections() const { return PCSections; } 351 352 private: 353 DebugLoc DL; 354 MDNode *PCSections = nullptr; 355 }; 356 357 /// Builder interface. Specify how to create the initial instruction itself. 358 inline MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, 359 const MCInstrDesc &MCID) { 360 return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, MIMD.getDL())) 361 .setPCSections(MIMD.getPCSections()); 362 } 363 364 /// This version of the builder sets up the first operand as a 365 /// destination virtual register. 366 inline MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, 367 const MCInstrDesc &MCID, Register DestReg) { 368 return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, MIMD.getDL())) 369 .setPCSections(MIMD.getPCSections()) 370 .addReg(DestReg, RegState::Define); 371 } 372 373 /// This version of the builder inserts the newly-built instruction before 374 /// the given position in the given MachineBasicBlock, and sets up the first 375 /// operand as a destination virtual register. 376 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, 377 MachineBasicBlock::iterator I, 378 const MIMetadata &MIMD, 379 const MCInstrDesc &MCID, Register DestReg) { 380 MachineFunction &MF = *BB.getParent(); 381 MachineInstr *MI = MF.CreateMachineInstr(MCID, MIMD.getDL()); 382 BB.insert(I, MI); 383 return MachineInstrBuilder(MF, MI) 384 .setPCSections(MIMD.getPCSections()) 385 .addReg(DestReg, RegState::Define); 386 } 387 388 /// This version of the builder inserts the newly-built instruction before 389 /// the given position in the given MachineBasicBlock, and sets up the first 390 /// operand as a destination virtual register. 391 /// 392 /// If \c I is inside a bundle, then the newly inserted \a MachineInstr is 393 /// added to the same bundle. 394 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, 395 MachineBasicBlock::instr_iterator I, 396 const MIMetadata &MIMD, 397 const MCInstrDesc &MCID, Register DestReg) { 398 MachineFunction &MF = *BB.getParent(); 399 MachineInstr *MI = MF.CreateMachineInstr(MCID, MIMD.getDL()); 400 BB.insert(I, MI); 401 return MachineInstrBuilder(MF, MI) 402 .setPCSections(MIMD.getPCSections()) 403 .addReg(DestReg, RegState::Define); 404 } 405 406 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr &I, 407 const MIMetadata &MIMD, 408 const MCInstrDesc &MCID, Register DestReg) { 409 // Calling the overload for instr_iterator is always correct. However, the 410 // definition is not available in headers, so inline the check. 411 if (I.isInsideBundle()) 412 return BuildMI(BB, MachineBasicBlock::instr_iterator(I), MIMD, MCID, 413 DestReg); 414 return BuildMI(BB, MachineBasicBlock::iterator(I), MIMD, MCID, DestReg); 415 } 416 417 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr *I, 418 const MIMetadata &MIMD, 419 const MCInstrDesc &MCID, Register DestReg) { 420 return BuildMI(BB, *I, MIMD, MCID, DestReg); 421 } 422 423 /// This version of the builder inserts the newly-built instruction before the 424 /// given position in the given MachineBasicBlock, and does NOT take a 425 /// destination register. 426 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, 427 MachineBasicBlock::iterator I, 428 const MIMetadata &MIMD, 429 const MCInstrDesc &MCID) { 430 MachineFunction &MF = *BB.getParent(); 431 MachineInstr *MI = MF.CreateMachineInstr(MCID, MIMD.getDL()); 432 BB.insert(I, MI); 433 return MachineInstrBuilder(MF, MI).setPCSections(MIMD.getPCSections()); 434 } 435 436 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, 437 MachineBasicBlock::instr_iterator I, 438 const MIMetadata &MIMD, 439 const MCInstrDesc &MCID) { 440 MachineFunction &MF = *BB.getParent(); 441 MachineInstr *MI = MF.CreateMachineInstr(MCID, MIMD.getDL()); 442 BB.insert(I, MI); 443 return MachineInstrBuilder(MF, MI).setPCSections(MIMD.getPCSections()); 444 } 445 446 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr &I, 447 const MIMetadata &MIMD, 448 const MCInstrDesc &MCID) { 449 // Calling the overload for instr_iterator is always correct. However, the 450 // definition is not available in headers, so inline the check. 451 if (I.isInsideBundle()) 452 return BuildMI(BB, MachineBasicBlock::instr_iterator(I), MIMD, MCID); 453 return BuildMI(BB, MachineBasicBlock::iterator(I), MIMD, MCID); 454 } 455 456 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr *I, 457 const MIMetadata &MIMD, 458 const MCInstrDesc &MCID) { 459 return BuildMI(BB, *I, MIMD, MCID); 460 } 461 462 /// This version of the builder inserts the newly-built instruction at the end 463 /// of the given MachineBasicBlock, and does NOT take a destination register. 464 inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, 465 const MIMetadata &MIMD, 466 const MCInstrDesc &MCID) { 467 return BuildMI(*BB, BB->end(), MIMD, MCID); 468 } 469 470 /// This version of the builder inserts the newly-built instruction at the 471 /// end of the given MachineBasicBlock, and sets up the first operand as a 472 /// destination virtual register. 473 inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, 474 const MIMetadata &MIMD, 475 const MCInstrDesc &MCID, Register DestReg) { 476 return BuildMI(*BB, BB->end(), MIMD, MCID, DestReg); 477 } 478 479 /// This version of the builder builds a DBG_VALUE intrinsic 480 /// for either a value in a register or a register-indirect 481 /// address. The convention is that a DBG_VALUE is indirect iff the 482 /// second operand is an immediate. 483 MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, 484 const MCInstrDesc &MCID, bool IsIndirect, 485 Register Reg, const MDNode *Variable, 486 const MDNode *Expr); 487 488 /// This version of the builder builds a DBG_VALUE or DBG_VALUE_LIST intrinsic 489 /// for a MachineOperand. 490 MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, 491 const MCInstrDesc &MCID, bool IsIndirect, 492 ArrayRef<MachineOperand> MOs, 493 const MDNode *Variable, const MDNode *Expr); 494 495 /// This version of the builder builds a DBG_VALUE intrinsic 496 /// for either a value in a register or a register-indirect 497 /// address and inserts it at position I. 498 MachineInstrBuilder BuildMI(MachineBasicBlock &BB, 499 MachineBasicBlock::iterator I, const DebugLoc &DL, 500 const MCInstrDesc &MCID, bool IsIndirect, 501 Register Reg, const MDNode *Variable, 502 const MDNode *Expr); 503 504 /// This version of the builder builds a DBG_VALUE, DBG_INSTR_REF, or 505 /// DBG_VALUE_LIST intrinsic for a machine operand and inserts it at position I. 506 MachineInstrBuilder BuildMI(MachineBasicBlock &BB, 507 MachineBasicBlock::iterator I, const DebugLoc &DL, 508 const MCInstrDesc &MCID, bool IsIndirect, 509 ArrayRef<MachineOperand> MOs, 510 const MDNode *Variable, const MDNode *Expr); 511 512 /// Clone a DBG_VALUE whose value has been spilled to FrameIndex. 513 MachineInstr *buildDbgValueForSpill(MachineBasicBlock &BB, 514 MachineBasicBlock::iterator I, 515 const MachineInstr &Orig, int FrameIndex, 516 Register SpillReg); 517 MachineInstr * 518 buildDbgValueForSpill(MachineBasicBlock &BB, MachineBasicBlock::iterator I, 519 const MachineInstr &Orig, int FrameIndex, 520 SmallVectorImpl<const MachineOperand *> &SpilledOperands); 521 522 /// Update a DBG_VALUE whose value has been spilled to FrameIndex. Useful when 523 /// modifying an instruction in place while iterating over a basic block. 524 void updateDbgValueForSpill(MachineInstr &Orig, int FrameIndex, Register Reg); 525 526 inline unsigned getDefRegState(bool B) { 527 return B ? RegState::Define : 0; 528 } 529 inline unsigned getImplRegState(bool B) { 530 return B ? RegState::Implicit : 0; 531 } 532 inline unsigned getKillRegState(bool B) { 533 return B ? RegState::Kill : 0; 534 } 535 inline unsigned getDeadRegState(bool B) { 536 return B ? RegState::Dead : 0; 537 } 538 inline unsigned getUndefRegState(bool B) { 539 return B ? RegState::Undef : 0; 540 } 541 inline unsigned getInternalReadRegState(bool B) { 542 return B ? RegState::InternalRead : 0; 543 } 544 inline unsigned getDebugRegState(bool B) { 545 return B ? RegState::Debug : 0; 546 } 547 inline unsigned getRenamableRegState(bool B) { 548 return B ? RegState::Renamable : 0; 549 } 550 551 /// Get all register state flags from machine operand \p RegOp. 552 inline unsigned getRegState(const MachineOperand &RegOp) { 553 assert(RegOp.isReg() && "Not a register operand"); 554 return getDefRegState(RegOp.isDef()) | getImplRegState(RegOp.isImplicit()) | 555 getKillRegState(RegOp.isKill()) | getDeadRegState(RegOp.isDead()) | 556 getUndefRegState(RegOp.isUndef()) | 557 getInternalReadRegState(RegOp.isInternalRead()) | 558 getDebugRegState(RegOp.isDebug()) | 559 getRenamableRegState(RegOp.getReg().isPhysical() && 560 RegOp.isRenamable()); 561 } 562 563 /// Helper class for constructing bundles of MachineInstrs. 564 /// 565 /// MIBundleBuilder can create a bundle from scratch by inserting new 566 /// MachineInstrs one at a time, or it can create a bundle from a sequence of 567 /// existing MachineInstrs in a basic block. 568 class MIBundleBuilder { 569 MachineBasicBlock &MBB; 570 MachineBasicBlock::instr_iterator Begin; 571 MachineBasicBlock::instr_iterator End; 572 573 public: 574 /// Create an MIBundleBuilder that inserts instructions into a new bundle in 575 /// BB above the bundle or instruction at Pos. 576 MIBundleBuilder(MachineBasicBlock &BB, MachineBasicBlock::iterator Pos) 577 : MBB(BB), Begin(Pos.getInstrIterator()), End(Begin) {} 578 579 /// Create a bundle from the sequence of instructions between B and E. 580 MIBundleBuilder(MachineBasicBlock &BB, MachineBasicBlock::iterator B, 581 MachineBasicBlock::iterator E) 582 : MBB(BB), Begin(B.getInstrIterator()), End(E.getInstrIterator()) { 583 assert(B != E && "No instructions to bundle"); 584 ++B; 585 while (B != E) { 586 MachineInstr &MI = *B; 587 ++B; 588 MI.bundleWithPred(); 589 } 590 } 591 592 /// Create an MIBundleBuilder representing an existing instruction or bundle 593 /// that has MI as its head. 594 explicit MIBundleBuilder(MachineInstr *MI) 595 : MBB(*MI->getParent()), Begin(MI), 596 End(getBundleEnd(MI->getIterator())) {} 597 598 /// Return a reference to the basic block containing this bundle. 599 MachineBasicBlock &getMBB() const { return MBB; } 600 601 /// Return true if no instructions have been inserted in this bundle yet. 602 /// Empty bundles aren't representable in a MachineBasicBlock. 603 bool empty() const { return Begin == End; } 604 605 /// Return an iterator to the first bundled instruction. 606 MachineBasicBlock::instr_iterator begin() const { return Begin; } 607 608 /// Return an iterator beyond the last bundled instruction. 609 MachineBasicBlock::instr_iterator end() const { return End; } 610 611 /// Insert MI into this bundle before I which must point to an instruction in 612 /// the bundle, or end(). 613 MIBundleBuilder &insert(MachineBasicBlock::instr_iterator I, 614 MachineInstr *MI) { 615 MBB.insert(I, MI); 616 if (I == Begin) { 617 if (!empty()) 618 MI->bundleWithSucc(); 619 Begin = MI->getIterator(); 620 return *this; 621 } 622 if (I == End) { 623 MI->bundleWithPred(); 624 return *this; 625 } 626 // MI was inserted in the middle of the bundle, so its neighbors' flags are 627 // already fine. Update MI's bundle flags manually. 628 MI->setFlag(MachineInstr::BundledPred); 629 MI->setFlag(MachineInstr::BundledSucc); 630 return *this; 631 } 632 633 /// Insert MI into MBB by prepending it to the instructions in the bundle. 634 /// MI will become the first instruction in the bundle. 635 MIBundleBuilder &prepend(MachineInstr *MI) { 636 return insert(begin(), MI); 637 } 638 639 /// Insert MI into MBB by appending it to the instructions in the bundle. 640 /// MI will become the last instruction in the bundle. 641 MIBundleBuilder &append(MachineInstr *MI) { 642 return insert(end(), MI); 643 } 644 }; 645 646 } // end namespace llvm 647 648 #endif // LLVM_CODEGEN_MACHINEINSTRBUILDER_H 649