1 //===-- Passes.h - Target independent code generation passes ----*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines interfaces to access the target independent code generation
10 // passes provided by the LLVM backend.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_CODEGEN_PASSES_H
15 #define LLVM_CODEGEN_PASSES_H
16 
17 #include "llvm/Support/CodeGen.h"
18 #include "llvm/Support/Discriminator.h"
19 #include "llvm/CodeGen/RegAllocCommon.h"
20 
21 #include <functional>
22 #include <string>
23 
24 namespace llvm {
25 
26 class FunctionPass;
27 class MachineFunction;
28 class MachineFunctionPass;
29 class ModulePass;
30 class Pass;
31 class TargetMachine;
32 class raw_ostream;
33 
34 template <typename T> class IntrusiveRefCntPtr;
35 namespace vfs {
36 class FileSystem;
37 } // namespace vfs
38 
39 } // End llvm namespace
40 
41 // List of target independent CodeGen pass IDs.
42 namespace llvm {
43 
44   /// AtomicExpandPass - At IR level this pass replace atomic instructions with
45   /// __atomic_* library calls, or target specific instruction which implement the
46   /// same semantics in a way which better fits the target backend.
47   FunctionPass *createAtomicExpandPass();
48 
49   /// createUnreachableBlockEliminationPass - The LLVM code generator does not
50   /// work well with unreachable basic blocks (what live ranges make sense for a
51   /// block that cannot be reached?).  As such, a code generator should either
52   /// not instruction select unreachable blocks, or run this pass as its
53   /// last LLVM modifying pass to clean up blocks that are not reachable from
54   /// the entry block.
55   FunctionPass *createUnreachableBlockEliminationPass();
56 
57   /// createGCEmptyBasicblocksPass - Empty basic blocks (basic blocks without
58   /// real code) appear as the result of optimization passes removing
59   /// instructions. These blocks confuscate profile analysis (e.g., basic block
60   /// sections) since they will share the address of their fallthrough blocks.
61   /// This pass garbage-collects such basic blocks.
62   MachineFunctionPass *createGCEmptyBasicBlocksPass();
63 
64   /// createBasicBlockSections Pass - This pass assigns sections to machine
65   /// basic blocks and is enabled with -fbasic-block-sections.
66   MachineFunctionPass *createBasicBlockSectionsPass();
67 
68   MachineFunctionPass *createBasicBlockPathCloningPass();
69 
70   /// createMachineFunctionSplitterPass - This pass splits machine functions
71   /// using profile information.
72   MachineFunctionPass *createMachineFunctionSplitterPass();
73 
74   /// MachineFunctionPrinter pass - This pass prints out the machine function to
75   /// the given stream as a debugging tool.
76   MachineFunctionPass *
77   createMachineFunctionPrinterPass(raw_ostream &OS,
78                                    const std::string &Banner ="");
79 
80   /// StackFramePrinter pass - This pass prints out the machine function's
81   /// stack frame to the given stream as a debugging tool.
82   MachineFunctionPass *createStackFrameLayoutAnalysisPass();
83 
84   /// MIRPrinting pass - this pass prints out the LLVM IR into the given stream
85   /// using the MIR serialization format.
86   MachineFunctionPass *createPrintMIRPass(raw_ostream &OS);
87 
88   /// This pass resets a MachineFunction when it has the FailedISel property
89   /// as if it was just created.
90   /// If EmitFallbackDiag is true, the pass will emit a
91   /// DiagnosticInfoISelFallback for every MachineFunction it resets.
92   /// If AbortOnFailedISel is true, abort compilation instead of resetting.
93   MachineFunctionPass *createResetMachineFunctionPass(bool EmitFallbackDiag,
94                                                       bool AbortOnFailedISel);
95 
96   /// createCodeGenPrepareLegacyPass - Transform the code to expose more pattern
97   /// matching during instruction selection.
98   FunctionPass *createCodeGenPrepareLegacyPass();
99 
100   /// This pass implements generation of target-specific intrinsics to support
101   /// handling of complex number arithmetic
102   FunctionPass *createComplexDeinterleavingPass(const TargetMachine *TM);
103 
104   /// AtomicExpandID -- Lowers atomic operations in terms of either cmpxchg
105   /// load-linked/store-conditional loops.
106   extern char &AtomicExpandID;
107 
108   /// MachineLoopInfo - This pass is a loop analysis pass.
109   extern char &MachineLoopInfoID;
110 
111   /// MachineDominators - This pass is a machine dominators analysis pass.
112   extern char &MachineDominatorsID;
113 
114   /// MachineDominanaceFrontier - This pass is a machine dominators analysis.
115   extern char &MachineDominanceFrontierID;
116 
117   /// MachineRegionInfo - This pass computes SESE regions for machine functions.
118   extern char &MachineRegionInfoPassID;
119 
120   /// EdgeBundles analysis - Bundle machine CFG edges.
121   extern char &EdgeBundlesID;
122 
123   /// LiveVariables pass - This pass computes the set of blocks in which each
124   /// variable is life and sets machine operand kill flags.
125   extern char &LiveVariablesID;
126 
127   /// PHIElimination - This pass eliminates machine instruction PHI nodes
128   /// by inserting copy instructions.  This destroys SSA information, but is the
129   /// desired input for some register allocators.  This pass is "required" by
130   /// these register allocator like this: AU.addRequiredID(PHIEliminationID);
131   extern char &PHIEliminationID;
132 
133   /// LiveIntervals - This analysis keeps track of the live ranges of virtual
134   /// and physical registers.
135   extern char &LiveIntervalsID;
136 
137   /// LiveStacks pass. An analysis keeping track of the liveness of stack slots.
138   extern char &LiveStacksID;
139 
140   /// TwoAddressInstruction - This pass reduces two-address instructions to
141   /// use two operands. This destroys SSA information but it is desired by
142   /// register allocators.
143   extern char &TwoAddressInstructionPassID;
144 
145   /// ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
146   extern char &ProcessImplicitDefsID;
147 
148   /// RegisterCoalescer - This pass merges live ranges to eliminate copies.
149   extern char &RegisterCoalescerID;
150 
151   /// MachineScheduler - This pass schedules machine instructions.
152   extern char &MachineSchedulerID;
153 
154   /// PostMachineScheduler - This pass schedules machine instructions postRA.
155   extern char &PostMachineSchedulerID;
156 
157   /// SpillPlacement analysis. Suggest optimal placement of spill code between
158   /// basic blocks.
159   extern char &SpillPlacementID;
160 
161   /// ShrinkWrap pass. Look for the best place to insert save and restore
162   // instruction and update the MachineFunctionInfo with that information.
163   extern char &ShrinkWrapID;
164 
165   /// LiveRangeShrink pass. Move instruction close to its definition to shrink
166   /// the definition's live range.
167   extern char &LiveRangeShrinkID;
168 
169   /// Greedy register allocator.
170   extern char &RAGreedyID;
171 
172   /// Basic register allocator.
173   extern char &RABasicID;
174 
175   /// VirtRegRewriter pass. Rewrite virtual registers to physical registers as
176   /// assigned in VirtRegMap.
177   extern char &VirtRegRewriterID;
178   FunctionPass *createVirtRegRewriter(bool ClearVirtRegs = true);
179 
180   /// UnreachableMachineBlockElimination - This pass removes unreachable
181   /// machine basic blocks.
182   extern char &UnreachableMachineBlockElimID;
183 
184   /// DeadMachineInstructionElim - This pass removes dead machine instructions.
185   extern char &DeadMachineInstructionElimID;
186 
187   /// This pass adds dead/undef flags after analyzing subregister lanes.
188   extern char &DetectDeadLanesID;
189 
190   /// This pass perform post-ra machine sink for COPY instructions.
191   extern char &PostRAMachineSinkingID;
192 
193   /// This pass adds flow sensitive discriminators.
194   extern char &MIRAddFSDiscriminatorsID;
195 
196   /// This pass reads flow sensitive profile.
197   extern char &MIRProfileLoaderPassID;
198 
199   /// FastRegisterAllocation Pass - This pass register allocates as fast as
200   /// possible. It is best suited for debug code where live ranges are short.
201   ///
202   FunctionPass *createFastRegisterAllocator();
203   FunctionPass *createFastRegisterAllocator(RegClassFilterFunc F,
204                                             bool ClearVirtRegs);
205 
206   /// BasicRegisterAllocation Pass - This pass implements a degenerate global
207   /// register allocator using the basic regalloc framework.
208   ///
209   FunctionPass *createBasicRegisterAllocator();
210   FunctionPass *createBasicRegisterAllocator(RegClassFilterFunc F);
211 
212   /// Greedy register allocation pass - This pass implements a global register
213   /// allocator for optimized builds.
214   ///
215   FunctionPass *createGreedyRegisterAllocator();
216   FunctionPass *createGreedyRegisterAllocator(RegClassFilterFunc F);
217 
218   /// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean
219   /// Quadratic Prograaming (PBQP) based register allocator.
220   ///
221   FunctionPass *createDefaultPBQPRegisterAllocator();
222 
223   /// PrologEpilogCodeInserter - This pass inserts prolog and epilog code,
224   /// and eliminates abstract frame references.
225   extern char &PrologEpilogCodeInserterID;
226   MachineFunctionPass *createPrologEpilogInserterPass();
227 
228   /// ExpandPostRAPseudos - This pass expands pseudo instructions after
229   /// register allocation.
230   extern char &ExpandPostRAPseudosID;
231 
232   /// PostRAHazardRecognizer - This pass runs the post-ra hazard
233   /// recognizer.
234   extern char &PostRAHazardRecognizerID;
235 
236   /// PostRAScheduler - This pass performs post register allocation
237   /// scheduling.
238   extern char &PostRASchedulerID;
239 
240   /// BranchFolding - This pass performs machine code CFG based
241   /// optimizations to delete branches to branches, eliminate branches to
242   /// successor blocks (creating fall throughs), and eliminating branches over
243   /// branches.
244   extern char &BranchFolderPassID;
245 
246   /// BranchRelaxation - This pass replaces branches that need to jump further
247   /// than is supported by a branch instruction.
248   extern char &BranchRelaxationPassID;
249 
250   /// MachineFunctionPrinterPass - This pass prints out MachineInstr's.
251   extern char &MachineFunctionPrinterPassID;
252 
253   /// MIRPrintingPass - this pass prints out the LLVM IR using the MIR
254   /// serialization format.
255   extern char &MIRPrintingPassID;
256 
257   /// TailDuplicate - Duplicate blocks with unconditional branches
258   /// into tails of their predecessors.
259   extern char &TailDuplicateID;
260 
261   /// Duplicate blocks with unconditional branches into tails of their
262   /// predecessors. Variant that works before register allocation.
263   extern char &EarlyTailDuplicateID;
264 
265   /// MachineTraceMetrics - This pass computes critical path and CPU resource
266   /// usage in an ensemble of traces.
267   extern char &MachineTraceMetricsID;
268 
269   /// EarlyIfConverter - This pass performs if-conversion on SSA form by
270   /// inserting cmov instructions.
271   extern char &EarlyIfConverterID;
272 
273   /// EarlyIfPredicator - This pass performs if-conversion on SSA form by
274   /// predicating if/else block and insert select at the join point.
275   extern char &EarlyIfPredicatorID;
276 
277   /// This pass performs instruction combining using trace metrics to estimate
278   /// critical-path and resource depth.
279   extern char &MachineCombinerID;
280 
281   /// StackSlotColoring - This pass performs stack coloring and merging.
282   /// It merges disjoint allocas to reduce the stack size.
283   extern char &StackColoringID;
284 
285   /// StackFramePrinter - This pass prints the stack frame layout and variable
286   /// mappings.
287   extern char &StackFrameLayoutAnalysisPassID;
288 
289   /// IfConverter - This pass performs machine code if conversion.
290   extern char &IfConverterID;
291 
292   FunctionPass *createIfConverter(
293       std::function<bool(const MachineFunction &)> Ftor);
294 
295   /// MachineBlockPlacement - This pass places basic blocks based on branch
296   /// probabilities.
297   extern char &MachineBlockPlacementID;
298 
299   /// MachineBlockPlacementStats - This pass collects statistics about the
300   /// basic block placement using branch probabilities and block frequency
301   /// information.
302   extern char &MachineBlockPlacementStatsID;
303 
304   /// GCLowering Pass - Used by gc.root to perform its default lowering
305   /// operations.
306   FunctionPass *createGCLoweringPass();
307 
308   /// GCLowering Pass - Used by gc.root to perform its default lowering
309   /// operations.
310   extern char &GCLoweringID;
311 
312   /// ShadowStackGCLowering - Implements the custom lowering mechanism
313   /// used by the shadow stack GC.  Only runs on functions which opt in to
314   /// the shadow stack collector.
315   FunctionPass *createShadowStackGCLoweringPass();
316 
317   /// ShadowStackGCLowering - Implements the custom lowering mechanism
318   /// used by the shadow stack GC.
319   extern char &ShadowStackGCLoweringID;
320 
321   /// GCMachineCodeAnalysis - Target-independent pass to mark safe points
322   /// in machine code. Must be added very late during code generation, just
323   /// prior to output, and importantly after all CFG transformations (such as
324   /// branch folding).
325   extern char &GCMachineCodeAnalysisID;
326 
327   /// MachineCSE - This pass performs global CSE on machine instructions.
328   extern char &MachineCSEID;
329 
330   /// MIRCanonicalizer - This pass canonicalizes MIR by renaming vregs
331   /// according to the semantics of the instruction as well as hoists
332   /// code.
333   extern char &MIRCanonicalizerID;
334 
335   /// ImplicitNullChecks - This pass folds null pointer checks into nearby
336   /// memory operations.
337   extern char &ImplicitNullChecksID;
338 
339   /// This pass performs loop invariant code motion on machine instructions.
340   extern char &MachineLICMID;
341 
342   /// This pass performs loop invariant code motion on machine instructions.
343   /// This variant works before register allocation. \see MachineLICMID.
344   extern char &EarlyMachineLICMID;
345 
346   /// MachineSinking - This pass performs sinking on machine instructions.
347   extern char &MachineSinkingID;
348 
349   /// MachineCopyPropagation - This pass performs copy propagation on
350   /// machine instructions.
351   extern char &MachineCopyPropagationID;
352 
353   MachineFunctionPass *createMachineCopyPropagationPass(bool UseCopyInstr);
354 
355   /// MachineLateInstrsCleanup - This pass removes redundant identical
356   /// instructions after register allocation and rematerialization.
357   extern char &MachineLateInstrsCleanupID;
358 
359   /// PeepholeOptimizer - This pass performs peephole optimizations -
360   /// like extension and comparison eliminations.
361   extern char &PeepholeOptimizerID;
362 
363   /// OptimizePHIs - This pass optimizes machine instruction PHIs
364   /// to take advantage of opportunities created during DAG legalization.
365   extern char &OptimizePHIsID;
366 
367   /// StackSlotColoring - This pass performs stack slot coloring.
368   extern char &StackSlotColoringID;
369 
370   /// This pass lays out funclets contiguously.
371   extern char &FuncletLayoutID;
372 
373   /// This pass inserts the XRay instrumentation sleds if they are supported by
374   /// the target platform.
375   extern char &XRayInstrumentationID;
376 
377   /// This pass inserts FEntry calls
378   extern char &FEntryInserterID;
379 
380   /// This pass implements the "patchable-function" attribute.
381   extern char &PatchableFunctionID;
382 
383   /// createStackProtectorPass - This pass adds stack protectors to functions.
384   ///
385   FunctionPass *createStackProtectorPass();
386 
387   /// createMachineVerifierPass - This pass verifies cenerated machine code
388   /// instructions for correctness.
389   ///
390   FunctionPass *createMachineVerifierPass(const std::string& Banner);
391 
392   /// createDwarfEHPass - This pass mulches exception handling code into a form
393   /// adapted to code generation.  Required if using dwarf exception handling.
394   FunctionPass *createDwarfEHPass(CodeGenOptLevel OptLevel);
395 
396   /// createWinEHPass - Prepares personality functions used by MSVC on Windows,
397   /// in addition to the Itanium LSDA based personalities.
398   FunctionPass *createWinEHPass(bool DemoteCatchSwitchPHIOnly = false);
399 
400   /// createSjLjEHPreparePass - This pass adapts exception handling code to use
401   /// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow.
402   ///
403   FunctionPass *createSjLjEHPreparePass(const TargetMachine *TM);
404 
405   /// createWasmEHPass - This pass adapts exception handling code to use
406   /// WebAssembly's exception handling scheme.
407   FunctionPass *createWasmEHPass();
408 
409   /// LocalStackSlotAllocation - This pass assigns local frame indices to stack
410   /// slots relative to one another and allocates base registers to access them
411   /// when it is estimated by the target to be out of range of normal frame
412   /// pointer or stack pointer index addressing.
413   extern char &LocalStackSlotAllocationID;
414 
415   /// This pass expands pseudo-instructions, reserves registers and adjusts
416   /// machine frame information.
417   extern char &FinalizeISelID;
418 
419   /// UnpackMachineBundles - This pass unpack machine instruction bundles.
420   extern char &UnpackMachineBundlesID;
421 
422   FunctionPass *
423   createUnpackMachineBundles(std::function<bool(const MachineFunction &)> Ftor);
424 
425   /// FinalizeMachineBundles - This pass finalize machine instruction
426   /// bundles (created earlier, e.g. during pre-RA scheduling).
427   extern char &FinalizeMachineBundlesID;
428 
429   /// StackMapLiveness - This pass analyses the register live-out set of
430   /// stackmap/patchpoint intrinsics and attaches the calculated information to
431   /// the intrinsic for later emission to the StackMap.
432   extern char &StackMapLivenessID;
433 
434   // MachineSanitizerBinaryMetadata - appends/finalizes sanitizer binary
435   // metadata after llvm SanitizerBinaryMetadata pass.
436   extern char &MachineSanitizerBinaryMetadataID;
437 
438   /// RemoveRedundantDebugValues pass.
439   extern char &RemoveRedundantDebugValuesID;
440 
441   /// MachineCFGPrinter pass.
442   extern char &MachineCFGPrinterID;
443 
444   /// LiveDebugValues pass
445   extern char &LiveDebugValuesID;
446 
447   /// InterleavedAccess Pass - This pass identifies and matches interleaved
448   /// memory accesses to target specific intrinsics.
449   ///
450   FunctionPass *createInterleavedAccessPass();
451 
452   /// InterleavedLoadCombines Pass - This pass identifies interleaved loads and
453   /// combines them into wide loads detectable by InterleavedAccessPass
454   ///
455   FunctionPass *createInterleavedLoadCombinePass();
456 
457   /// LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all
458   /// TLS variables for the emulated TLS model.
459   ///
460   ModulePass *createLowerEmuTLSPass();
461 
462   /// This pass lowers the \@llvm.load.relative and \@llvm.objc.* intrinsics to
463   /// instructions.  This is unsafe to do earlier because a pass may combine the
464   /// constant initializer into the load, which may result in an overflowing
465   /// evaluation.
466   ModulePass *createPreISelIntrinsicLoweringPass();
467 
468   /// GlobalMerge - This pass merges internal (by default) globals into structs
469   /// to enable reuse of a base pointer by indexed addressing modes.
470   /// It can also be configured to focus on size optimizations only.
471   ///
472   Pass *createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset,
473                               bool OnlyOptimizeForSize = false,
474                               bool MergeExternalByDefault = false);
475 
476   /// This pass splits the stack into a safe stack and an unsafe stack to
477   /// protect against stack-based overflow vulnerabilities.
478   FunctionPass *createSafeStackPass();
479 
480   /// This pass detects subregister lanes in a virtual register that are used
481   /// independently of other lanes and splits them into separate virtual
482   /// registers.
483   extern char &RenameIndependentSubregsID;
484 
485   /// This pass is executed POST-RA to collect which physical registers are
486   /// preserved by given machine function.
487   FunctionPass *createRegUsageInfoCollector();
488 
489   /// Return a MachineFunction pass that identifies call sites
490   /// and propagates register usage information of callee to caller
491   /// if available with PysicalRegisterUsageInfo pass.
492   FunctionPass *createRegUsageInfoPropPass();
493 
494   /// This pass performs software pipelining on machine instructions.
495   extern char &MachinePipelinerID;
496 
497   /// This pass frees the memory occupied by the MachineFunction.
498   FunctionPass *createFreeMachineFunctionPass();
499 
500   /// This pass performs outlining on machine instructions directly before
501   /// printing assembly.
502   ModulePass *createMachineOutlinerPass(bool RunOnAllFunctions = true);
503 
504   /// This pass expands the reduction intrinsics into sequences of shuffles.
505   FunctionPass *createExpandReductionsPass();
506 
507   // This pass replaces intrinsics operating on vector operands with calls to
508   // the corresponding function in a vector library (e.g., SVML, libmvec).
509   FunctionPass *createReplaceWithVeclibLegacyPass();
510 
511   /// This pass expands the vector predication intrinsics into unpredicated
512   /// instructions with selects or just the explicit vector length into the
513   /// predicate mask.
514   FunctionPass *createExpandVectorPredicationPass();
515 
516   // Expands large div/rem instructions.
517   FunctionPass *createExpandLargeDivRemPass();
518 
519   // Expands large div/rem instructions.
520   FunctionPass *createExpandLargeFpConvertPass();
521 
522   // This pass expands memcmp() to load/stores.
523   FunctionPass *createExpandMemCmpLegacyPass();
524 
525   /// Creates Break False Dependencies pass. \see BreakFalseDeps.cpp
526   FunctionPass *createBreakFalseDeps();
527 
528   // This pass expands indirectbr instructions.
529   FunctionPass *createIndirectBrExpandPass();
530 
531   /// Creates CFI Fixup pass. \see CFIFixup.cpp
532   FunctionPass *createCFIFixup();
533 
534   /// Creates CFI Instruction Inserter pass. \see CFIInstrInserter.cpp
535   FunctionPass *createCFIInstrInserter();
536 
537   /// Creates CFGuard longjmp target identification pass.
538   /// \see CFGuardLongjmp.cpp
539   FunctionPass *createCFGuardLongjmpPass();
540 
541   /// Creates EHContGuard catchret target identification pass.
542   /// \see EHContGuardCatchret.cpp
543   FunctionPass *createEHContGuardCatchretPass();
544 
545   /// Create Hardware Loop pass. \see HardwareLoops.cpp
546   FunctionPass *createHardwareLoopsLegacyPass();
547 
548   /// This pass inserts pseudo probe annotation for callsite profiling.
549   FunctionPass *createPseudoProbeInserter();
550 
551   /// Create IR Type Promotion pass. \see TypePromotion.cpp
552   FunctionPass *createTypePromotionLegacyPass();
553 
554   /// Add Flow Sensitive Discriminators. PassNum specifies the
555   /// sequence number of this pass (starting from 1).
556   FunctionPass *
557   createMIRAddFSDiscriminatorsPass(sampleprof::FSDiscriminatorPass P);
558 
559   /// Read Flow Sensitive Profile.
560   FunctionPass *
561   createMIRProfileLoaderPass(std::string File, std::string RemappingFile,
562                              sampleprof::FSDiscriminatorPass P,
563                              IntrusiveRefCntPtr<vfs::FileSystem> FS);
564 
565   /// Creates MIR Debugify pass. \see MachineDebugify.cpp
566   ModulePass *createDebugifyMachineModulePass();
567 
568   /// Creates MIR Strip Debug pass. \see MachineStripDebug.cpp
569   /// If OnlyDebugified is true then it will only strip debug info if it was
570   /// added by a Debugify pass. The module will be left unchanged if the debug
571   /// info was generated by another source such as clang.
572   ModulePass *createStripDebugMachineModulePass(bool OnlyDebugified);
573 
574   /// Creates MIR Check Debug pass. \see MachineCheckDebugify.cpp
575   ModulePass *createCheckDebugMachineModulePass();
576 
577   /// The pass fixups statepoint machine instruction to replace usage of
578   /// caller saved registers with stack slots.
579   extern char &FixupStatepointCallerSavedID;
580 
581   /// The pass transforms load/store <256 x i32> to AMX load/store intrinsics
582   /// or split the data to two <128 x i32>.
583   FunctionPass *createX86LowerAMXTypePass();
584 
585   /// The pass transforms amx intrinsics to scalar operation if the function has
586   /// optnone attribute or it is O0.
587   FunctionPass *createX86LowerAMXIntrinsicsPass();
588 
589   /// When learning an eviction policy, extract score(reward) information,
590   /// otherwise this does nothing
591   FunctionPass *createRegAllocScoringPass();
592 
593   /// JMC instrument pass.
594   ModulePass *createJMCInstrumenterPass();
595 
596   /// This pass converts conditional moves to conditional jumps when profitable.
597   FunctionPass *createSelectOptimizePass();
598 
599   FunctionPass *createCallBrPass();
600 
601   /// Lowers KCFI operand bundles for indirect calls.
602   FunctionPass *createKCFIPass();
603 } // End llvm namespace
604 
605 #endif
606