1 //===-- Passes.h - Target independent code generation passes ----*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file defines interfaces to access the target independent code generation 10 // passes provided by the LLVM backend. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_CODEGEN_PASSES_H 15 #define LLVM_CODEGEN_PASSES_H 16 17 #include "llvm/Support/CodeGen.h" 18 #include <functional> 19 #include <string> 20 21 namespace llvm { 22 23 class FunctionPass; 24 class MachineFunction; 25 class MachineFunctionPass; 26 class MemoryBuffer; 27 class ModulePass; 28 class Pass; 29 class TargetMachine; 30 class TargetRegisterClass; 31 class raw_ostream; 32 33 } // End llvm namespace 34 35 /// List of target independent CodeGen pass IDs. 36 namespace llvm { 37 FunctionPass *createAtomicExpandPass(); 38 39 /// createUnreachableBlockEliminationPass - The LLVM code generator does not 40 /// work well with unreachable basic blocks (what live ranges make sense for a 41 /// block that cannot be reached?). As such, a code generator should either 42 /// not instruction select unreachable blocks, or run this pass as its 43 /// last LLVM modifying pass to clean up blocks that are not reachable from 44 /// the entry block. 45 FunctionPass *createUnreachableBlockEliminationPass(); 46 47 /// createBasicBlockSections Pass - This pass assigns sections to machine 48 /// basic blocks and is enabled with -fbasic-block-sections. Buf is a memory 49 /// buffer that contains the list of functions and basic block ids to 50 /// selectively enable basic block sections. 51 MachineFunctionPass *createBasicBlockSectionsPass(const MemoryBuffer *Buf); 52 53 /// createMachineFunctionSplitterPass - This pass splits machine functions 54 /// using profile information. 55 MachineFunctionPass *createMachineFunctionSplitterPass(); 56 57 /// MachineFunctionPrinter pass - This pass prints out the machine function to 58 /// the given stream as a debugging tool. 59 MachineFunctionPass * 60 createMachineFunctionPrinterPass(raw_ostream &OS, 61 const std::string &Banner =""); 62 63 /// MIRPrinting pass - this pass prints out the LLVM IR into the given stream 64 /// using the MIR serialization format. 65 MachineFunctionPass *createPrintMIRPass(raw_ostream &OS); 66 67 /// This pass resets a MachineFunction when it has the FailedISel property 68 /// as if it was just created. 69 /// If EmitFallbackDiag is true, the pass will emit a 70 /// DiagnosticInfoISelFallback for every MachineFunction it resets. 71 /// If AbortOnFailedISel is true, abort compilation instead of resetting. 72 MachineFunctionPass *createResetMachineFunctionPass(bool EmitFallbackDiag, 73 bool AbortOnFailedISel); 74 75 /// createCodeGenPreparePass - Transform the code to expose more pattern 76 /// matching during instruction selection. 77 FunctionPass *createCodeGenPreparePass(); 78 79 /// AtomicExpandID -- Lowers atomic operations in terms of either cmpxchg 80 /// load-linked/store-conditional loops. 81 extern char &AtomicExpandID; 82 83 /// MachineLoopInfo - This pass is a loop analysis pass. 84 extern char &MachineLoopInfoID; 85 86 /// MachineDominators - This pass is a machine dominators analysis pass. 87 extern char &MachineDominatorsID; 88 89 /// MachineDominanaceFrontier - This pass is a machine dominators analysis pass. 90 extern char &MachineDominanceFrontierID; 91 92 /// MachineRegionInfo - This pass computes SESE regions for machine functions. 93 extern char &MachineRegionInfoPassID; 94 95 /// EdgeBundles analysis - Bundle machine CFG edges. 96 extern char &EdgeBundlesID; 97 98 /// LiveVariables pass - This pass computes the set of blocks in which each 99 /// variable is life and sets machine operand kill flags. 100 extern char &LiveVariablesID; 101 102 /// PHIElimination - This pass eliminates machine instruction PHI nodes 103 /// by inserting copy instructions. This destroys SSA information, but is the 104 /// desired input for some register allocators. This pass is "required" by 105 /// these register allocator like this: AU.addRequiredID(PHIEliminationID); 106 extern char &PHIEliminationID; 107 108 /// LiveIntervals - This analysis keeps track of the live ranges of virtual 109 /// and physical registers. 110 extern char &LiveIntervalsID; 111 112 /// LiveStacks pass. An analysis keeping track of the liveness of stack slots. 113 extern char &LiveStacksID; 114 115 /// TwoAddressInstruction - This pass reduces two-address instructions to 116 /// use two operands. This destroys SSA information but it is desired by 117 /// register allocators. 118 extern char &TwoAddressInstructionPassID; 119 120 /// ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs. 121 extern char &ProcessImplicitDefsID; 122 123 /// RegisterCoalescer - This pass merges live ranges to eliminate copies. 124 extern char &RegisterCoalescerID; 125 126 /// MachineScheduler - This pass schedules machine instructions. 127 extern char &MachineSchedulerID; 128 129 /// PostMachineScheduler - This pass schedules machine instructions postRA. 130 extern char &PostMachineSchedulerID; 131 132 /// SpillPlacement analysis. Suggest optimal placement of spill code between 133 /// basic blocks. 134 extern char &SpillPlacementID; 135 136 /// ShrinkWrap pass. Look for the best place to insert save and restore 137 // instruction and update the MachineFunctionInfo with that information. 138 extern char &ShrinkWrapID; 139 140 /// LiveRangeShrink pass. Move instruction close to its definition to shrink 141 /// the definition's live range. 142 extern char &LiveRangeShrinkID; 143 144 /// Greedy register allocator. 145 extern char &RAGreedyID; 146 147 /// Basic register allocator. 148 extern char &RABasicID; 149 150 /// VirtRegRewriter pass. Rewrite virtual registers to physical registers as 151 /// assigned in VirtRegMap. 152 extern char &VirtRegRewriterID; 153 154 /// UnreachableMachineBlockElimination - This pass removes unreachable 155 /// machine basic blocks. 156 extern char &UnreachableMachineBlockElimID; 157 158 /// DeadMachineInstructionElim - This pass removes dead machine instructions. 159 extern char &DeadMachineInstructionElimID; 160 161 /// This pass adds dead/undef flags after analyzing subregister lanes. 162 extern char &DetectDeadLanesID; 163 164 /// This pass perform post-ra machine sink for COPY instructions. 165 extern char &PostRAMachineSinkingID; 166 167 /// FastRegisterAllocation Pass - This pass register allocates as fast as 168 /// possible. It is best suited for debug code where live ranges are short. 169 /// 170 FunctionPass *createFastRegisterAllocator(); 171 172 /// BasicRegisterAllocation Pass - This pass implements a degenerate global 173 /// register allocator using the basic regalloc framework. 174 /// 175 FunctionPass *createBasicRegisterAllocator(); 176 177 /// Greedy register allocation pass - This pass implements a global register 178 /// allocator for optimized builds. 179 /// 180 FunctionPass *createGreedyRegisterAllocator(); 181 182 /// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean 183 /// Quadratic Prograaming (PBQP) based register allocator. 184 /// 185 FunctionPass *createDefaultPBQPRegisterAllocator(); 186 187 /// PrologEpilogCodeInserter - This pass inserts prolog and epilog code, 188 /// and eliminates abstract frame references. 189 extern char &PrologEpilogCodeInserterID; 190 MachineFunctionPass *createPrologEpilogInserterPass(); 191 192 /// ExpandPostRAPseudos - This pass expands pseudo instructions after 193 /// register allocation. 194 extern char &ExpandPostRAPseudosID; 195 196 /// PostRAHazardRecognizer - This pass runs the post-ra hazard 197 /// recognizer. 198 extern char &PostRAHazardRecognizerID; 199 200 /// PostRAScheduler - This pass performs post register allocation 201 /// scheduling. 202 extern char &PostRASchedulerID; 203 204 /// BranchFolding - This pass performs machine code CFG based 205 /// optimizations to delete branches to branches, eliminate branches to 206 /// successor blocks (creating fall throughs), and eliminating branches over 207 /// branches. 208 extern char &BranchFolderPassID; 209 210 /// BranchRelaxation - This pass replaces branches that need to jump further 211 /// than is supported by a branch instruction. 212 extern char &BranchRelaxationPassID; 213 214 /// MachineFunctionPrinterPass - This pass prints out MachineInstr's. 215 extern char &MachineFunctionPrinterPassID; 216 217 /// MIRPrintingPass - this pass prints out the LLVM IR using the MIR 218 /// serialization format. 219 extern char &MIRPrintingPassID; 220 221 /// TailDuplicate - Duplicate blocks with unconditional branches 222 /// into tails of their predecessors. 223 extern char &TailDuplicateID; 224 225 /// Duplicate blocks with unconditional branches into tails of their 226 /// predecessors. Variant that works before register allocation. 227 extern char &EarlyTailDuplicateID; 228 229 /// MachineTraceMetrics - This pass computes critical path and CPU resource 230 /// usage in an ensemble of traces. 231 extern char &MachineTraceMetricsID; 232 233 /// EarlyIfConverter - This pass performs if-conversion on SSA form by 234 /// inserting cmov instructions. 235 extern char &EarlyIfConverterID; 236 237 /// EarlyIfPredicator - This pass performs if-conversion on SSA form by 238 /// predicating if/else block and insert select at the join point. 239 extern char &EarlyIfPredicatorID; 240 241 /// This pass performs instruction combining using trace metrics to estimate 242 /// critical-path and resource depth. 243 extern char &MachineCombinerID; 244 245 /// StackSlotColoring - This pass performs stack coloring and merging. 246 /// It merges disjoint allocas to reduce the stack size. 247 extern char &StackColoringID; 248 249 /// IfConverter - This pass performs machine code if conversion. 250 extern char &IfConverterID; 251 252 FunctionPass *createIfConverter( 253 std::function<bool(const MachineFunction &)> Ftor); 254 255 /// MachineBlockPlacement - This pass places basic blocks based on branch 256 /// probabilities. 257 extern char &MachineBlockPlacementID; 258 259 /// MachineBlockPlacementStats - This pass collects statistics about the 260 /// basic block placement using branch probabilities and block frequency 261 /// information. 262 extern char &MachineBlockPlacementStatsID; 263 264 /// GCLowering Pass - Used by gc.root to perform its default lowering 265 /// operations. 266 FunctionPass *createGCLoweringPass(); 267 268 /// ShadowStackGCLowering - Implements the custom lowering mechanism 269 /// used by the shadow stack GC. Only runs on functions which opt in to 270 /// the shadow stack collector. 271 FunctionPass *createShadowStackGCLoweringPass(); 272 273 /// GCMachineCodeAnalysis - Target-independent pass to mark safe points 274 /// in machine code. Must be added very late during code generation, just 275 /// prior to output, and importantly after all CFG transformations (such as 276 /// branch folding). 277 extern char &GCMachineCodeAnalysisID; 278 279 /// Creates a pass to print GC metadata. 280 /// 281 FunctionPass *createGCInfoPrinter(raw_ostream &OS); 282 283 /// MachineCSE - This pass performs global CSE on machine instructions. 284 extern char &MachineCSEID; 285 286 /// MIRCanonicalizer - This pass canonicalizes MIR by renaming vregs 287 /// according to the semantics of the instruction as well as hoists 288 /// code. 289 extern char &MIRCanonicalizerID; 290 291 /// ImplicitNullChecks - This pass folds null pointer checks into nearby 292 /// memory operations. 293 extern char &ImplicitNullChecksID; 294 295 /// This pass performs loop invariant code motion on machine instructions. 296 extern char &MachineLICMID; 297 298 /// This pass performs loop invariant code motion on machine instructions. 299 /// This variant works before register allocation. \see MachineLICMID. 300 extern char &EarlyMachineLICMID; 301 302 /// MachineSinking - This pass performs sinking on machine instructions. 303 extern char &MachineSinkingID; 304 305 /// MachineCopyPropagation - This pass performs copy propagation on 306 /// machine instructions. 307 extern char &MachineCopyPropagationID; 308 309 /// PeepholeOptimizer - This pass performs peephole optimizations - 310 /// like extension and comparison eliminations. 311 extern char &PeepholeOptimizerID; 312 313 /// OptimizePHIs - This pass optimizes machine instruction PHIs 314 /// to take advantage of opportunities created during DAG legalization. 315 extern char &OptimizePHIsID; 316 317 /// StackSlotColoring - This pass performs stack slot coloring. 318 extern char &StackSlotColoringID; 319 320 /// This pass lays out funclets contiguously. 321 extern char &FuncletLayoutID; 322 323 /// This pass inserts the XRay instrumentation sleds if they are supported by 324 /// the target platform. 325 extern char &XRayInstrumentationID; 326 327 /// This pass inserts FEntry calls 328 extern char &FEntryInserterID; 329 330 /// This pass implements the "patchable-function" attribute. 331 extern char &PatchableFunctionID; 332 333 /// createStackProtectorPass - This pass adds stack protectors to functions. 334 /// 335 FunctionPass *createStackProtectorPass(); 336 337 /// createMachineVerifierPass - This pass verifies cenerated machine code 338 /// instructions for correctness. 339 /// 340 FunctionPass *createMachineVerifierPass(const std::string& Banner); 341 342 /// createDwarfEHPass - This pass mulches exception handling code into a form 343 /// adapted to code generation. Required if using dwarf exception handling. 344 FunctionPass *createDwarfEHPass(CodeGenOpt::Level OptLevel); 345 346 /// createWinEHPass - Prepares personality functions used by MSVC on Windows, 347 /// in addition to the Itanium LSDA based personalities. 348 FunctionPass *createWinEHPass(bool DemoteCatchSwitchPHIOnly = false); 349 350 /// createSjLjEHPreparePass - This pass adapts exception handling code to use 351 /// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow. 352 /// 353 FunctionPass *createSjLjEHPreparePass(const TargetMachine *TM); 354 355 /// createWasmEHPass - This pass adapts exception handling code to use 356 /// WebAssembly's exception handling scheme. 357 FunctionPass *createWasmEHPass(); 358 359 /// LocalStackSlotAllocation - This pass assigns local frame indices to stack 360 /// slots relative to one another and allocates base registers to access them 361 /// when it is estimated by the target to be out of range of normal frame 362 /// pointer or stack pointer index addressing. 363 extern char &LocalStackSlotAllocationID; 364 365 /// This pass expands pseudo-instructions, reserves registers and adjusts 366 /// machine frame information. 367 extern char &FinalizeISelID; 368 369 /// UnpackMachineBundles - This pass unpack machine instruction bundles. 370 extern char &UnpackMachineBundlesID; 371 372 FunctionPass * 373 createUnpackMachineBundles(std::function<bool(const MachineFunction &)> Ftor); 374 375 /// FinalizeMachineBundles - This pass finalize machine instruction 376 /// bundles (created earlier, e.g. during pre-RA scheduling). 377 extern char &FinalizeMachineBundlesID; 378 379 /// StackMapLiveness - This pass analyses the register live-out set of 380 /// stackmap/patchpoint intrinsics and attaches the calculated information to 381 /// the intrinsic for later emission to the StackMap. 382 extern char &StackMapLivenessID; 383 384 /// LiveDebugValues pass 385 extern char &LiveDebugValuesID; 386 387 /// createJumpInstrTables - This pass creates jump-instruction tables. 388 ModulePass *createJumpInstrTablesPass(); 389 390 /// InterleavedAccess Pass - This pass identifies and matches interleaved 391 /// memory accesses to target specific intrinsics. 392 /// 393 FunctionPass *createInterleavedAccessPass(); 394 395 /// InterleavedLoadCombines Pass - This pass identifies interleaved loads and 396 /// combines them into wide loads detectable by InterleavedAccessPass 397 /// 398 FunctionPass *createInterleavedLoadCombinePass(); 399 400 /// LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all 401 /// TLS variables for the emulated TLS model. 402 /// 403 ModulePass *createLowerEmuTLSPass(); 404 405 /// This pass lowers the \@llvm.load.relative and \@llvm.objc.* intrinsics to 406 /// instructions. This is unsafe to do earlier because a pass may combine the 407 /// constant initializer into the load, which may result in an overflowing 408 /// evaluation. 409 ModulePass *createPreISelIntrinsicLoweringPass(); 410 411 /// GlobalMerge - This pass merges internal (by default) globals into structs 412 /// to enable reuse of a base pointer by indexed addressing modes. 413 /// It can also be configured to focus on size optimizations only. 414 /// 415 Pass *createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset, 416 bool OnlyOptimizeForSize = false, 417 bool MergeExternalByDefault = false); 418 419 /// This pass splits the stack into a safe stack and an unsafe stack to 420 /// protect against stack-based overflow vulnerabilities. 421 FunctionPass *createSafeStackPass(); 422 423 /// This pass detects subregister lanes in a virtual register that are used 424 /// independently of other lanes and splits them into separate virtual 425 /// registers. 426 extern char &RenameIndependentSubregsID; 427 428 /// This pass is executed POST-RA to collect which physical registers are 429 /// preserved by given machine function. 430 FunctionPass *createRegUsageInfoCollector(); 431 432 /// Return a MachineFunction pass that identifies call sites 433 /// and propagates register usage information of callee to caller 434 /// if available with PysicalRegisterUsageInfo pass. 435 FunctionPass *createRegUsageInfoPropPass(); 436 437 /// This pass performs software pipelining on machine instructions. 438 extern char &MachinePipelinerID; 439 440 /// This pass frees the memory occupied by the MachineFunction. 441 FunctionPass *createFreeMachineFunctionPass(); 442 443 /// This pass performs outlining on machine instructions directly before 444 /// printing assembly. 445 ModulePass *createMachineOutlinerPass(bool RunOnAllFunctions = true); 446 447 /// This pass expands the experimental reduction intrinsics into sequences of 448 /// shuffles. 449 FunctionPass *createExpandReductionsPass(); 450 451 // This pass expands memcmp() to load/stores. 452 FunctionPass *createExpandMemCmpPass(); 453 454 /// Creates Break False Dependencies pass. \see BreakFalseDeps.cpp 455 FunctionPass *createBreakFalseDeps(); 456 457 // This pass expands indirectbr instructions. 458 FunctionPass *createIndirectBrExpandPass(); 459 460 /// Creates CFI Instruction Inserter pass. \see CFIInstrInserter.cpp 461 FunctionPass *createCFIInstrInserter(); 462 463 /// Creates CFGuard longjmp target identification pass. 464 /// \see CFGuardLongjmp.cpp 465 FunctionPass *createCFGuardLongjmpPass(); 466 467 /// Create Hardware Loop pass. \see HardwareLoops.cpp 468 FunctionPass *createHardwareLoopsPass(); 469 470 /// This pass inserts pseudo probe annotation for callsite profiling. 471 FunctionPass *createPseudoProbeInserter(); 472 473 /// Create IR Type Promotion pass. \see TypePromotion.cpp 474 FunctionPass *createTypePromotionPass(); 475 476 /// Creates MIR Debugify pass. \see MachineDebugify.cpp 477 ModulePass *createDebugifyMachineModulePass(); 478 479 /// Creates MIR Strip Debug pass. \see MachineStripDebug.cpp 480 /// If OnlyDebugified is true then it will only strip debug info if it was 481 /// added by a Debugify pass. The module will be left unchanged if the debug 482 /// info was generated by another source such as clang. 483 ModulePass *createStripDebugMachineModulePass(bool OnlyDebugified); 484 485 /// Creates MIR Check Debug pass. \see MachineCheckDebugify.cpp 486 ModulePass *createCheckDebugMachineModulePass(); 487 488 /// The pass fixups statepoint machine instruction to replace usage of 489 /// caller saved registers with stack slots. 490 extern char &FixupStatepointCallerSavedID; 491 492 /// The pass transform load/store <256 x i32> to AMX load/store intrinsics 493 /// or split the data to two <128 x i32>. 494 FunctionPass *createX86LowerAMXTypePass(); 495 } // End llvm namespace 496 497 #endif 498