1 //===-- Passes.h - Target independent code generation passes ----*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines interfaces to access the target independent code generation
10 // passes provided by the LLVM backend.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_CODEGEN_PASSES_H
15 #define LLVM_CODEGEN_PASSES_H
16 
17 #include <functional>
18 #include <string>
19 
20 namespace llvm {
21 
22 class FunctionPass;
23 class MachineFunction;
24 class MachineFunctionPass;
25 class ModulePass;
26 class Pass;
27 class TargetMachine;
28 class TargetRegisterClass;
29 class raw_ostream;
30 
31 } // End llvm namespace
32 
33 /// List of target independent CodeGen pass IDs.
34 namespace llvm {
35   FunctionPass *createAtomicExpandPass();
36 
37   /// createUnreachableBlockEliminationPass - The LLVM code generator does not
38   /// work well with unreachable basic blocks (what live ranges make sense for a
39   /// block that cannot be reached?).  As such, a code generator should either
40   /// not instruction select unreachable blocks, or run this pass as its
41   /// last LLVM modifying pass to clean up blocks that are not reachable from
42   /// the entry block.
43   FunctionPass *createUnreachableBlockEliminationPass();
44 
45   /// MachineFunctionPrinter pass - This pass prints out the machine function to
46   /// the given stream as a debugging tool.
47   MachineFunctionPass *
48   createMachineFunctionPrinterPass(raw_ostream &OS,
49                                    const std::string &Banner ="");
50 
51   /// MIRPrinting pass - this pass prints out the LLVM IR into the given stream
52   /// using the MIR serialization format.
53   MachineFunctionPass *createPrintMIRPass(raw_ostream &OS);
54 
55   /// This pass resets a MachineFunction when it has the FailedISel property
56   /// as if it was just created.
57   /// If EmitFallbackDiag is true, the pass will emit a
58   /// DiagnosticInfoISelFallback for every MachineFunction it resets.
59   /// If AbortOnFailedISel is true, abort compilation instead of resetting.
60   MachineFunctionPass *createResetMachineFunctionPass(bool EmitFallbackDiag,
61                                                       bool AbortOnFailedISel);
62 
63   /// createCodeGenPreparePass - Transform the code to expose more pattern
64   /// matching during instruction selection.
65   FunctionPass *createCodeGenPreparePass();
66 
67   /// createScalarizeMaskedMemIntrinPass - Replace masked load, store, gather
68   /// and scatter intrinsics with scalar code when target doesn't support them.
69   FunctionPass *createScalarizeMaskedMemIntrinPass();
70 
71   /// AtomicExpandID -- Lowers atomic operations in terms of either cmpxchg
72   /// load-linked/store-conditional loops.
73   extern char &AtomicExpandID;
74 
75   /// MachineLoopInfo - This pass is a loop analysis pass.
76   extern char &MachineLoopInfoID;
77 
78   /// MachineDominators - This pass is a machine dominators analysis pass.
79   extern char &MachineDominatorsID;
80 
81 /// MachineDominanaceFrontier - This pass is a machine dominators analysis pass.
82   extern char &MachineDominanceFrontierID;
83 
84   /// MachineRegionInfo - This pass computes SESE regions for machine functions.
85   extern char &MachineRegionInfoPassID;
86 
87   /// EdgeBundles analysis - Bundle machine CFG edges.
88   extern char &EdgeBundlesID;
89 
90   /// LiveVariables pass - This pass computes the set of blocks in which each
91   /// variable is life and sets machine operand kill flags.
92   extern char &LiveVariablesID;
93 
94   /// PHIElimination - This pass eliminates machine instruction PHI nodes
95   /// by inserting copy instructions.  This destroys SSA information, but is the
96   /// desired input for some register allocators.  This pass is "required" by
97   /// these register allocator like this: AU.addRequiredID(PHIEliminationID);
98   extern char &PHIEliminationID;
99 
100   /// LiveIntervals - This analysis keeps track of the live ranges of virtual
101   /// and physical registers.
102   extern char &LiveIntervalsID;
103 
104   /// LiveStacks pass. An analysis keeping track of the liveness of stack slots.
105   extern char &LiveStacksID;
106 
107   /// TwoAddressInstruction - This pass reduces two-address instructions to
108   /// use two operands. This destroys SSA information but it is desired by
109   /// register allocators.
110   extern char &TwoAddressInstructionPassID;
111 
112   /// ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
113   extern char &ProcessImplicitDefsID;
114 
115   /// RegisterCoalescer - This pass merges live ranges to eliminate copies.
116   extern char &RegisterCoalescerID;
117 
118   /// MachineScheduler - This pass schedules machine instructions.
119   extern char &MachineSchedulerID;
120 
121   /// PostMachineScheduler - This pass schedules machine instructions postRA.
122   extern char &PostMachineSchedulerID;
123 
124   /// SpillPlacement analysis. Suggest optimal placement of spill code between
125   /// basic blocks.
126   extern char &SpillPlacementID;
127 
128   /// ShrinkWrap pass. Look for the best place to insert save and restore
129   // instruction and update the MachineFunctionInfo with that information.
130   extern char &ShrinkWrapID;
131 
132   /// LiveRangeShrink pass. Move instruction close to its definition to shrink
133   /// the definition's live range.
134   extern char &LiveRangeShrinkID;
135 
136   /// Greedy register allocator.
137   extern char &RAGreedyID;
138 
139   /// Basic register allocator.
140   extern char &RABasicID;
141 
142   /// VirtRegRewriter pass. Rewrite virtual registers to physical registers as
143   /// assigned in VirtRegMap.
144   extern char &VirtRegRewriterID;
145 
146   /// UnreachableMachineBlockElimination - This pass removes unreachable
147   /// machine basic blocks.
148   extern char &UnreachableMachineBlockElimID;
149 
150   /// DeadMachineInstructionElim - This pass removes dead machine instructions.
151   extern char &DeadMachineInstructionElimID;
152 
153   /// This pass adds dead/undef flags after analyzing subregister lanes.
154   extern char &DetectDeadLanesID;
155 
156   /// This pass perform post-ra machine sink for COPY instructions.
157   extern char &PostRAMachineSinkingID;
158 
159   /// FastRegisterAllocation Pass - This pass register allocates as fast as
160   /// possible. It is best suited for debug code where live ranges are short.
161   ///
162   FunctionPass *createFastRegisterAllocator();
163 
164   /// BasicRegisterAllocation Pass - This pass implements a degenerate global
165   /// register allocator using the basic regalloc framework.
166   ///
167   FunctionPass *createBasicRegisterAllocator();
168 
169   /// Greedy register allocation pass - This pass implements a global register
170   /// allocator for optimized builds.
171   ///
172   FunctionPass *createGreedyRegisterAllocator();
173 
174   /// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean
175   /// Quadratic Prograaming (PBQP) based register allocator.
176   ///
177   FunctionPass *createDefaultPBQPRegisterAllocator();
178 
179   /// PrologEpilogCodeInserter - This pass inserts prolog and epilog code,
180   /// and eliminates abstract frame references.
181   extern char &PrologEpilogCodeInserterID;
182   MachineFunctionPass *createPrologEpilogInserterPass();
183 
184   /// ExpandPostRAPseudos - This pass expands pseudo instructions after
185   /// register allocation.
186   extern char &ExpandPostRAPseudosID;
187 
188   /// createPostRAHazardRecognizer - This pass runs the post-ra hazard
189   /// recognizer.
190   extern char &PostRAHazardRecognizerID;
191 
192   /// createPostRAScheduler - This pass performs post register allocation
193   /// scheduling.
194   extern char &PostRASchedulerID;
195 
196   /// BranchFolding - This pass performs machine code CFG based
197   /// optimizations to delete branches to branches, eliminate branches to
198   /// successor blocks (creating fall throughs), and eliminating branches over
199   /// branches.
200   extern char &BranchFolderPassID;
201 
202   /// BranchRelaxation - This pass replaces branches that need to jump further
203   /// than is supported by a branch instruction.
204   extern char &BranchRelaxationPassID;
205 
206   /// MachineFunctionPrinterPass - This pass prints out MachineInstr's.
207   extern char &MachineFunctionPrinterPassID;
208 
209   /// MIRPrintingPass - this pass prints out the LLVM IR using the MIR
210   /// serialization format.
211   extern char &MIRPrintingPassID;
212 
213   /// TailDuplicate - Duplicate blocks with unconditional branches
214   /// into tails of their predecessors.
215   extern char &TailDuplicateID;
216 
217   /// Duplicate blocks with unconditional branches into tails of their
218   /// predecessors. Variant that works before register allocation.
219   extern char &EarlyTailDuplicateID;
220 
221   /// MachineTraceMetrics - This pass computes critical path and CPU resource
222   /// usage in an ensemble of traces.
223   extern char &MachineTraceMetricsID;
224 
225   /// EarlyIfConverter - This pass performs if-conversion on SSA form by
226   /// inserting cmov instructions.
227   extern char &EarlyIfConverterID;
228 
229   /// EarlyIfPredicator - This pass performs if-conversion on SSA form by
230   /// predicating if/else block and insert select at the join point.
231   extern char &EarlyIfPredicatorID;
232 
233   /// This pass performs instruction combining using trace metrics to estimate
234   /// critical-path and resource depth.
235   extern char &MachineCombinerID;
236 
237   /// StackSlotColoring - This pass performs stack coloring and merging.
238   /// It merges disjoint allocas to reduce the stack size.
239   extern char &StackColoringID;
240 
241   /// IfConverter - This pass performs machine code if conversion.
242   extern char &IfConverterID;
243 
244   FunctionPass *createIfConverter(
245       std::function<bool(const MachineFunction &)> Ftor);
246 
247   /// MachineBlockPlacement - This pass places basic blocks based on branch
248   /// probabilities.
249   extern char &MachineBlockPlacementID;
250 
251   /// MachineBlockPlacementStats - This pass collects statistics about the
252   /// basic block placement using branch probabilities and block frequency
253   /// information.
254   extern char &MachineBlockPlacementStatsID;
255 
256   /// GCLowering Pass - Used by gc.root to perform its default lowering
257   /// operations.
258   FunctionPass *createGCLoweringPass();
259 
260   /// ShadowStackGCLowering - Implements the custom lowering mechanism
261   /// used by the shadow stack GC.  Only runs on functions which opt in to
262   /// the shadow stack collector.
263   FunctionPass *createShadowStackGCLoweringPass();
264 
265   /// GCMachineCodeAnalysis - Target-independent pass to mark safe points
266   /// in machine code. Must be added very late during code generation, just
267   /// prior to output, and importantly after all CFG transformations (such as
268   /// branch folding).
269   extern char &GCMachineCodeAnalysisID;
270 
271   /// Creates a pass to print GC metadata.
272   ///
273   FunctionPass *createGCInfoPrinter(raw_ostream &OS);
274 
275   /// MachineCSE - This pass performs global CSE on machine instructions.
276   extern char &MachineCSEID;
277 
278   /// MIRCanonicalizer - This pass canonicalizes MIR by renaming vregs
279   /// according to the semantics of the instruction as well as hoists
280   /// code.
281   extern char &MIRCanonicalizerID;
282 
283   /// ImplicitNullChecks - This pass folds null pointer checks into nearby
284   /// memory operations.
285   extern char &ImplicitNullChecksID;
286 
287   /// This pass performs loop invariant code motion on machine instructions.
288   extern char &MachineLICMID;
289 
290   /// This pass performs loop invariant code motion on machine instructions.
291   /// This variant works before register allocation. \see MachineLICMID.
292   extern char &EarlyMachineLICMID;
293 
294   /// MachineSinking - This pass performs sinking on machine instructions.
295   extern char &MachineSinkingID;
296 
297   /// MachineCopyPropagation - This pass performs copy propagation on
298   /// machine instructions.
299   extern char &MachineCopyPropagationID;
300 
301   /// PeepholeOptimizer - This pass performs peephole optimizations -
302   /// like extension and comparison eliminations.
303   extern char &PeepholeOptimizerID;
304 
305   /// OptimizePHIs - This pass optimizes machine instruction PHIs
306   /// to take advantage of opportunities created during DAG legalization.
307   extern char &OptimizePHIsID;
308 
309   /// StackSlotColoring - This pass performs stack slot coloring.
310   extern char &StackSlotColoringID;
311 
312   /// This pass lays out funclets contiguously.
313   extern char &FuncletLayoutID;
314 
315   /// This pass inserts the XRay instrumentation sleds if they are supported by
316   /// the target platform.
317   extern char &XRayInstrumentationID;
318 
319   /// This pass inserts FEntry calls
320   extern char &FEntryInserterID;
321 
322   /// This pass implements the "patchable-function" attribute.
323   extern char &PatchableFunctionID;
324 
325   /// createStackProtectorPass - This pass adds stack protectors to functions.
326   ///
327   FunctionPass *createStackProtectorPass();
328 
329   /// createMachineVerifierPass - This pass verifies cenerated machine code
330   /// instructions for correctness.
331   ///
332   FunctionPass *createMachineVerifierPass(const std::string& Banner);
333 
334   /// createDwarfEHPass - This pass mulches exception handling code into a form
335   /// adapted to code generation.  Required if using dwarf exception handling.
336   FunctionPass *createDwarfEHPass();
337 
338   /// createWinEHPass - Prepares personality functions used by MSVC on Windows,
339   /// in addition to the Itanium LSDA based personalities.
340   FunctionPass *createWinEHPass(bool DemoteCatchSwitchPHIOnly = false);
341 
342   /// createSjLjEHPreparePass - This pass adapts exception handling code to use
343   /// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow.
344   ///
345   FunctionPass *createSjLjEHPreparePass();
346 
347   /// createWasmEHPass - This pass adapts exception handling code to use
348   /// WebAssembly's exception handling scheme.
349   FunctionPass *createWasmEHPass();
350 
351   /// LocalStackSlotAllocation - This pass assigns local frame indices to stack
352   /// slots relative to one another and allocates base registers to access them
353   /// when it is estimated by the target to be out of range of normal frame
354   /// pointer or stack pointer index addressing.
355   extern char &LocalStackSlotAllocationID;
356 
357   /// This pass expands pseudo-instructions, reserves registers and adjusts
358   /// machine frame information.
359   extern char &FinalizeISelID;
360 
361   /// UnpackMachineBundles - This pass unpack machine instruction bundles.
362   extern char &UnpackMachineBundlesID;
363 
364   FunctionPass *
365   createUnpackMachineBundles(std::function<bool(const MachineFunction &)> Ftor);
366 
367   /// FinalizeMachineBundles - This pass finalize machine instruction
368   /// bundles (created earlier, e.g. during pre-RA scheduling).
369   extern char &FinalizeMachineBundlesID;
370 
371   /// StackMapLiveness - This pass analyses the register live-out set of
372   /// stackmap/patchpoint intrinsics and attaches the calculated information to
373   /// the intrinsic for later emission to the StackMap.
374   extern char &StackMapLivenessID;
375 
376   /// LiveDebugValues pass
377   extern char &LiveDebugValuesID;
378 
379   /// createJumpInstrTables - This pass creates jump-instruction tables.
380   ModulePass *createJumpInstrTablesPass();
381 
382   /// createForwardControlFlowIntegrityPass - This pass adds control-flow
383   /// integrity.
384   ModulePass *createForwardControlFlowIntegrityPass();
385 
386   /// InterleavedAccess Pass - This pass identifies and matches interleaved
387   /// memory accesses to target specific intrinsics.
388   ///
389   FunctionPass *createInterleavedAccessPass();
390 
391   /// InterleavedLoadCombines Pass - This pass identifies interleaved loads and
392   /// combines them into wide loads detectable by InterleavedAccessPass
393   ///
394   FunctionPass *createInterleavedLoadCombinePass();
395 
396   /// LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all
397   /// TLS variables for the emulated TLS model.
398   ///
399   ModulePass *createLowerEmuTLSPass();
400 
401   /// This pass lowers the \@llvm.load.relative and \@llvm.objc.* intrinsics to
402   /// instructions.  This is unsafe to do earlier because a pass may combine the
403   /// constant initializer into the load, which may result in an overflowing
404   /// evaluation.
405   ModulePass *createPreISelIntrinsicLoweringPass();
406 
407   /// GlobalMerge - This pass merges internal (by default) globals into structs
408   /// to enable reuse of a base pointer by indexed addressing modes.
409   /// It can also be configured to focus on size optimizations only.
410   ///
411   Pass *createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset,
412                               bool OnlyOptimizeForSize = false,
413                               bool MergeExternalByDefault = false);
414 
415   /// This pass splits the stack into a safe stack and an unsafe stack to
416   /// protect against stack-based overflow vulnerabilities.
417   FunctionPass *createSafeStackPass();
418 
419   /// This pass detects subregister lanes in a virtual register that are used
420   /// independently of other lanes and splits them into separate virtual
421   /// registers.
422   extern char &RenameIndependentSubregsID;
423 
424   /// This pass is executed POST-RA to collect which physical registers are
425   /// preserved by given machine function.
426   FunctionPass *createRegUsageInfoCollector();
427 
428   /// Return a MachineFunction pass that identifies call sites
429   /// and propagates register usage information of callee to caller
430   /// if available with PysicalRegisterUsageInfo pass.
431   FunctionPass *createRegUsageInfoPropPass();
432 
433   /// This pass performs software pipelining on machine instructions.
434   extern char &MachinePipelinerID;
435 
436   /// This pass frees the memory occupied by the MachineFunction.
437   FunctionPass *createFreeMachineFunctionPass();
438 
439   /// This pass performs outlining on machine instructions directly before
440   /// printing assembly.
441   ModulePass *createMachineOutlinerPass(bool RunOnAllFunctions = true);
442 
443   /// This pass expands the experimental reduction intrinsics into sequences of
444   /// shuffles.
445   FunctionPass *createExpandReductionsPass();
446 
447   // This pass expands memcmp() to load/stores.
448   FunctionPass *createExpandMemCmpPass();
449 
450   /// Creates Break False Dependencies pass. \see BreakFalseDeps.cpp
451   FunctionPass *createBreakFalseDeps();
452 
453   // This pass expands indirectbr instructions.
454   FunctionPass *createIndirectBrExpandPass();
455 
456   /// Creates CFI Instruction Inserter pass. \see CFIInstrInserter.cpp
457   FunctionPass *createCFIInstrInserter();
458 
459   /// Creates CFGuard longjmp target identification pass.
460   /// \see CFGuardLongjmp.cpp
461   FunctionPass *createCFGuardLongjmpPass();
462 
463   /// Create Hardware Loop pass. \see HardwareLoops.cpp
464   FunctionPass *createHardwareLoopsPass();
465 
466   /// Create IR Type Promotion pass. \see TypePromotion.cpp
467   FunctionPass *createTypePromotionPass();
468 
469 } // End llvm namespace
470 
471 #endif
472