10b57cec5SDimitry Andric//===-- llvm/Support/TargetOpcodes.def - Target Indep Opcodes ---*- C++ -*-===// 20b57cec5SDimitry Andric// 30b57cec5SDimitry Andric// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric// See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric// 70b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric// 90b57cec5SDimitry Andric// This file defines the target independent instruction opcodes. 100b57cec5SDimitry Andric// 110b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 120b57cec5SDimitry Andric 130b57cec5SDimitry Andric// NOTE: NO INCLUDE GUARD DESIRED! 140b57cec5SDimitry Andric 150b57cec5SDimitry Andric/// HANDLE_TARGET_OPCODE defines an opcode and its associated enum value. 160b57cec5SDimitry Andric/// 170b57cec5SDimitry Andric#ifndef HANDLE_TARGET_OPCODE 180b57cec5SDimitry Andric#define HANDLE_TARGET_OPCODE(OPC, NUM) 190b57cec5SDimitry Andric#endif 200b57cec5SDimitry Andric 210b57cec5SDimitry Andric/// HANDLE_TARGET_OPCODE_MARKER defines an alternative identifier for an opcode. 220b57cec5SDimitry Andric/// 230b57cec5SDimitry Andric#ifndef HANDLE_TARGET_OPCODE_MARKER 240b57cec5SDimitry Andric#define HANDLE_TARGET_OPCODE_MARKER(IDENT, OPC) 250b57cec5SDimitry Andric#endif 260b57cec5SDimitry Andric 270b57cec5SDimitry Andric/// Every instruction defined here must also appear in Target.td. 280b57cec5SDimitry Andric/// 290b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(PHI) 300b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(INLINEASM) 310b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(INLINEASM_BR) 320b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(CFI_INSTRUCTION) 330b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(EH_LABEL) 340b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(GC_LABEL) 350b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(ANNOTATION_LABEL) 360b57cec5SDimitry Andric 370b57cec5SDimitry Andric/// KILL - This instruction is a noop that is used only to adjust the 380b57cec5SDimitry Andric/// liveness of registers. This can be useful when dealing with 390b57cec5SDimitry Andric/// sub-registers. 400b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(KILL) 410b57cec5SDimitry Andric 420b57cec5SDimitry Andric/// EXTRACT_SUBREG - This instruction takes two operands: a register 430b57cec5SDimitry Andric/// that has subregisters, and a subregister index. It returns the 440b57cec5SDimitry Andric/// extracted subregister value. This is commonly used to implement 450b57cec5SDimitry Andric/// truncation operations on target architectures which support it. 460b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(EXTRACT_SUBREG) 470b57cec5SDimitry Andric 480b57cec5SDimitry Andric/// INSERT_SUBREG - This instruction takes three operands: a register that 490b57cec5SDimitry Andric/// has subregisters, a register providing an insert value, and a 500b57cec5SDimitry Andric/// subregister index. It returns the value of the first register with the 510b57cec5SDimitry Andric/// value of the second register inserted. The first register is often 520b57cec5SDimitry Andric/// defined by an IMPLICIT_DEF, because it is commonly used to implement 530b57cec5SDimitry Andric/// anyext operations on target architectures which support it. 540b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(INSERT_SUBREG) 550b57cec5SDimitry Andric 560b57cec5SDimitry Andric/// IMPLICIT_DEF - This is the MachineInstr-level equivalent of undef. 570b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(IMPLICIT_DEF) 580b57cec5SDimitry Andric 590b57cec5SDimitry Andric/// SUBREG_TO_REG - Assert the value of bits in a super register. 600b57cec5SDimitry Andric/// The result of this instruction is the value of the second operand inserted 610b57cec5SDimitry Andric/// into the subregister specified by the third operand. All other bits are 620b57cec5SDimitry Andric/// assumed to be equal to the bits in the immediate integer constant in the 630b57cec5SDimitry Andric/// first operand. This instruction just communicates information; No code 640b57cec5SDimitry Andric/// should be generated. 650b57cec5SDimitry Andric/// This is typically used after an instruction where the write to a subregister 660b57cec5SDimitry Andric/// implicitly cleared the bits in the super registers. 670b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(SUBREG_TO_REG) 680b57cec5SDimitry Andric 690b57cec5SDimitry Andric/// COPY_TO_REGCLASS - This instruction is a placeholder for a plain 700b57cec5SDimitry Andric/// register-to-register copy into a specific register class. This is only 710b57cec5SDimitry Andric/// used between instruction selection and MachineInstr creation, before 720b57cec5SDimitry Andric/// virtual registers have been created for all the instructions, and it's 730b57cec5SDimitry Andric/// only needed in cases where the register classes implied by the 740b57cec5SDimitry Andric/// instructions are insufficient. It is emitted as a COPY MachineInstr. 750b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(COPY_TO_REGCLASS) 760b57cec5SDimitry Andric 770b57cec5SDimitry Andric/// DBG_VALUE - a mapping of the llvm.dbg.value intrinsic 780b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(DBG_VALUE) 790b57cec5SDimitry Andric 80fe6060f1SDimitry Andric/// DBG_VALUE - a mapping of the llvm.dbg.value intrinsic with a variadic 81fe6060f1SDimitry Andric/// list of locations 82fe6060f1SDimitry AndricHANDLE_TARGET_OPCODE(DBG_VALUE_LIST) 83fe6060f1SDimitry Andric 84e8d8bef9SDimitry Andric/// DBG_INSTR_REF - A mapping of llvm.dbg.value referring to the instruction 85e8d8bef9SDimitry Andric/// that defines the value, rather than a virtual register. 86e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(DBG_INSTR_REF) 87e8d8bef9SDimitry Andric 88fe6060f1SDimitry Andric/// DBG_PHI - remainder of a PHI, identifies a program point where values 89fe6060f1SDimitry Andric/// merge under control flow. 90fe6060f1SDimitry AndricHANDLE_TARGET_OPCODE(DBG_PHI) 91fe6060f1SDimitry Andric 920b57cec5SDimitry Andric/// DBG_LABEL - a mapping of the llvm.dbg.label intrinsic 930b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(DBG_LABEL) 940b57cec5SDimitry Andric 950b57cec5SDimitry Andric/// REG_SEQUENCE - This variadic instruction is used to form a register that 960b57cec5SDimitry Andric/// represents a consecutive sequence of sub-registers. It's used as a 970b57cec5SDimitry Andric/// register coalescing / allocation aid and must be eliminated before code 980b57cec5SDimitry Andric/// emission. 990b57cec5SDimitry Andric// In SDNode form, the first operand encodes the register class created by 1000b57cec5SDimitry Andric// the REG_SEQUENCE, while each subsequent pair names a vreg + subreg index 1010b57cec5SDimitry Andric// pair. Once it has been lowered to a MachineInstr, the regclass operand 1020b57cec5SDimitry Andric// is no longer present. 1030b57cec5SDimitry Andric/// e.g. v1027 = REG_SEQUENCE v1024, 3, v1025, 4, v1026, 5 1040b57cec5SDimitry Andric/// After register coalescing references of v1024 should be replace with 1050b57cec5SDimitry Andric/// v1027:3, v1025 with v1027:4, etc. 1060b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(REG_SEQUENCE) 1070b57cec5SDimitry Andric 1080b57cec5SDimitry Andric/// COPY - Target-independent register copy. This instruction can also be 1090b57cec5SDimitry Andric/// used to copy between subregisters of virtual registers. 1100b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(COPY) 1110b57cec5SDimitry Andric 1120b57cec5SDimitry Andric/// BUNDLE - This instruction represents an instruction bundle. Instructions 1130b57cec5SDimitry Andric/// which immediately follow a BUNDLE instruction which are marked with 1140b57cec5SDimitry Andric/// 'InsideBundle' flag are inside the bundle. 1150b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(BUNDLE) 1160b57cec5SDimitry Andric 1170b57cec5SDimitry Andric/// Lifetime markers. 1180b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(LIFETIME_START) 1190b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(LIFETIME_END) 1200b57cec5SDimitry Andric 121e8d8bef9SDimitry Andric/// Pseudo probe 122e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(PSEUDO_PROBE) 123e8d8bef9SDimitry Andric 124fe6060f1SDimitry Andric/// Arithmetic fence. 125fe6060f1SDimitry AndricHANDLE_TARGET_OPCODE(ARITH_FENCE) 126fe6060f1SDimitry Andric 1270b57cec5SDimitry Andric/// A Stackmap instruction captures the location of live variables at its 1280b57cec5SDimitry Andric/// position in the instruction stream. It is followed by a shadow of bytes 1290b57cec5SDimitry Andric/// that must lie within the function and not contain another stackmap. 1300b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(STACKMAP) 1310b57cec5SDimitry Andric 1320b57cec5SDimitry Andric/// FEntry all - This is a marker instruction which gets translated into a raw fentry call. 1330b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(FENTRY_CALL) 1340b57cec5SDimitry Andric 1350b57cec5SDimitry Andric/// Patchable call instruction - this instruction represents a call to a 1360b57cec5SDimitry Andric/// constant address, followed by a series of NOPs. It is intended to 1370b57cec5SDimitry Andric/// support optimizations for dynamic languages (such as javascript) that 1380b57cec5SDimitry Andric/// rewrite calls to runtimes with more efficient code sequences. 1390b57cec5SDimitry Andric/// This also implies a stack map. 1400b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(PATCHPOINT) 1410b57cec5SDimitry Andric 1420b57cec5SDimitry Andric/// This pseudo-instruction loads the stack guard value. Targets which need 1430b57cec5SDimitry Andric/// to prevent the stack guard value or address from being spilled to the 1440b57cec5SDimitry Andric/// stack should override TargetLowering::emitLoadStackGuardNode and 1450b57cec5SDimitry Andric/// additionally expand this pseudo after register allocation. 1460b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(LOAD_STACK_GUARD) 1470b57cec5SDimitry Andric 1485ffd83dbSDimitry Andric/// These are used to support call sites that must have the stack adjusted 1495ffd83dbSDimitry Andric/// before the call (e.g. to initialize an argument passed by value). 1505ffd83dbSDimitry Andric/// See llvm.call.preallocated.{setup,arg} in the LangRef for more details. 1515ffd83dbSDimitry AndricHANDLE_TARGET_OPCODE(PREALLOCATED_SETUP) 1525ffd83dbSDimitry AndricHANDLE_TARGET_OPCODE(PREALLOCATED_ARG) 1535ffd83dbSDimitry Andric 1540b57cec5SDimitry Andric/// Call instruction with associated vm state for deoptimization and list 1550b57cec5SDimitry Andric/// of live pointers for relocation by the garbage collector. It is 1560b57cec5SDimitry Andric/// intended to support garbage collection with fully precise relocating 1570b57cec5SDimitry Andric/// collectors and deoptimizations in either the callee or caller. 1580b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(STATEPOINT) 1590b57cec5SDimitry Andric 1600b57cec5SDimitry Andric/// Instruction that records the offset of a local stack allocation passed to 1610b57cec5SDimitry Andric/// llvm.localescape. It has two arguments: the symbol for the label and the 1620b57cec5SDimitry Andric/// frame index of the local stack allocation. 1630b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(LOCAL_ESCAPE) 1640b57cec5SDimitry Andric 1650b57cec5SDimitry Andric/// Wraps a machine instruction which can fault, bundled with associated 1660b57cec5SDimitry Andric/// information on how to handle such a fault. 1670b57cec5SDimitry Andric/// For example loading instruction that may page fault, bundled with associated 1680b57cec5SDimitry Andric/// information on how to handle such a page fault. It is intended to support 1690b57cec5SDimitry Andric/// "zero cost" null checks in managed languages by allowing LLVM to fold 1700b57cec5SDimitry Andric/// comparisons into existing memory operations. 1710b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(FAULTING_OP) 1720b57cec5SDimitry Andric 1737a6dacacSDimitry Andric/// Precedes a machine instruction to add patchability constraints. An 1747a6dacacSDimitry Andric/// instruction after PATCHABLE_OP has to either have a minimum 1750b57cec5SDimitry Andric/// size or be preceded with a nop of that size. The first operand is 1767a6dacacSDimitry Andric/// an immediate denoting the minimum size of the following instruction. 1770b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(PATCHABLE_OP) 1780b57cec5SDimitry Andric 1790b57cec5SDimitry Andric/// This is a marker instruction which gets translated into a nop sled, useful 1800b57cec5SDimitry Andric/// for inserting instrumentation instructions at runtime. 1810b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(PATCHABLE_FUNCTION_ENTER) 1820b57cec5SDimitry Andric 1830b57cec5SDimitry Andric/// Wraps a return instruction and its operands to enable adding nop sleds 1840b57cec5SDimitry Andric/// either before or after the return. The nop sleds are useful for inserting 1850b57cec5SDimitry Andric/// instrumentation instructions at runtime. 1860b57cec5SDimitry Andric/// The patch here replaces the return instruction. 1870b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(PATCHABLE_RET) 1880b57cec5SDimitry Andric 1890b57cec5SDimitry Andric/// This is a marker instruction which gets translated into a nop sled, useful 1900b57cec5SDimitry Andric/// for inserting instrumentation instructions at runtime. 1910b57cec5SDimitry Andric/// The patch here prepends the return instruction. 1920b57cec5SDimitry Andric/// The same thing as in x86_64 is not possible for ARM because it has multiple 1930b57cec5SDimitry Andric/// return instructions. Furthermore, CPU allows parametrized and even 1940b57cec5SDimitry Andric/// conditional return instructions. In the current ARM implementation we are 1950b57cec5SDimitry Andric/// making use of the fact that currently LLVM doesn't seem to generate 1960b57cec5SDimitry Andric/// conditional return instructions. 1970b57cec5SDimitry Andric/// On ARM, the same instruction can be used for popping multiple registers 1980b57cec5SDimitry Andric/// from the stack and returning (it just pops pc register too), and LLVM 1990b57cec5SDimitry Andric/// generates it sometimes. So we can't insert the sled between this stack 2000b57cec5SDimitry Andric/// adjustment and the return without splitting the original instruction into 2 2010b57cec5SDimitry Andric/// instructions. So on ARM, rather than jumping into the exit trampoline, we 2020b57cec5SDimitry Andric/// call it, it does the tracing, preserves the stack and returns. 2030b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(PATCHABLE_FUNCTION_EXIT) 2040b57cec5SDimitry Andric 2050b57cec5SDimitry Andric/// Wraps a tail call instruction and its operands to enable adding nop sleds 2060b57cec5SDimitry Andric/// either before or after the tail exit. We use this as a disambiguation from 2070b57cec5SDimitry Andric/// PATCHABLE_RET which specifically only works for return instructions. 2080b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(PATCHABLE_TAIL_CALL) 2090b57cec5SDimitry Andric 2100b57cec5SDimitry Andric/// Wraps a logging call and its arguments with nop sleds. At runtime, this can 2110b57cec5SDimitry Andric/// be patched to insert instrumentation instructions. 2120b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(PATCHABLE_EVENT_CALL) 2130b57cec5SDimitry Andric 2140b57cec5SDimitry Andric/// Wraps a typed logging call and its argument with nop sleds. At runtime, this 2150b57cec5SDimitry Andric/// can be patched to insert instrumentation instructions. 2160b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(PATCHABLE_TYPED_EVENT_CALL) 2170b57cec5SDimitry Andric 2180b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(ICALL_BRANCH_FUNNEL) 2190b57cec5SDimitry Andric 220bdd1243dSDimitry Andric// This is a fence with the singlethread scope. It represents a compiler memory 221bdd1243dSDimitry Andric// barrier, but does not correspond to any generated instruction. 222bdd1243dSDimitry AndricHANDLE_TARGET_OPCODE(MEMBARRIER) 223bdd1243dSDimitry Andric 2245f757f3fSDimitry Andric// Provides information about what jump table the following indirect branch is 2255f757f3fSDimitry Andric// using. 2265f757f3fSDimitry AndricHANDLE_TARGET_OPCODE(JUMP_TABLE_DEBUG_INFO) 2275f757f3fSDimitry Andric 2280b57cec5SDimitry Andric/// The following generic opcodes are not supposed to appear after ISel. 2290b57cec5SDimitry Andric/// This is something we might want to relax, but for now, this is convenient 2300b57cec5SDimitry Andric/// to produce diagnostics. 2310b57cec5SDimitry Andric 232fe6060f1SDimitry Andric/// Instructions which should not exist past instruction selection, but do not 233fe6060f1SDimitry Andric/// generate code. These instructions only act as optimization hints. 234fe6060f1SDimitry AndricHANDLE_TARGET_OPCODE(G_ASSERT_SEXT) 235fe6060f1SDimitry AndricHANDLE_TARGET_OPCODE(G_ASSERT_ZEXT) 23604eeddc0SDimitry AndricHANDLE_TARGET_OPCODE(G_ASSERT_ALIGN) 237fe6060f1SDimitry AndricHANDLE_TARGET_OPCODE_MARKER(PRE_ISEL_GENERIC_OPTIMIZATION_HINT_START, 238fe6060f1SDimitry Andric G_ASSERT_SEXT) 239fe6060f1SDimitry AndricHANDLE_TARGET_OPCODE_MARKER(PRE_ISEL_GENERIC_OPTIMIZATION_HINT_END, 24004eeddc0SDimitry Andric G_ASSERT_ALIGN) 241fe6060f1SDimitry Andric 2420b57cec5SDimitry Andric/// Generic ADD instruction. This is an integer add. 2430b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_ADD) 2440b57cec5SDimitry AndricHANDLE_TARGET_OPCODE_MARKER(PRE_ISEL_GENERIC_OPCODE_START, G_ADD) 2450b57cec5SDimitry Andric 2460b57cec5SDimitry Andric/// Generic SUB instruction. This is an integer sub. 2470b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_SUB) 2480b57cec5SDimitry Andric 2490b57cec5SDimitry Andric// Generic multiply instruction. 2500b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_MUL) 2510b57cec5SDimitry Andric 2520b57cec5SDimitry Andric// Generic signed division instruction. 2530b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_SDIV) 2540b57cec5SDimitry Andric 2550b57cec5SDimitry Andric// Generic unsigned division instruction. 2560b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_UDIV) 2570b57cec5SDimitry Andric 2580b57cec5SDimitry Andric// Generic signed remainder instruction. 2590b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_SREM) 2600b57cec5SDimitry Andric 2610b57cec5SDimitry Andric// Generic unsigned remainder instruction. 2620b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_UREM) 2630b57cec5SDimitry Andric 264fe6060f1SDimitry Andric// Generic signed divrem instruction. 265fe6060f1SDimitry AndricHANDLE_TARGET_OPCODE(G_SDIVREM) 266fe6060f1SDimitry Andric 267fe6060f1SDimitry Andric// Generic unsigned divrem instruction. 268fe6060f1SDimitry AndricHANDLE_TARGET_OPCODE(G_UDIVREM) 269fe6060f1SDimitry Andric 2700b57cec5SDimitry Andric/// Generic bitwise and instruction. 2710b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_AND) 2720b57cec5SDimitry Andric 2730b57cec5SDimitry Andric/// Generic bitwise or instruction. 2740b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_OR) 2750b57cec5SDimitry Andric 2760b57cec5SDimitry Andric/// Generic bitwise exclusive-or instruction. 2770b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_XOR) 2780b57cec5SDimitry Andric 2790b57cec5SDimitry Andric 2800b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_IMPLICIT_DEF) 2810b57cec5SDimitry Andric 2820b57cec5SDimitry Andric/// Generic PHI instruction with types. 2830b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_PHI) 2840b57cec5SDimitry Andric 2850b57cec5SDimitry Andric/// Generic instruction to materialize the address of an alloca or other 2860b57cec5SDimitry Andric/// stack-based object. 2870b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FRAME_INDEX) 2880b57cec5SDimitry Andric 2890b57cec5SDimitry Andric/// Generic reference to global value. 2900b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_GLOBAL_VALUE) 2910b57cec5SDimitry Andric 29206c3fb27SDimitry Andric/// Generic instruction to materialize the address of an object in the constant 29306c3fb27SDimitry Andric/// pool. 29406c3fb27SDimitry AndricHANDLE_TARGET_OPCODE(G_CONSTANT_POOL) 29506c3fb27SDimitry Andric 2960b57cec5SDimitry Andric/// Generic instruction to extract blocks of bits from the register given 2970b57cec5SDimitry Andric/// (typically a sub-register COPY after instruction selection). 2980b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_EXTRACT) 2990b57cec5SDimitry Andric 3000b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_UNMERGE_VALUES) 3010b57cec5SDimitry Andric 3020b57cec5SDimitry Andric/// Generic instruction to insert blocks of bits from the registers given into 3030b57cec5SDimitry Andric/// the source. 3040b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_INSERT) 3050b57cec5SDimitry Andric 3060b57cec5SDimitry Andric/// Generic instruction to paste a variable number of components together into a 3070b57cec5SDimitry Andric/// larger register. 3080b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_MERGE_VALUES) 3090b57cec5SDimitry Andric 3100b57cec5SDimitry Andric/// Generic instruction to create a vector value from a number of scalar 3110b57cec5SDimitry Andric/// components. 3120b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_BUILD_VECTOR) 3130b57cec5SDimitry Andric 3140b57cec5SDimitry Andric/// Generic instruction to create a vector value from a number of scalar 3150b57cec5SDimitry Andric/// components, which have types larger than the result vector elt type. 3160b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_BUILD_VECTOR_TRUNC) 3170b57cec5SDimitry Andric 3180b57cec5SDimitry Andric/// Generic instruction to create a vector by concatenating multiple vectors. 3190b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_CONCAT_VECTORS) 3200b57cec5SDimitry Andric 3210b57cec5SDimitry Andric/// Generic pointer to int conversion. 3220b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_PTRTOINT) 3230b57cec5SDimitry Andric 3240b57cec5SDimitry Andric/// Generic int to pointer conversion. 3250b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_INTTOPTR) 3260b57cec5SDimitry Andric 3270b57cec5SDimitry Andric/// Generic bitcast. The source and destination types must be different, or a 3280b57cec5SDimitry Andric/// COPY is the relevant instruction. 3290b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_BITCAST) 3300b57cec5SDimitry Andric 3315ffd83dbSDimitry Andric/// Generic freeze. 3325ffd83dbSDimitry AndricHANDLE_TARGET_OPCODE(G_FREEZE) 3335ffd83dbSDimitry Andric 33406c3fb27SDimitry Andric/// Constant folding barrier. 33506c3fb27SDimitry AndricHANDLE_TARGET_OPCODE(G_CONSTANT_FOLD_BARRIER) 33606c3fb27SDimitry Andric 33781ad6265SDimitry Andric// INTRINSIC fptrunc_round intrinsic. 33881ad6265SDimitry AndricHANDLE_TARGET_OPCODE(G_INTRINSIC_FPTRUNC_ROUND) 33981ad6265SDimitry Andric 3400b57cec5SDimitry Andric/// INTRINSIC trunc intrinsic. 3410b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_INTRINSIC_TRUNC) 3420b57cec5SDimitry Andric 3430b57cec5SDimitry Andric/// INTRINSIC round intrinsic. 3440b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_INTRINSIC_ROUND) 3450b57cec5SDimitry Andric 346e8d8bef9SDimitry Andric/// INTRINSIC round to integer intrinsic. 347e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_INTRINSIC_LRINT) 348e8d8bef9SDimitry Andric 349e8d8bef9SDimitry Andric/// INTRINSIC roundeven intrinsic. 350e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_INTRINSIC_ROUNDEVEN) 351e8d8bef9SDimitry Andric 352480093f4SDimitry Andric/// INTRINSIC readcyclecounter 353480093f4SDimitry AndricHANDLE_TARGET_OPCODE(G_READCYCLECOUNTER) 354480093f4SDimitry Andric 3550b57cec5SDimitry Andric/// Generic load (including anyext load) 3560b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_LOAD) 3570b57cec5SDimitry Andric 3580b57cec5SDimitry Andric/// Generic signext load 3590b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_SEXTLOAD) 3600b57cec5SDimitry Andric 3610b57cec5SDimitry Andric/// Generic zeroext load 3620b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_ZEXTLOAD) 3630b57cec5SDimitry Andric 3648bcb0991SDimitry Andric/// Generic indexed load (including anyext load) 3658bcb0991SDimitry AndricHANDLE_TARGET_OPCODE(G_INDEXED_LOAD) 3668bcb0991SDimitry Andric 3678bcb0991SDimitry Andric/// Generic indexed signext load 3688bcb0991SDimitry AndricHANDLE_TARGET_OPCODE(G_INDEXED_SEXTLOAD) 3698bcb0991SDimitry Andric 3708bcb0991SDimitry Andric/// Generic indexed zeroext load 3718bcb0991SDimitry AndricHANDLE_TARGET_OPCODE(G_INDEXED_ZEXTLOAD) 3728bcb0991SDimitry Andric 3730b57cec5SDimitry Andric/// Generic store. 3740b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_STORE) 3750b57cec5SDimitry Andric 3768bcb0991SDimitry Andric/// Generic indexed store. 3778bcb0991SDimitry AndricHANDLE_TARGET_OPCODE(G_INDEXED_STORE) 3788bcb0991SDimitry Andric 3790b57cec5SDimitry Andric/// Generic atomic cmpxchg with internal success check. 3800b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_ATOMIC_CMPXCHG_WITH_SUCCESS) 3810b57cec5SDimitry Andric 3820b57cec5SDimitry Andric/// Generic atomic cmpxchg. 3830b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_ATOMIC_CMPXCHG) 3840b57cec5SDimitry Andric 3850b57cec5SDimitry Andric/// Generic atomicrmw. 3860b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_ATOMICRMW_XCHG) 3870b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_ATOMICRMW_ADD) 3880b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_ATOMICRMW_SUB) 3890b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_ATOMICRMW_AND) 3900b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_ATOMICRMW_NAND) 3910b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_ATOMICRMW_OR) 3920b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_ATOMICRMW_XOR) 3930b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_ATOMICRMW_MAX) 3940b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_ATOMICRMW_MIN) 3950b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_ATOMICRMW_UMAX) 3960b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_ATOMICRMW_UMIN) 3978bcb0991SDimitry AndricHANDLE_TARGET_OPCODE(G_ATOMICRMW_FADD) 3988bcb0991SDimitry AndricHANDLE_TARGET_OPCODE(G_ATOMICRMW_FSUB) 399753f127fSDimitry AndricHANDLE_TARGET_OPCODE(G_ATOMICRMW_FMAX) 400753f127fSDimitry AndricHANDLE_TARGET_OPCODE(G_ATOMICRMW_FMIN) 401bdd1243dSDimitry AndricHANDLE_TARGET_OPCODE(G_ATOMICRMW_UINC_WRAP) 402bdd1243dSDimitry AndricHANDLE_TARGET_OPCODE(G_ATOMICRMW_UDEC_WRAP) 403bdd1243dSDimitry Andric 404bdd1243dSDimitry Andric// Marker for start of Generic AtomicRMW opcodes 405bdd1243dSDimitry AndricHANDLE_TARGET_OPCODE_MARKER(GENERIC_ATOMICRMW_OP_START, G_ATOMICRMW_XCHG) 406bdd1243dSDimitry Andric 407bdd1243dSDimitry Andric// Marker for end of Generic AtomicRMW opcodes 408bdd1243dSDimitry AndricHANDLE_TARGET_OPCODE_MARKER(GENERIC_ATOMICRMW_OP_END, G_ATOMICRMW_UDEC_WRAP) 4090b57cec5SDimitry Andric 4100b57cec5SDimitry Andric// Generic atomic fence 4110b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FENCE) 4120b57cec5SDimitry Andric 4135f757f3fSDimitry Andric/// Generic prefetch 4145f757f3fSDimitry AndricHANDLE_TARGET_OPCODE(G_PREFETCH) 4155f757f3fSDimitry Andric 4160b57cec5SDimitry Andric/// Generic conditional branch instruction. 4170b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_BRCOND) 4180b57cec5SDimitry Andric 4190b57cec5SDimitry Andric/// Generic indirect branch instruction. 4200b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_BRINDIRECT) 4210b57cec5SDimitry Andric 422bdd1243dSDimitry Andric/// Begin an invoke region marker. 423bdd1243dSDimitry AndricHANDLE_TARGET_OPCODE(G_INVOKE_REGION_START) 424bdd1243dSDimitry Andric 4250b57cec5SDimitry Andric/// Generic intrinsic use (without side effects). 4260b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_INTRINSIC) 4270b57cec5SDimitry Andric 4280b57cec5SDimitry Andric/// Generic intrinsic use (with side effects). 4290b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_INTRINSIC_W_SIDE_EFFECTS) 4300b57cec5SDimitry Andric 4315f757f3fSDimitry Andric/// Generic intrinsic use (without side effects). 4325f757f3fSDimitry AndricHANDLE_TARGET_OPCODE(G_INTRINSIC_CONVERGENT) 4335f757f3fSDimitry Andric 4345f757f3fSDimitry Andric/// Generic intrinsic use (with side effects). 4355f757f3fSDimitry AndricHANDLE_TARGET_OPCODE(G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS) 4365f757f3fSDimitry Andric 4370b57cec5SDimitry Andric/// Generic extension allowing rubbish in high bits. 4380b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_ANYEXT) 4390b57cec5SDimitry Andric 4400b57cec5SDimitry Andric/// Generic instruction to discard the high bits of a register. This differs 4410b57cec5SDimitry Andric/// from (G_EXTRACT val, 0) on its action on vectors: G_TRUNC will truncate 4420b57cec5SDimitry Andric/// each element individually, G_EXTRACT will typically discard the high 4430b57cec5SDimitry Andric/// elements of the vector. 4440b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_TRUNC) 4450b57cec5SDimitry Andric 4460b57cec5SDimitry Andric/// Generic integer constant. 4470b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_CONSTANT) 4480b57cec5SDimitry Andric 4490b57cec5SDimitry Andric/// Generic floating constant. 4500b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FCONSTANT) 4510b57cec5SDimitry Andric 4520b57cec5SDimitry Andric/// Generic va_start instruction. Stores to its one pointer operand. 4530b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_VASTART) 4540b57cec5SDimitry Andric 4555f757f3fSDimitry Andric/// Generic va_arg instruction. Stores to its one pointer operand. 4560b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_VAARG) 4570b57cec5SDimitry Andric 4580b57cec5SDimitry Andric// Generic sign extend 4590b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_SEXT) 4608bcb0991SDimitry AndricHANDLE_TARGET_OPCODE(G_SEXT_INREG) 4610b57cec5SDimitry Andric 4620b57cec5SDimitry Andric// Generic zero extend 4630b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_ZEXT) 4640b57cec5SDimitry Andric 4650b57cec5SDimitry Andric// Generic left-shift 4660b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_SHL) 4670b57cec5SDimitry Andric 4680b57cec5SDimitry Andric// Generic logical right-shift 4690b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_LSHR) 4700b57cec5SDimitry Andric 4710b57cec5SDimitry Andric// Generic arithmetic right-shift 4720b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_ASHR) 4730b57cec5SDimitry Andric 4745ffd83dbSDimitry Andric// Generic funnel left shift 4755ffd83dbSDimitry AndricHANDLE_TARGET_OPCODE(G_FSHL) 4765ffd83dbSDimitry Andric 4775ffd83dbSDimitry Andric// Generic funnel right shift 4785ffd83dbSDimitry AndricHANDLE_TARGET_OPCODE(G_FSHR) 4795ffd83dbSDimitry Andric 480fe6060f1SDimitry Andric// Generic right rotate 481fe6060f1SDimitry AndricHANDLE_TARGET_OPCODE(G_ROTR) 482fe6060f1SDimitry Andric 483fe6060f1SDimitry Andric// Generic left rotate 484fe6060f1SDimitry AndricHANDLE_TARGET_OPCODE(G_ROTL) 485fe6060f1SDimitry Andric 4860b57cec5SDimitry Andric/// Generic integer-base comparison, also applicable to vectors of integers. 4870b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_ICMP) 4880b57cec5SDimitry Andric 4890b57cec5SDimitry Andric/// Generic floating-point comparison, also applicable to vectors. 4900b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FCMP) 4910b57cec5SDimitry Andric 4920b57cec5SDimitry Andric/// Generic select. 4930b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_SELECT) 4940b57cec5SDimitry Andric 4950b57cec5SDimitry Andric/// Generic unsigned add instruction, consuming the normal operands and 4960b57cec5SDimitry Andric/// producing the result and a carry flag. 4970b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_UADDO) 4980b57cec5SDimitry Andric 4990b57cec5SDimitry Andric/// Generic unsigned add instruction, consuming the normal operands plus a carry 5000b57cec5SDimitry Andric/// flag, and similarly producing the result and a carry flag. 5010b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_UADDE) 5020b57cec5SDimitry Andric 5030b57cec5SDimitry Andric/// Generic unsigned sub instruction, consuming the normal operands and 5040b57cec5SDimitry Andric/// producing the result and a carry flag. 5050b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_USUBO) 5060b57cec5SDimitry Andric 5070b57cec5SDimitry Andric/// Generic unsigned subtract instruction, consuming the normal operands plus a 5080b57cec5SDimitry Andric/// carry flag, and similarly producing the result and a carry flag. 5090b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_USUBE) 5100b57cec5SDimitry Andric 5110b57cec5SDimitry Andric/// Generic signed add instruction, producing the result and a signed overflow 5120b57cec5SDimitry Andric/// flag. 5130b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_SADDO) 5140b57cec5SDimitry Andric 5150b57cec5SDimitry Andric/// Generic signed add instruction, consuming the normal operands plus a carry 5160b57cec5SDimitry Andric/// flag, and similarly producing the result and a carry flag. 5170b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_SADDE) 5180b57cec5SDimitry Andric 5190b57cec5SDimitry Andric/// Generic signed subtract instruction, producing the result and a signed 5200b57cec5SDimitry Andric/// overflow flag. 5210b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_SSUBO) 5220b57cec5SDimitry Andric 5230b57cec5SDimitry Andric/// Generic signed sub instruction, consuming the normal operands plus a carry 5240b57cec5SDimitry Andric/// flag, and similarly producing the result and a carry flag. 5250b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_SSUBE) 5260b57cec5SDimitry Andric 5270b57cec5SDimitry Andric/// Generic unsigned multiply instruction, producing the result and a signed 5280b57cec5SDimitry Andric/// overflow flag. 5290b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_UMULO) 5300b57cec5SDimitry Andric 5310b57cec5SDimitry Andric/// Generic signed multiply instruction, producing the result and a signed 5320b57cec5SDimitry Andric/// overflow flag. 5330b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_SMULO) 5340b57cec5SDimitry Andric 5350b57cec5SDimitry Andric// Multiply two numbers at twice the incoming bit width (unsigned) and return 5360b57cec5SDimitry Andric// the high half of the result. 5370b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_UMULH) 5380b57cec5SDimitry Andric 5390b57cec5SDimitry Andric// Multiply two numbers at twice the incoming bit width (signed) and return 5400b57cec5SDimitry Andric// the high half of the result. 5410b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_SMULH) 5420b57cec5SDimitry Andric 5435ffd83dbSDimitry Andric/// Generic saturating unsigned addition. 5445ffd83dbSDimitry AndricHANDLE_TARGET_OPCODE(G_UADDSAT) 5455ffd83dbSDimitry Andric 5465ffd83dbSDimitry Andric/// Generic saturating signed addition. 5475ffd83dbSDimitry AndricHANDLE_TARGET_OPCODE(G_SADDSAT) 5485ffd83dbSDimitry Andric 5495ffd83dbSDimitry Andric/// Generic saturating unsigned subtraction. 5505ffd83dbSDimitry AndricHANDLE_TARGET_OPCODE(G_USUBSAT) 5515ffd83dbSDimitry Andric 5525ffd83dbSDimitry Andric/// Generic saturating signed subtraction. 5535ffd83dbSDimitry AndricHANDLE_TARGET_OPCODE(G_SSUBSAT) 5545ffd83dbSDimitry Andric 555e8d8bef9SDimitry Andric/// Generic saturating unsigned left shift. 556e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_USHLSAT) 557e8d8bef9SDimitry Andric 558e8d8bef9SDimitry Andric/// Generic saturating signed left shift. 559e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_SSHLSAT) 560e8d8bef9SDimitry Andric 561e8d8bef9SDimitry Andric// Perform signed fixed point multiplication 562e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_SMULFIX) 563e8d8bef9SDimitry Andric 564e8d8bef9SDimitry Andric// Perform unsigned fixed point multiplication 565e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_UMULFIX) 566e8d8bef9SDimitry Andric 567e8d8bef9SDimitry Andric// Perform signed, saturating fixed point multiplication 568e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_SMULFIXSAT) 569e8d8bef9SDimitry Andric 570e8d8bef9SDimitry Andric// Perform unsigned, saturating fixed point multiplication 571e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_UMULFIXSAT) 572e8d8bef9SDimitry Andric 573e8d8bef9SDimitry Andric// Perform signed fixed point division 574e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_SDIVFIX) 575e8d8bef9SDimitry Andric 576e8d8bef9SDimitry Andric// Perform unsigned fixed point division 577e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_UDIVFIX) 578e8d8bef9SDimitry Andric 579e8d8bef9SDimitry Andric// Perform signed, saturating fixed point division 580e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_SDIVFIXSAT) 581e8d8bef9SDimitry Andric 582e8d8bef9SDimitry Andric// Perform unsigned, saturating fixed point division 583e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_UDIVFIXSAT) 584e8d8bef9SDimitry Andric 5850b57cec5SDimitry Andric/// Generic FP addition. 5860b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FADD) 5870b57cec5SDimitry Andric 5880b57cec5SDimitry Andric/// Generic FP subtraction. 5890b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FSUB) 5900b57cec5SDimitry Andric 5910b57cec5SDimitry Andric/// Generic FP multiplication. 5920b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FMUL) 5930b57cec5SDimitry Andric 5940b57cec5SDimitry Andric/// Generic FMA multiplication. Behaves like llvm fma intrinsic 5950b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FMA) 5960b57cec5SDimitry Andric 5978bcb0991SDimitry Andric/// Generic FP multiply and add. Behaves as separate fmul and fadd. 5988bcb0991SDimitry AndricHANDLE_TARGET_OPCODE(G_FMAD) 5998bcb0991SDimitry Andric 6000b57cec5SDimitry Andric/// Generic FP division. 6010b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FDIV) 6020b57cec5SDimitry Andric 6030b57cec5SDimitry Andric/// Generic FP remainder. 6040b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FREM) 6050b57cec5SDimitry Andric 6060b57cec5SDimitry Andric/// Generic FP exponentiation. 6070b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FPOW) 6080b57cec5SDimitry Andric 609e8d8bef9SDimitry Andric/// Generic FP exponentiation, with an integer exponent. 610e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_FPOWI) 611e8d8bef9SDimitry Andric 6120b57cec5SDimitry Andric/// Generic base-e exponential of a value. 6130b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FEXP) 6140b57cec5SDimitry Andric 6150b57cec5SDimitry Andric/// Generic base-2 exponential of a value. 6160b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FEXP2) 6170b57cec5SDimitry Andric 6185f757f3fSDimitry Andric/// Generic base-10 exponential of a value. 6195f757f3fSDimitry AndricHANDLE_TARGET_OPCODE(G_FEXP10) 6205f757f3fSDimitry Andric 6210b57cec5SDimitry Andric/// Floating point base-e logarithm of a value. 6220b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FLOG) 6230b57cec5SDimitry Andric 6240b57cec5SDimitry Andric/// Floating point base-2 logarithm of a value. 6250b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FLOG2) 6260b57cec5SDimitry Andric 6270b57cec5SDimitry Andric/// Floating point base-10 logarithm of a value. 6280b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FLOG10) 6290b57cec5SDimitry Andric 63006c3fb27SDimitry Andric/// Floating point x * 2^n 63106c3fb27SDimitry AndricHANDLE_TARGET_OPCODE(G_FLDEXP) 63206c3fb27SDimitry Andric 63306c3fb27SDimitry Andric/// Floating point extract fraction and exponent. 63406c3fb27SDimitry AndricHANDLE_TARGET_OPCODE(G_FFREXP) 63506c3fb27SDimitry Andric 6360b57cec5SDimitry Andric/// Generic FP negation. 6370b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FNEG) 6380b57cec5SDimitry Andric 6390b57cec5SDimitry Andric/// Generic FP extension. 6400b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FPEXT) 6410b57cec5SDimitry Andric 6420b57cec5SDimitry Andric/// Generic float to signed-int conversion 6430b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FPTRUNC) 6440b57cec5SDimitry Andric 6450b57cec5SDimitry Andric/// Generic float to signed-int conversion 6460b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FPTOSI) 6470b57cec5SDimitry Andric 6480b57cec5SDimitry Andric/// Generic float to unsigned-int conversion 6490b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FPTOUI) 6500b57cec5SDimitry Andric 6510b57cec5SDimitry Andric/// Generic signed-int to float conversion 6520b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_SITOFP) 6530b57cec5SDimitry Andric 6540b57cec5SDimitry Andric/// Generic unsigned-int to float conversion 6550b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_UITOFP) 6560b57cec5SDimitry Andric 6570b57cec5SDimitry Andric/// Generic FP absolute value. 6580b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FABS) 6590b57cec5SDimitry Andric 6600b57cec5SDimitry Andric/// FCOPYSIGN(X, Y) - Return the value of X with the sign of Y. NOTE: This does 6610b57cec5SDimitry Andric/// not require that X and Y have the same type, just that they are both 6620b57cec5SDimitry Andric/// floating point. X and the result must have the same type. FCOPYSIGN(f32, 6630b57cec5SDimitry Andric/// f64) is allowed. 6640b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FCOPYSIGN) 6650b57cec5SDimitry Andric 66681ad6265SDimitry Andric/// Generic test for floating-point class. 66781ad6265SDimitry AndricHANDLE_TARGET_OPCODE(G_IS_FPCLASS) 66881ad6265SDimitry Andric 6690b57cec5SDimitry Andric/// Generic FP canonicalize value. 6700b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FCANONICALIZE) 6710b57cec5SDimitry Andric 6720b57cec5SDimitry Andric/// FP min/max matching libm's fmin/fmax 6730b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FMINNUM) 6740b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FMAXNUM) 6750b57cec5SDimitry Andric 6760b57cec5SDimitry Andric/// FP min/max matching IEEE-754 2008's minnum/maxnum semantics. 6770b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FMINNUM_IEEE) 6780b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FMAXNUM_IEEE) 6790b57cec5SDimitry Andric 6800b57cec5SDimitry Andric/// FP min/max matching IEEE-754 2018 draft semantics. 6810b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FMINIMUM) 6820b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FMAXIMUM) 6830b57cec5SDimitry Andric 6845f757f3fSDimitry Andric/// Access to FP environment. 685297eecfbSDimitry AndricHANDLE_TARGET_OPCODE(G_GET_FPENV) 686297eecfbSDimitry AndricHANDLE_TARGET_OPCODE(G_SET_FPENV) 687297eecfbSDimitry AndricHANDLE_TARGET_OPCODE(G_RESET_FPENV) 6885f757f3fSDimitry AndricHANDLE_TARGET_OPCODE(G_GET_FPMODE) 6895f757f3fSDimitry AndricHANDLE_TARGET_OPCODE(G_SET_FPMODE) 6905f757f3fSDimitry AndricHANDLE_TARGET_OPCODE(G_RESET_FPMODE) 6915f757f3fSDimitry Andric 6920b57cec5SDimitry Andric/// Generic pointer offset 693480093f4SDimitry AndricHANDLE_TARGET_OPCODE(G_PTR_ADD) 6940b57cec5SDimitry Andric 6955ffd83dbSDimitry Andric/// Clear the specified bits in a pointer. 6965ffd83dbSDimitry AndricHANDLE_TARGET_OPCODE(G_PTRMASK) 6970b57cec5SDimitry Andric 6980b57cec5SDimitry Andric/// Generic signed integer minimum. 6990b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_SMIN) 7000b57cec5SDimitry Andric 7010b57cec5SDimitry Andric/// Generic signed integer maximum. 7020b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_SMAX) 7030b57cec5SDimitry Andric 7040b57cec5SDimitry Andric/// Generic unsigned integer maximum. 7050b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_UMIN) 7060b57cec5SDimitry Andric 7070b57cec5SDimitry Andric/// Generic unsigned integer maximum. 7080b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_UMAX) 7090b57cec5SDimitry Andric 710e8d8bef9SDimitry Andric/// Generic integer absolute value. 711e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_ABS) 712e8d8bef9SDimitry Andric 713349cc55cSDimitry AndricHANDLE_TARGET_OPCODE(G_LROUND) 714349cc55cSDimitry AndricHANDLE_TARGET_OPCODE(G_LLROUND) 715349cc55cSDimitry Andric 7160b57cec5SDimitry Andric/// Generic BRANCH instruction. This is an unconditional branch. 7170b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_BR) 7180b57cec5SDimitry Andric 7190b57cec5SDimitry Andric/// Generic branch to jump table entry. 7200b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_BRJT) 7210b57cec5SDimitry Andric 7220b57cec5SDimitry Andric/// Generic insertelement. 7230b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_INSERT_VECTOR_ELT) 7240b57cec5SDimitry Andric 7250b57cec5SDimitry Andric/// Generic extractelement. 7260b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_EXTRACT_VECTOR_ELT) 7270b57cec5SDimitry Andric 7280b57cec5SDimitry Andric/// Generic shufflevector. 7290b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_SHUFFLE_VECTOR) 7300b57cec5SDimitry Andric 7310b57cec5SDimitry Andric/// Generic count trailing zeroes. 7320b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_CTTZ) 7330b57cec5SDimitry Andric 7340b57cec5SDimitry Andric/// Same as above, undefined for zero inputs. 7350b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_CTTZ_ZERO_UNDEF) 7360b57cec5SDimitry Andric 7370b57cec5SDimitry Andric/// Generic count leading zeroes. 7380b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_CTLZ) 7390b57cec5SDimitry Andric 7400b57cec5SDimitry Andric/// Same as above, undefined for zero inputs. 7410b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_CTLZ_ZERO_UNDEF) 7420b57cec5SDimitry Andric 7430b57cec5SDimitry Andric/// Generic count bits. 7440b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_CTPOP) 7450b57cec5SDimitry Andric 7460b57cec5SDimitry Andric/// Generic byte swap. 7470b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_BSWAP) 7480b57cec5SDimitry Andric 7498bcb0991SDimitry Andric/// Generic bit reverse. 7508bcb0991SDimitry AndricHANDLE_TARGET_OPCODE(G_BITREVERSE) 7518bcb0991SDimitry Andric 7520b57cec5SDimitry Andric/// Floating point ceil. 7530b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FCEIL) 7540b57cec5SDimitry Andric 7550b57cec5SDimitry Andric/// Floating point cosine. 7560b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FCOS) 7570b57cec5SDimitry Andric 7580b57cec5SDimitry Andric/// Floating point sine. 7590b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FSIN) 7600b57cec5SDimitry Andric 7610b57cec5SDimitry Andric/// Floating point square root. 7620b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FSQRT) 7630b57cec5SDimitry Andric 7640b57cec5SDimitry Andric/// Floating point floor. 7650b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FFLOOR) 7660b57cec5SDimitry Andric 7670b57cec5SDimitry Andric/// Floating point round to next integer. 7680b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FRINT) 7690b57cec5SDimitry Andric 7700b57cec5SDimitry Andric/// Floating point round to nearest integer. 7710b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_FNEARBYINT) 7720b57cec5SDimitry Andric 7730b57cec5SDimitry Andric/// Generic AddressSpaceCast. 7740b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_ADDRSPACE_CAST) 7750b57cec5SDimitry Andric 7760b57cec5SDimitry Andric/// Generic block address 7770b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_BLOCK_ADDR) 7780b57cec5SDimitry Andric 7790b57cec5SDimitry Andric/// Generic jump table address 7800b57cec5SDimitry AndricHANDLE_TARGET_OPCODE(G_JUMP_TABLE) 7810b57cec5SDimitry Andric 7828bcb0991SDimitry Andric/// Generic dynamic stack allocation. 7838bcb0991SDimitry AndricHANDLE_TARGET_OPCODE(G_DYN_STACKALLOC) 7848bcb0991SDimitry Andric 7855f757f3fSDimitry Andric/// Generic stack pointer save. 7865f757f3fSDimitry AndricHANDLE_TARGET_OPCODE(G_STACKSAVE) 7875f757f3fSDimitry Andric 7885f757f3fSDimitry Andric/// Generic stack pointer restore. 7895f757f3fSDimitry AndricHANDLE_TARGET_OPCODE(G_STACKRESTORE) 7905f757f3fSDimitry Andric 7915ffd83dbSDimitry Andric/// Strict floating point instructions. 7925ffd83dbSDimitry AndricHANDLE_TARGET_OPCODE(G_STRICT_FADD) 7935ffd83dbSDimitry AndricHANDLE_TARGET_OPCODE(G_STRICT_FSUB) 7945ffd83dbSDimitry AndricHANDLE_TARGET_OPCODE(G_STRICT_FMUL) 7955ffd83dbSDimitry AndricHANDLE_TARGET_OPCODE(G_STRICT_FDIV) 7965ffd83dbSDimitry AndricHANDLE_TARGET_OPCODE(G_STRICT_FREM) 7975ffd83dbSDimitry AndricHANDLE_TARGET_OPCODE(G_STRICT_FMA) 7985ffd83dbSDimitry AndricHANDLE_TARGET_OPCODE(G_STRICT_FSQRT) 79906c3fb27SDimitry AndricHANDLE_TARGET_OPCODE(G_STRICT_FLDEXP) 8005ffd83dbSDimitry Andric 801480093f4SDimitry Andric/// read_register intrinsic 802480093f4SDimitry AndricHANDLE_TARGET_OPCODE(G_READ_REGISTER) 803480093f4SDimitry Andric 804480093f4SDimitry Andric/// write_register intrinsic 805480093f4SDimitry AndricHANDLE_TARGET_OPCODE(G_WRITE_REGISTER) 8060b57cec5SDimitry Andric 807e8d8bef9SDimitry Andric/// llvm.memcpy intrinsic 808e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_MEMCPY) 809e8d8bef9SDimitry Andric 810fe6060f1SDimitry Andric/// llvm.memcpy.inline intrinsic 811fe6060f1SDimitry AndricHANDLE_TARGET_OPCODE(G_MEMCPY_INLINE) 812fe6060f1SDimitry Andric 813e8d8bef9SDimitry Andric/// llvm.memmove intrinsic 814e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_MEMMOVE) 815e8d8bef9SDimitry Andric 816e8d8bef9SDimitry Andric/// llvm.memset intrinsic 817e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_MEMSET) 818fe6060f1SDimitry AndricHANDLE_TARGET_OPCODE(G_BZERO) 819e8d8bef9SDimitry Andric 820e8d8bef9SDimitry Andric/// Vector reductions 821e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_VECREDUCE_SEQ_FADD) 822e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_VECREDUCE_SEQ_FMUL) 823e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_VECREDUCE_FADD) 824e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_VECREDUCE_FMUL) 825e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_VECREDUCE_FMAX) 826e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_VECREDUCE_FMIN) 8275f757f3fSDimitry AndricHANDLE_TARGET_OPCODE(G_VECREDUCE_FMAXIMUM) 8285f757f3fSDimitry AndricHANDLE_TARGET_OPCODE(G_VECREDUCE_FMINIMUM) 829e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_VECREDUCE_ADD) 830e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_VECREDUCE_MUL) 831e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_VECREDUCE_AND) 832e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_VECREDUCE_OR) 833e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_VECREDUCE_XOR) 834e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_VECREDUCE_SMAX) 835e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_VECREDUCE_SMIN) 836e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_VECREDUCE_UMAX) 837e8d8bef9SDimitry AndricHANDLE_TARGET_OPCODE(G_VECREDUCE_UMIN) 838e8d8bef9SDimitry Andric 839fe6060f1SDimitry AndricHANDLE_TARGET_OPCODE(G_SBFX) 840fe6060f1SDimitry AndricHANDLE_TARGET_OPCODE(G_UBFX) 841fe6060f1SDimitry Andric 8420b57cec5SDimitry Andric/// Marker for the end of the generic opcode. 8430b57cec5SDimitry Andric/// This is used to check if an opcode is in the range of the 8440b57cec5SDimitry Andric/// generic opcodes. 845fe6060f1SDimitry AndricHANDLE_TARGET_OPCODE_MARKER(PRE_ISEL_GENERIC_OPCODE_END, G_UBFX) 8460b57cec5SDimitry Andric 8470b57cec5SDimitry Andric/// BUILTIN_OP_END - This must be the last enum value in this list. 8480b57cec5SDimitry Andric/// The target-specific post-isel opcode values start here. 8490b57cec5SDimitry AndricHANDLE_TARGET_OPCODE_MARKER(GENERIC_OP_END, PRE_ISEL_GENERIC_OPCODE_END) 850