1//===- TargetInstrPredicate.td - ---------------------------*- tablegen -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file defines class MCInstPredicate and its subclasses.
10//
11// MCInstPredicate definitions are used by target scheduling models to describe
12// constraints on instructions.
13//
14// Here is an example of an MCInstPredicate definition in TableGen:
15//
16// def MCInstPredicateExample : CheckAll<[
17//    CheckOpcode<[BLR]>,
18//    CheckIsRegOperand<0>,
19//    CheckNot<CheckRegOperand<0, LR>>]>;
20//
21// The syntax for MCInstPredicate is declarative, and predicate definitions can
22// be composed together in order to generate more complex constraints.
23//
24// The `CheckAll` from the example defines a composition of three different
25// predicates.  Definition `MCInstPredicateExample` identifies instructions
26// whose opcode is BLR, and whose first operand is a register different from
27// register `LR`.
28//
29// Every MCInstPredicate class has a well-known semantic in tablegen. For
30// example, `CheckOpcode` is a special type of predicate used to describe a
31// constraint on the value of an instruction opcode.
32//
33// MCInstPredicate definitions are typically used by scheduling models to
34// construct MCSchedPredicate definitions (see the definition of class
35// MCSchedPredicate in llvm/Target/TargetSchedule.td).
36// In particular, an MCSchedPredicate can be used instead of a SchedPredicate
37// when defining the set of SchedReadVariant and SchedWriteVariant of a
38// processor scheduling model.
39//
40// The `MCInstPredicateExample` definition above is equivalent (and therefore
41// could replace) the following definition from a previous ExynosM3 model (see
42// AArch64SchedExynosM3.td):
43//
44// def M3BranchLinkFastPred  : SchedPredicate<[{
45//    MI->getOpcode() == AArch64::BLR &&
46//    MI->getOperand(0).isReg() &&
47//    MI->getOperand(0).getReg() != AArch64::LR}]>;
48//
49// The main advantage of using MCInstPredicate instead of SchedPredicate is
50// portability: users don't need to specify predicates in C++. As a consequence
51// of this, MCInstPredicate definitions are not bound to a particular
52// representation (i.e. MachineInstr vs MCInst).
53//
54// Tablegen backends know how to expand MCInstPredicate definitions into actual
55// C++ code that works on MachineInstr (and/or MCInst).
56//
57// Instances of class PredicateExpander (see utils/Tablegen/PredicateExpander.h)
58// know how to expand a predicate. For each MCInstPredicate class, there must be
59// an "expand" method available in the PredicateExpander interface.
60//
61// For example, a `CheckOpcode` predicate is expanded using method
62// `PredicateExpander::expandCheckOpcode()`.
63//
64// New MCInstPredicate classes must be added to this file. For each new class
65// XYZ, an "expandXYZ" method must be added to the PredicateExpander.
66//
67//===----------------------------------------------------------------------===//
68
69// Forward declarations.
70class Instruction;
71class SchedMachineModel;
72
73// A generic machine instruction predicate.
74class MCInstPredicate;
75
76class MCTrue  : MCInstPredicate;   // A predicate that always evaluates to True.
77class MCFalse : MCInstPredicate;   // A predicate that always evaluates to False.
78def TruePred  : MCTrue;
79def FalsePred : MCFalse;
80
81// A predicate used to negate the outcome of another predicate.
82// It allows to easily express "set difference" operations. For example, it
83// makes it easy to describe a check that tests if an opcode is not part of a
84// set of opcodes.
85class CheckNot<MCInstPredicate P> : MCInstPredicate {
86  MCInstPredicate Pred = P;
87}
88
89// This class is used as a building block to define predicates on instruction
90// operands. It is used to reference a specific machine operand.
91class MCOperandPredicate<int Index> : MCInstPredicate {
92  int OpIndex = Index;
93}
94
95// Return true if machine operand at position `Index` is a register operand.
96class CheckIsRegOperand<int Index> : MCOperandPredicate<Index>;
97
98// Return true if machine operand at position `Index` is a virtual register operand.
99class CheckIsVRegOperand<int Index> : MCOperandPredicate<Index>;
100
101// Return true if machine operand at position `Index` is not a virtual register operand.
102class CheckIsNotVRegOperand<int Index> : CheckNot<CheckIsVRegOperand<Index>>;
103
104// Return true if machine operand at position `Index` is an immediate operand.
105class CheckIsImmOperand<int Index> : MCOperandPredicate<Index>;
106
107// Check if machine operands at index `First` and index `Second` both reference
108// the same register.
109class CheckSameRegOperand<int First, int Second> : MCInstPredicate {
110  int FirstIndex = First;
111  int SecondIndex = Second;
112}
113
114// Base class for checks on register/immediate operands.
115// It allows users to define checks like:
116//    MyFunction(MI->getOperand(Index).getImm()) == Val;
117//
118// In the example above, `MyFunction` is a function that takes as input an
119// immediate operand value, and returns another value. Field `FunctionMapper` is
120// the name of the function to call on the operand value.
121class CheckOperandBase<int Index, string Fn = ""> : MCOperandPredicate<Index> {
122  string FunctionMapper = Fn;
123}
124
125// Check that the machine register operand at position `Index` references
126// register R. This predicate assumes that we already checked that the machine
127// operand at position `Index` is a register operand.
128class CheckRegOperand<int Index, Register R> : CheckOperandBase<Index> {
129  Register Reg = R;
130}
131
132// Check if register operand at index `Index` is the invalid register.
133class CheckInvalidRegOperand<int Index> : CheckOperandBase<Index>;
134
135// Return true if machine operand at position `Index` is a valid
136// register operand.
137class CheckValidRegOperand<int Index> :
138  CheckNot<CheckInvalidRegOperand<Index>>;
139
140// Check that the operand at position `Index` is immediate `Imm`.
141// If field `FunctionMapper` is a non-empty string, then function
142// `FunctionMapper` is applied to the operand value, and the return value is then
143// compared against `Imm`.
144class CheckImmOperand<int Index, int Imm> : CheckOperandBase<Index> {
145  int ImmVal = Imm;
146}
147
148// Similar to CheckImmOperand, however the immediate is not a literal number.
149// This is useful when we want to compare the value of an operand against an
150// enum value, and we know the actual integer value of that enum.
151class CheckImmOperand_s<int Index, string Value> : CheckOperandBase<Index> {
152  string ImmVal = Value;
153}
154
155// Check that the operand at position `Index` is less than `Imm`.
156// If field `FunctionMapper` is a non-empty string, then function
157// `FunctionMapper` is applied to the operand value, and the return value is then
158// compared against `Imm`.
159class CheckImmOperandLT<int Index, int Imm> : CheckOperandBase<Index> {
160  int ImmVal = Imm;
161}
162
163// Check that the operand at position `Index` is greater than `Imm`.
164// If field `FunctionMapper` is a non-empty string, then function
165// `FunctionMapper` is applied to the operand value, and the return value is then
166// compared against `Imm`.
167class CheckImmOperandGT<int Index, int Imm> : CheckOperandBase<Index> {
168  int ImmVal = Imm;
169}
170
171// Check that the operand at position `Index` is less than or equal to `Imm`.
172// If field `FunctionMapper` is a non-empty string, then function
173// `FunctionMapper` is applied to the operand value, and the return value is then
174// compared against `Imm`.
175class CheckImmOperandLE<int Index, int Imm> : CheckNot<CheckImmOperandGT<Index, Imm>>;
176
177// Check that the operand at position `Index` is greater than or equal to `Imm`.
178// If field `FunctionMapper` is a non-empty string, then function
179// `FunctionMapper` is applied to the operand value, and the return value is then
180// compared against `Imm`.
181class CheckImmOperandGE<int Index, int Imm> : CheckNot<CheckImmOperandLT<Index, Imm>>;
182
183// Expands to a call to `FunctionMapper` if field `FunctionMapper` is set.
184// Otherwise, it expands to a CheckNot<CheckInvalidRegOperand<Index>>.
185class CheckRegOperandSimple<int Index> : CheckOperandBase<Index>;
186
187// Expands to a call to `FunctionMapper` if field `FunctionMapper` is set.
188// Otherwise, it simply evaluates to TruePred.
189class CheckImmOperandSimple<int Index> : CheckOperandBase<Index>;
190
191// Check that the operand at position `Index` is immediate value zero.
192class CheckZeroOperand<int Index> : CheckImmOperand<Index, 0>;
193
194// Check that the instruction has exactly `Num` operands.
195class CheckNumOperands<int Num> : MCInstPredicate {
196  int NumOps = Num;
197}
198
199// Check that the instruction opcode is one of the opcodes in set `Opcodes`.
200// This is a simple set membership query. The easier way to check if an opcode
201// is not a member of the set is by using a `CheckNot<CheckOpcode<[...]>>`
202// sequence.
203class CheckOpcode<list<Instruction> Opcodes> : MCInstPredicate {
204  list<Instruction> ValidOpcodes = Opcodes;
205}
206
207// Check that the instruction opcode is a pseudo opcode member of the set
208// `Opcodes`.  This check is always expanded to "false" if we are generating
209// code for MCInst.
210class CheckPseudo<list<Instruction> Opcodes> : CheckOpcode<Opcodes>;
211
212// A non-portable predicate. Only to use as a last resort when a block of code
213// cannot possibly be converted in a declarative way using other MCInstPredicate
214// classes. This check is always expanded to "false" when generating code for
215// MCInst.
216class CheckNonPortable<string Code> : MCInstPredicate {
217  string CodeBlock = Code;
218}
219
220// A sequence of predicates. It is used as the base class for CheckAll, and
221// CheckAny. It allows to describe compositions of predicates.
222class CheckPredicateSequence<list<MCInstPredicate> Preds> : MCInstPredicate {
223  list<MCInstPredicate> Predicates = Preds;
224}
225
226// Check that all of the predicates in `Preds` evaluate to true.
227class CheckAll<list<MCInstPredicate> Sequence>
228    : CheckPredicateSequence<Sequence>;
229
230// Check that at least one of the predicates in `Preds` evaluates to true.
231class CheckAny<list<MCInstPredicate> Sequence>
232    : CheckPredicateSequence<Sequence>;
233
234// Check that the operand at position `Index` is in range [Start, End].
235// If field `FunctionMapper` is a non-empty string, then function
236// `FunctionMapper` is applied to the operand value, and the return value is then
237// compared against range [Start, End].
238class CheckImmOperandRange<int Index, int Start, int End>
239  : CheckAll<[CheckImmOperandGE<Index, Start>, CheckImmOperandLE<Index, End>]>;
240
241// Used to expand the body of a function predicate. See the definition of
242// TIIPredicate below.
243class MCStatement;
244
245// Expands to a return statement. The return expression is a boolean expression
246// described by a MCInstPredicate.
247class MCReturnStatement<MCInstPredicate predicate> : MCStatement {
248  MCInstPredicate Pred = predicate;
249}
250
251// Used to automatically construct cases of a switch statement where the switch
252// variable is an instruction opcode. There is a 'case' for every opcode in the
253// `opcodes` list, and each case is associated with MCStatement `caseStmt`.
254class MCOpcodeSwitchCase<list<Instruction> opcodes, MCStatement caseStmt> {
255  list<Instruction> Opcodes = opcodes;
256  MCStatement CaseStmt = caseStmt;
257}
258
259// Expands to a switch statement. The switch variable is an instruction opcode.
260// The auto-generated switch is populated by a number of cases based on the
261// `cases` list in input. A default case is automatically generated, and it
262// evaluates to `default`.
263class MCOpcodeSwitchStatement<list<MCOpcodeSwitchCase> cases,
264                              MCStatement default> : MCStatement {
265  list<MCOpcodeSwitchCase> Cases = cases;
266  MCStatement DefaultCase = default;
267}
268
269// Base class for function predicates.
270class FunctionPredicateBase<string name, MCStatement body> {
271  string FunctionName = name;
272  MCStatement Body = body;
273}
274
275// Check that a call to method `Name` in class "XXXInstrInfo" (where XXX is
276// the name of a target) returns true.
277//
278// TIIPredicate definitions are used to model calls to the target-specific
279// InstrInfo. A TIIPredicate is treated specially by the InstrInfoEmitter
280// tablegen backend, which will use it to automatically generate a definition in
281// the target specific `InstrInfo` class.
282//
283// There cannot be multiple TIIPredicate definitions with the same name for the
284// same target.
285class TIIPredicate<string Name, MCStatement body>
286    : FunctionPredicateBase<Name, body>, MCInstPredicate;
287
288// A function predicate that takes as input a machine instruction, and returns
289// a boolean value.
290//
291// This predicate is expanded into a function call by the PredicateExpander.
292// In particular, the PredicateExpander would either expand this predicate into
293// a call to `MCInstFn`, or into a call to`MachineInstrFn` depending on whether
294// it is lowering predicates for MCInst or MachineInstr.
295//
296// In this context, `MCInstFn` and `MachineInstrFn` are both function names.
297class CheckFunctionPredicate<string MCInstFn, string MachineInstrFn> : MCInstPredicate {
298  string MCInstFnName = MCInstFn;
299  string MachineInstrFnName = MachineInstrFn;
300}
301
302// Similar to CheckFunctionPredicate. However it assumes that MachineInstrFn is
303// a method in TargetInstrInfo, and MCInstrFn takes an extra pointer to
304// MCInstrInfo.
305//
306// It Expands to:
307//  - TIIPointer->MachineInstrFn(MI)
308//  - MCInstrFn(MI, MCII);
309class CheckFunctionPredicateWithTII<string MCInstFn, string MachineInstrFn, string
310TIIPointer = "TII"> : MCInstPredicate {
311  string MCInstFnName = MCInstFn;
312  string TIIPtrName = TIIPointer;
313  string MachineInstrFnName = MachineInstrFn;
314}
315
316// Used to classify machine instructions based on a machine instruction
317// predicate.
318//
319// Let IC be an InstructionEquivalenceClass definition, and MI a machine
320// instruction.  We say that MI belongs to the equivalence class described by IC
321// if and only if the following two conditions are met:
322//  a) MI's opcode is in the `opcodes` set, and
323//  b) `Predicate` evaluates to true when applied to MI.
324//
325// Instances of this class can be used by processor scheduling models to
326// describe instructions that have a property in common.  For example,
327// InstructionEquivalenceClass definitions can be used to identify the set of
328// dependency breaking instructions for a processor model.
329//
330// An (optional) list of operand indices can be used to further describe
331// properties that apply to instruction operands. For example, it can be used to
332// identify register uses of a dependency breaking instructions that are not in
333// a RAW dependency.
334class InstructionEquivalenceClass<list<Instruction> opcodes,
335                                  MCInstPredicate pred,
336                                  list<int> operands = []> {
337  list<Instruction> Opcodes = opcodes;
338  MCInstPredicate Predicate = pred;
339  list<int> OperandIndices = operands;
340}
341
342// Used by processor models to describe dependency breaking instructions.
343//
344// This is mainly an alias for InstructionEquivalenceClass.  Input operand
345// `BrokenDeps` identifies the set of "broken dependencies". There is one bit
346// per each implicit and explicit input operand.  An empty set of broken
347// dependencies means: "explicit input register operands are independent."
348class DepBreakingClass<list<Instruction> opcodes, MCInstPredicate pred,
349                       list<int> BrokenDeps = []>
350    : InstructionEquivalenceClass<opcodes, pred, BrokenDeps>;
351
352// A function descriptor used to describe the signature of a predicate methods
353// which will be expanded by the STIPredicateExpander into a tablegen'd
354// XXXGenSubtargetInfo class member definition (here, XXX is a target name).
355//
356// It describes the signature of a TargetSubtarget hook, as well as a few extra
357// properties. Examples of extra properties are:
358//  - The default return value for the auto-generate function hook.
359//  - A list of subtarget hooks (Delegates) that are called from this function.
360//
361class STIPredicateDecl<string name, MCInstPredicate default = FalsePred,
362                       bit overrides = true, bit expandForMC = true,
363                       bit updatesOpcodeMask = false,
364                       list<STIPredicateDecl> delegates = []> {
365  string Name = name;
366
367  MCInstPredicate DefaultReturnValue = default;
368
369  // True if this method is declared as virtual in class TargetSubtargetInfo.
370  bit OverridesBaseClassMember = overrides;
371
372  // True if we need an equivalent predicate function in the MC layer.
373  bit ExpandForMC = expandForMC;
374
375  // True if the autogenerated method has a extra in/out APInt param used as a
376  // mask of operands.
377  bit UpdatesOpcodeMask = updatesOpcodeMask;
378
379  // A list of STIPredicates used by this definition to delegate part of the
380  // computation. For example, STIPredicateFunction `isDependencyBreaking()`
381  // delegates to `isZeroIdiom()` part of its computation.
382  list<STIPredicateDecl> Delegates = delegates;
383}
384
385// A predicate function definition member of class `XXXGenSubtargetInfo`.
386//
387// If `Declaration.ExpandForMC` is true, then SubtargetEmitter
388// will also expand another definition of this method that accepts a MCInst.
389class STIPredicate<STIPredicateDecl declaration,
390                   list<InstructionEquivalenceClass> classes> {
391  STIPredicateDecl Declaration = declaration;
392  list<InstructionEquivalenceClass> Classes = classes;
393  SchedMachineModel SchedModel = ?;
394}
395
396// Convenience classes and definitions used by processor scheduling models to
397// describe dependency breaking instructions and move elimination candidates.
398let UpdatesOpcodeMask = true in {
399
400def IsZeroIdiomDecl : STIPredicateDecl<"isZeroIdiom">;
401
402let Delegates = [IsZeroIdiomDecl] in
403def IsDepBreakingDecl : STIPredicateDecl<"isDependencyBreaking">;
404
405} // UpdatesOpcodeMask
406
407def IsOptimizableRegisterMoveDecl
408    : STIPredicateDecl<"isOptimizableRegisterMove">;
409
410class IsZeroIdiomFunction<list<DepBreakingClass> classes>
411    : STIPredicate<IsZeroIdiomDecl, classes>;
412
413class IsDepBreakingFunction<list<DepBreakingClass> classes>
414    : STIPredicate<IsDepBreakingDecl, classes>;
415
416class IsOptimizableRegisterMove<list<InstructionEquivalenceClass> classes>
417    : STIPredicate<IsOptimizableRegisterMoveDecl, classes>;
418