1 //===-- X86TargetParser - Parser for X86 features ---------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements a target parser to recognise X86 hardware features.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_TARGETPARSER_X86TARGETPARSER_H
14 #define LLVM_TARGETPARSER_X86TARGETPARSER_H
15 
16 #include "llvm/ADT/ArrayRef.h"
17 #include "llvm/ADT/StringMap.h"
18 
19 namespace llvm {
20 template <typename T> class SmallVectorImpl;
21 class StringRef;
22 
23 namespace X86 {
24 
25 // This should be kept in sync with libcc/compiler-rt as its included by clang
26 // as a proxy for what's in libgcc/compiler-rt.
27 enum ProcessorVendors : unsigned {
28   VENDOR_DUMMY,
29 #define X86_VENDOR(ENUM, STRING) \
30   ENUM,
31 #include "llvm/TargetParser/X86TargetParser.def"
32   VENDOR_OTHER
33 };
34 
35 // This should be kept in sync with libcc/compiler-rt as its included by clang
36 // as a proxy for what's in libgcc/compiler-rt.
37 enum ProcessorTypes : unsigned {
38   CPU_TYPE_DUMMY,
39 #define X86_CPU_TYPE(ENUM, STRING) \
40   ENUM,
41 #include "llvm/TargetParser/X86TargetParser.def"
42   CPU_TYPE_MAX
43 };
44 
45 // This should be kept in sync with libcc/compiler-rt as its included by clang
46 // as a proxy for what's in libgcc/compiler-rt.
47 enum ProcessorSubtypes : unsigned {
48   CPU_SUBTYPE_DUMMY,
49 #define X86_CPU_SUBTYPE(ENUM, STRING) \
50   ENUM,
51 #include "llvm/TargetParser/X86TargetParser.def"
52   CPU_SUBTYPE_MAX
53 };
54 
55 // This should be kept in sync with libcc/compiler-rt as it should be used
56 // by clang as a proxy for what's in libgcc/compiler-rt.
57 enum ProcessorFeatures {
58 #define X86_FEATURE(ENUM, STRING) FEATURE_##ENUM,
59 #include "llvm/TargetParser/X86TargetParser.def"
60   CPU_FEATURE_MAX
61 };
62 
63 enum CPUKind {
64   CK_None,
65   CK_i386,
66   CK_i486,
67   CK_WinChipC6,
68   CK_WinChip2,
69   CK_C3,
70   CK_i586,
71   CK_Pentium,
72   CK_PentiumMMX,
73   CK_PentiumPro,
74   CK_i686,
75   CK_Pentium2,
76   CK_Pentium3,
77   CK_PentiumM,
78   CK_C3_2,
79   CK_Yonah,
80   CK_Pentium4,
81   CK_Prescott,
82   CK_Nocona,
83   CK_Core2,
84   CK_Penryn,
85   CK_Bonnell,
86   CK_Silvermont,
87   CK_Goldmont,
88   CK_GoldmontPlus,
89   CK_Tremont,
90   CK_Nehalem,
91   CK_Westmere,
92   CK_SandyBridge,
93   CK_IvyBridge,
94   CK_Haswell,
95   CK_Broadwell,
96   CK_SkylakeClient,
97   CK_SkylakeServer,
98   CK_Cascadelake,
99   CK_Cooperlake,
100   CK_Cannonlake,
101   CK_IcelakeClient,
102   CK_Rocketlake,
103   CK_IcelakeServer,
104   CK_Tigerlake,
105   CK_SapphireRapids,
106   CK_Alderlake,
107   CK_Raptorlake,
108   CK_Meteorlake,
109   CK_Sierraforest,
110   CK_Grandridge,
111   CK_Graniterapids,
112   CK_GraniterapidsD,
113   CK_Emeraldrapids,
114   CK_KNL,
115   CK_KNM,
116   CK_Lakemont,
117   CK_K6,
118   CK_K6_2,
119   CK_K6_3,
120   CK_Athlon,
121   CK_AthlonXP,
122   CK_K8,
123   CK_K8SSE3,
124   CK_AMDFAM10,
125   CK_BTVER1,
126   CK_BTVER2,
127   CK_BDVER1,
128   CK_BDVER2,
129   CK_BDVER3,
130   CK_BDVER4,
131   CK_ZNVER1,
132   CK_ZNVER2,
133   CK_ZNVER3,
134   CK_ZNVER4,
135   CK_x86_64,
136   CK_x86_64_v2,
137   CK_x86_64_v3,
138   CK_x86_64_v4,
139   CK_Geode,
140 };
141 
142 /// Parse \p CPU string into a CPUKind. Will only accept 64-bit capable CPUs if
143 /// \p Only64Bit is true.
144 CPUKind parseArchX86(StringRef CPU, bool Only64Bit = false);
145 CPUKind parseTuneCPU(StringRef CPU, bool Only64Bit = false);
146 
147 /// Provide a list of valid CPU names. If \p Only64Bit is true, the list will
148 /// only contain 64-bit capable CPUs.
149 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values,
150                           bool Only64Bit = false);
151 /// Provide a list of valid -mtune names.
152 void fillValidTuneCPUList(SmallVectorImpl<StringRef> &Values,
153                           bool Only64Bit = false);
154 
155 /// Get the key feature prioritizing target multiversioning.
156 ProcessorFeatures getKeyFeature(CPUKind Kind);
157 
158 /// Fill in the features that \p CPU supports into \p Features.
159 /// "+" will be append in front of each feature if IfNeedPlus is true.
160 void getFeaturesForCPU(StringRef CPU, SmallVectorImpl<StringRef> &Features,
161                        bool IfNeedPlus = false);
162 
163 /// Set or clear entries in \p Features that are implied to be enabled/disabled
164 /// by the provided \p Feature.
165 void updateImpliedFeatures(StringRef Feature, bool Enabled,
166                            StringMap<bool> &Features);
167 
168 char getCPUDispatchMangling(StringRef Name);
169 bool validateCPUSpecificCPUDispatch(StringRef Name);
170 uint64_t getCpuSupportsMask(ArrayRef<StringRef> FeatureStrs);
171 unsigned getFeaturePriority(ProcessorFeatures Feat);
172 
173 } // namespace X86
174 } // namespace llvm
175 
176 #endif
177