1*fe6060f1SDimitry Andric//===- llvm/TextAPI/Architecture.def - Architecture -----------------------===// 2*fe6060f1SDimitry Andric// 3*fe6060f1SDimitry Andric// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4*fe6060f1SDimitry Andric// See https://llvm.org/LICENSE.txt for license information. 5*fe6060f1SDimitry Andric// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6*fe6060f1SDimitry Andric// 7*fe6060f1SDimitry Andric//===----------------------------------------------------------------------===// 8*fe6060f1SDimitry Andric 9*fe6060f1SDimitry Andric#ifndef ARCHINFO 10*fe6060f1SDimitry Andric#define ARCHINFO(arch) 11*fe6060f1SDimitry Andric#endif 12*fe6060f1SDimitry Andric 13*fe6060f1SDimitry Andric/// 14*fe6060f1SDimitry Andric/// X86 architectures sorted by cpu type and sub type id. 15*fe6060f1SDimitry Andric/// 16*fe6060f1SDimitry AndricARCHINFO(i386, MachO::CPU_TYPE_I386, MachO::CPU_SUBTYPE_I386_ALL, 32) 17*fe6060f1SDimitry AndricARCHINFO(x86_64, MachO::CPU_TYPE_X86_64, MachO::CPU_SUBTYPE_X86_64_ALL, 64) 18*fe6060f1SDimitry AndricARCHINFO(x86_64h, MachO::CPU_TYPE_X86_64, MachO::CPU_SUBTYPE_X86_64_H, 64) 19*fe6060f1SDimitry Andric 20*fe6060f1SDimitry Andric 21*fe6060f1SDimitry Andric/// 22*fe6060f1SDimitry Andric/// ARM architectures sorted by cpu sub type id. 23*fe6060f1SDimitry Andric/// 24*fe6060f1SDimitry AndricARCHINFO(armv4t, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V4T, 32) 25*fe6060f1SDimitry AndricARCHINFO(armv6, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V6, 32) 26*fe6060f1SDimitry AndricARCHINFO(armv5, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V5TEJ, 32) 27*fe6060f1SDimitry AndricARCHINFO(armv7, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V7, 32) 28*fe6060f1SDimitry AndricARCHINFO(armv7s, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V7S, 32) 29*fe6060f1SDimitry AndricARCHINFO(armv7k, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V7K, 32) 30*fe6060f1SDimitry AndricARCHINFO(armv6m, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V6M, 32) 31*fe6060f1SDimitry AndricARCHINFO(armv7m, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V7M, 32) 32*fe6060f1SDimitry AndricARCHINFO(armv7em, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V7EM, 32) 33*fe6060f1SDimitry Andric 34*fe6060f1SDimitry Andric 35*fe6060f1SDimitry Andric/// 36*fe6060f1SDimitry Andric/// ARM64 architectures sorted by cpu sub type id. 37*fe6060f1SDimitry Andric/// 38*fe6060f1SDimitry AndricARCHINFO(arm64, MachO::CPU_TYPE_ARM64, MachO::CPU_SUBTYPE_ARM64_ALL, 64) 39*fe6060f1SDimitry AndricARCHINFO(arm64e, MachO::CPU_TYPE_ARM64, MachO::CPU_SUBTYPE_ARM64E, 64) 40*fe6060f1SDimitry Andric 41*fe6060f1SDimitry Andric 42*fe6060f1SDimitry Andric/// 43*fe6060f1SDimitry Andric/// ARM64_32 architectures sorted by cpu sub type id 44*fe6060f1SDimitry Andric/// 45*fe6060f1SDimitry AndricARCHINFO(arm64_32, MachO::CPU_TYPE_ARM64_32, MachO::CPU_SUBTYPE_ARM64_32_V8, 32) 46