1 //===- LiveDebugVariables.cpp - Tracking debug info variables -------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the LiveDebugVariables analysis.
10 //
11 // Remove all DBG_VALUE instructions referencing virtual registers and replace
12 // them with a data structure tracking where live user variables are kept - in a
13 // virtual register or in a stack slot.
14 //
15 // Allow the data structure to be updated during register allocation when values
16 // are moved between registers and stack slots. Finally emit new DBG_VALUE
17 // instructions after register allocation is complete.
18 //
19 //===----------------------------------------------------------------------===//
20 
21 #include "LiveDebugVariables.h"
22 #include "llvm/ADT/ArrayRef.h"
23 #include "llvm/ADT/DenseMap.h"
24 #include "llvm/ADT/IntervalMap.h"
25 #include "llvm/ADT/MapVector.h"
26 #include "llvm/ADT/STLExtras.h"
27 #include "llvm/ADT/SmallSet.h"
28 #include "llvm/ADT/SmallVector.h"
29 #include "llvm/ADT/Statistic.h"
30 #include "llvm/ADT/StringRef.h"
31 #include "llvm/BinaryFormat/Dwarf.h"
32 #include "llvm/CodeGen/LexicalScopes.h"
33 #include "llvm/CodeGen/LiveInterval.h"
34 #include "llvm/CodeGen/LiveIntervals.h"
35 #include "llvm/CodeGen/MachineBasicBlock.h"
36 #include "llvm/CodeGen/MachineDominators.h"
37 #include "llvm/CodeGen/MachineFunction.h"
38 #include "llvm/CodeGen/MachineInstr.h"
39 #include "llvm/CodeGen/MachineInstrBuilder.h"
40 #include "llvm/CodeGen/MachineOperand.h"
41 #include "llvm/CodeGen/MachineRegisterInfo.h"
42 #include "llvm/CodeGen/SlotIndexes.h"
43 #include "llvm/CodeGen/TargetInstrInfo.h"
44 #include "llvm/CodeGen/TargetOpcodes.h"
45 #include "llvm/CodeGen/TargetRegisterInfo.h"
46 #include "llvm/CodeGen/TargetSubtargetInfo.h"
47 #include "llvm/CodeGen/VirtRegMap.h"
48 #include "llvm/Config/llvm-config.h"
49 #include "llvm/IR/DebugInfoMetadata.h"
50 #include "llvm/IR/DebugLoc.h"
51 #include "llvm/IR/Function.h"
52 #include "llvm/InitializePasses.h"
53 #include "llvm/Pass.h"
54 #include "llvm/Support/Casting.h"
55 #include "llvm/Support/CommandLine.h"
56 #include "llvm/Support/Debug.h"
57 #include "llvm/Support/raw_ostream.h"
58 #include <algorithm>
59 #include <cassert>
60 #include <iterator>
61 #include <memory>
62 #include <utility>
63 
64 using namespace llvm;
65 
66 #define DEBUG_TYPE "livedebugvars"
67 
68 static cl::opt<bool>
69 EnableLDV("live-debug-variables", cl::init(true),
70           cl::desc("Enable the live debug variables pass"), cl::Hidden);
71 
72 STATISTIC(NumInsertedDebugValues, "Number of DBG_VALUEs inserted");
73 STATISTIC(NumInsertedDebugLabels, "Number of DBG_LABELs inserted");
74 
75 char LiveDebugVariables::ID = 0;
76 
77 INITIALIZE_PASS_BEGIN(LiveDebugVariables, DEBUG_TYPE,
78                 "Debug Variable Analysis", false, false)
79 INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
80 INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
81 INITIALIZE_PASS_END(LiveDebugVariables, DEBUG_TYPE,
82                 "Debug Variable Analysis", false, false)
83 
84 void LiveDebugVariables::getAnalysisUsage(AnalysisUsage &AU) const {
85   AU.addRequired<MachineDominatorTree>();
86   AU.addRequiredTransitive<LiveIntervals>();
87   AU.setPreservesAll();
88   MachineFunctionPass::getAnalysisUsage(AU);
89 }
90 
91 LiveDebugVariables::LiveDebugVariables() : MachineFunctionPass(ID) {
92   initializeLiveDebugVariablesPass(*PassRegistry::getPassRegistry());
93 }
94 
95 enum : unsigned { UndefLocNo = ~0U };
96 
97 namespace {
98 /// Describes a debug variable value by location number and expression along
99 /// with some flags about the original usage of the location.
100 class DbgVariableValue {
101 public:
102   DbgVariableValue(ArrayRef<unsigned> NewLocs, bool WasIndirect, bool WasList,
103                    const DIExpression &Expr)
104       : WasIndirect(WasIndirect), WasList(WasList), Expression(&Expr) {
105     assert(!(WasIndirect && WasList) &&
106            "DBG_VALUE_LISTs should not be indirect.");
107     SmallVector<unsigned> LocNoVec;
108     for (unsigned LocNo : NewLocs) {
109       auto It = find(LocNoVec, LocNo);
110       if (It == LocNoVec.end())
111         LocNoVec.push_back(LocNo);
112       else {
113         // Loc duplicates an element in LocNos; replace references to Op
114         // with references to the duplicating element.
115         unsigned OpIdx = LocNoVec.size();
116         unsigned DuplicatingIdx = std::distance(LocNoVec.begin(), It);
117         Expression =
118             DIExpression::replaceArg(Expression, OpIdx, DuplicatingIdx);
119       }
120     }
121     // FIXME: Debug values referencing 64+ unique machine locations are rare and
122     // currently unsupported for performance reasons. If we can verify that
123     // performance is acceptable for such debug values, we can increase the
124     // bit-width of LocNoCount to 14 to enable up to 16384 unique machine
125     // locations. We will also need to verify that this does not cause issues
126     // with LiveDebugVariables' use of IntervalMap.
127     if (LocNoVec.size() < 64) {
128       LocNoCount = LocNoVec.size();
129       if (LocNoCount > 0) {
130         LocNos = std::make_unique<unsigned[]>(LocNoCount);
131         std::copy(LocNoVec.begin(), LocNoVec.end(), loc_nos_begin());
132       }
133     } else {
134       LLVM_DEBUG(dbgs() << "Found debug value with 64+ unique machine "
135                            "locations, dropping...\n");
136       LocNoCount = 1;
137       // Turn this into an undef debug value list; right now, the simplest form
138       // of this is an expression with one arg, and an undef debug operand.
139       Expression =
140           DIExpression::get(Expr.getContext(), {dwarf::DW_OP_LLVM_arg, 0,
141                                                 dwarf::DW_OP_stack_value});
142       if (auto FragmentInfoOpt = Expr.getFragmentInfo())
143         Expression = *DIExpression::createFragmentExpression(
144             Expression, FragmentInfoOpt->OffsetInBits,
145             FragmentInfoOpt->SizeInBits);
146       LocNos = std::make_unique<unsigned[]>(LocNoCount);
147       LocNos[0] = UndefLocNo;
148     }
149   }
150 
151   DbgVariableValue() : LocNoCount(0), WasIndirect(false), WasList(false) {}
152   DbgVariableValue(const DbgVariableValue &Other)
153       : LocNoCount(Other.LocNoCount), WasIndirect(Other.getWasIndirect()),
154         WasList(Other.getWasList()), Expression(Other.getExpression()) {
155     if (Other.getLocNoCount()) {
156       LocNos.reset(new unsigned[Other.getLocNoCount()]);
157       std::copy(Other.loc_nos_begin(), Other.loc_nos_end(), loc_nos_begin());
158     }
159   }
160 
161   DbgVariableValue &operator=(const DbgVariableValue &Other) {
162     if (this == &Other)
163       return *this;
164     if (Other.getLocNoCount()) {
165       LocNos.reset(new unsigned[Other.getLocNoCount()]);
166       std::copy(Other.loc_nos_begin(), Other.loc_nos_end(), loc_nos_begin());
167     } else {
168       LocNos.release();
169     }
170     LocNoCount = Other.getLocNoCount();
171     WasIndirect = Other.getWasIndirect();
172     WasList = Other.getWasList();
173     Expression = Other.getExpression();
174     return *this;
175   }
176 
177   const DIExpression *getExpression() const { return Expression; }
178   uint8_t getLocNoCount() const { return LocNoCount; }
179   bool containsLocNo(unsigned LocNo) const {
180     return is_contained(loc_nos(), LocNo);
181   }
182   bool getWasIndirect() const { return WasIndirect; }
183   bool getWasList() const { return WasList; }
184   bool isUndef() const { return LocNoCount == 0 || containsLocNo(UndefLocNo); }
185 
186   DbgVariableValue decrementLocNosAfterPivot(unsigned Pivot) const {
187     SmallVector<unsigned, 4> NewLocNos;
188     for (unsigned LocNo : loc_nos())
189       NewLocNos.push_back(LocNo != UndefLocNo && LocNo > Pivot ? LocNo - 1
190                                                                : LocNo);
191     return DbgVariableValue(NewLocNos, WasIndirect, WasList, *Expression);
192   }
193 
194   DbgVariableValue remapLocNos(ArrayRef<unsigned> LocNoMap) const {
195     SmallVector<unsigned> NewLocNos;
196     for (unsigned LocNo : loc_nos())
197       // Undef values don't exist in locations (and thus not in LocNoMap
198       // either) so skip over them. See getLocationNo().
199       NewLocNos.push_back(LocNo == UndefLocNo ? UndefLocNo : LocNoMap[LocNo]);
200     return DbgVariableValue(NewLocNos, WasIndirect, WasList, *Expression);
201   }
202 
203   DbgVariableValue changeLocNo(unsigned OldLocNo, unsigned NewLocNo) const {
204     SmallVector<unsigned> NewLocNos;
205     NewLocNos.assign(loc_nos_begin(), loc_nos_end());
206     auto OldLocIt = find(NewLocNos, OldLocNo);
207     assert(OldLocIt != NewLocNos.end() && "Old location must be present.");
208     *OldLocIt = NewLocNo;
209     return DbgVariableValue(NewLocNos, WasIndirect, WasList, *Expression);
210   }
211 
212   bool hasLocNoGreaterThan(unsigned LocNo) const {
213     return any_of(loc_nos(),
214                   [LocNo](unsigned ThisLocNo) { return ThisLocNo > LocNo; });
215   }
216 
217   void printLocNos(llvm::raw_ostream &OS) const {
218     for (const unsigned &Loc : loc_nos())
219       OS << (&Loc == loc_nos_begin() ? " " : ", ") << Loc;
220   }
221 
222   friend inline bool operator==(const DbgVariableValue &LHS,
223                                 const DbgVariableValue &RHS) {
224     if (std::tie(LHS.LocNoCount, LHS.WasIndirect, LHS.WasList,
225                  LHS.Expression) !=
226         std::tie(RHS.LocNoCount, RHS.WasIndirect, RHS.WasList, RHS.Expression))
227       return false;
228     return std::equal(LHS.loc_nos_begin(), LHS.loc_nos_end(),
229                       RHS.loc_nos_begin());
230   }
231 
232   friend inline bool operator!=(const DbgVariableValue &LHS,
233                                 const DbgVariableValue &RHS) {
234     return !(LHS == RHS);
235   }
236 
237   unsigned *loc_nos_begin() { return LocNos.get(); }
238   const unsigned *loc_nos_begin() const { return LocNos.get(); }
239   unsigned *loc_nos_end() { return LocNos.get() + LocNoCount; }
240   const unsigned *loc_nos_end() const { return LocNos.get() + LocNoCount; }
241   ArrayRef<unsigned> loc_nos() const {
242     return ArrayRef<unsigned>(LocNos.get(), LocNoCount);
243   }
244 
245 private:
246   // IntervalMap requires the value object to be very small, to the extent
247   // that we do not have enough room for an std::vector. Using a C-style array
248   // (with a unique_ptr wrapper for convenience) allows us to optimize for this
249   // specific case by packing the array size into only 6 bits (it is highly
250   // unlikely that any debug value will need 64+ locations).
251   std::unique_ptr<unsigned[]> LocNos;
252   uint8_t LocNoCount : 6;
253   bool WasIndirect : 1;
254   bool WasList : 1;
255   const DIExpression *Expression = nullptr;
256 };
257 } // namespace
258 
259 /// Map of where a user value is live to that value.
260 using LocMap = IntervalMap<SlotIndex, DbgVariableValue, 4>;
261 
262 /// Map of stack slot offsets for spilled locations.
263 /// Non-spilled locations are not added to the map.
264 using SpillOffsetMap = DenseMap<unsigned, unsigned>;
265 
266 /// Cache to save the location where it can be used as the starting
267 /// position as input for calling MachineBasicBlock::SkipPHIsLabelsAndDebug.
268 /// This is to prevent MachineBasicBlock::SkipPHIsLabelsAndDebug from
269 /// repeatedly searching the same set of PHIs/Labels/Debug instructions
270 /// if it is called many times for the same block.
271 using BlockSkipInstsMap =
272     DenseMap<MachineBasicBlock *, MachineBasicBlock::iterator>;
273 
274 namespace {
275 
276 class LDVImpl;
277 
278 /// A user value is a part of a debug info user variable.
279 ///
280 /// A DBG_VALUE instruction notes that (a sub-register of) a virtual register
281 /// holds part of a user variable. The part is identified by a byte offset.
282 ///
283 /// UserValues are grouped into equivalence classes for easier searching. Two
284 /// user values are related if they are held by the same virtual register. The
285 /// equivalence class is the transitive closure of that relation.
286 class UserValue {
287   const DILocalVariable *Variable; ///< The debug info variable we are part of.
288   /// The part of the variable we describe.
289   const Optional<DIExpression::FragmentInfo> Fragment;
290   DebugLoc dl;            ///< The debug location for the variable. This is
291                           ///< used by dwarf writer to find lexical scope.
292   UserValue *leader;      ///< Equivalence class leader.
293   UserValue *next = nullptr; ///< Next value in equivalence class, or null.
294 
295   /// Numbered locations referenced by locmap.
296   SmallVector<MachineOperand, 4> locations;
297 
298   /// Map of slot indices where this value is live.
299   LocMap locInts;
300 
301   /// Set of interval start indexes that have been trimmed to the
302   /// lexical scope.
303   SmallSet<SlotIndex, 2> trimmedDefs;
304 
305   /// Insert a DBG_VALUE into MBB at Idx for DbgValue.
306   void insertDebugValue(MachineBasicBlock *MBB, SlotIndex StartIdx,
307                         SlotIndex StopIdx, DbgVariableValue DbgValue,
308                         ArrayRef<bool> LocSpills,
309                         ArrayRef<unsigned> SpillOffsets, LiveIntervals &LIS,
310                         const TargetInstrInfo &TII,
311                         const TargetRegisterInfo &TRI,
312                         BlockSkipInstsMap &BBSkipInstsMap);
313 
314   /// Replace OldLocNo ranges with NewRegs ranges where NewRegs
315   /// is live. Returns true if any changes were made.
316   bool splitLocation(unsigned OldLocNo, ArrayRef<Register> NewRegs,
317                      LiveIntervals &LIS);
318 
319 public:
320   /// Create a new UserValue.
321   UserValue(const DILocalVariable *var,
322             Optional<DIExpression::FragmentInfo> Fragment, DebugLoc L,
323             LocMap::Allocator &alloc)
324       : Variable(var), Fragment(Fragment), dl(std::move(L)), leader(this),
325         locInts(alloc) {}
326 
327   /// Get the leader of this value's equivalence class.
328   UserValue *getLeader() {
329     UserValue *l = leader;
330     while (l != l->leader)
331       l = l->leader;
332     return leader = l;
333   }
334 
335   /// Return the next UserValue in the equivalence class.
336   UserValue *getNext() const { return next; }
337 
338   /// Merge equivalence classes.
339   static UserValue *merge(UserValue *L1, UserValue *L2) {
340     L2 = L2->getLeader();
341     if (!L1)
342       return L2;
343     L1 = L1->getLeader();
344     if (L1 == L2)
345       return L1;
346     // Splice L2 before L1's members.
347     UserValue *End = L2;
348     while (End->next) {
349       End->leader = L1;
350       End = End->next;
351     }
352     End->leader = L1;
353     End->next = L1->next;
354     L1->next = L2;
355     return L1;
356   }
357 
358   /// Return the location number that matches Loc.
359   ///
360   /// For undef values we always return location number UndefLocNo without
361   /// inserting anything in locations. Since locations is a vector and the
362   /// location number is the position in the vector and UndefLocNo is ~0,
363   /// we would need a very big vector to put the value at the right position.
364   unsigned getLocationNo(const MachineOperand &LocMO) {
365     if (LocMO.isReg()) {
366       if (LocMO.getReg() == 0)
367         return UndefLocNo;
368       // For register locations we dont care about use/def and other flags.
369       for (unsigned i = 0, e = locations.size(); i != e; ++i)
370         if (locations[i].isReg() &&
371             locations[i].getReg() == LocMO.getReg() &&
372             locations[i].getSubReg() == LocMO.getSubReg())
373           return i;
374     } else
375       for (unsigned i = 0, e = locations.size(); i != e; ++i)
376         if (LocMO.isIdenticalTo(locations[i]))
377           return i;
378     locations.push_back(LocMO);
379     // We are storing a MachineOperand outside a MachineInstr.
380     locations.back().clearParent();
381     // Don't store def operands.
382     if (locations.back().isReg()) {
383       if (locations.back().isDef())
384         locations.back().setIsDead(false);
385       locations.back().setIsUse();
386     }
387     return locations.size() - 1;
388   }
389 
390   /// Remove (recycle) a location number. If \p LocNo still is used by the
391   /// locInts nothing is done.
392   void removeLocationIfUnused(unsigned LocNo) {
393     // Bail out if LocNo still is used.
394     for (LocMap::const_iterator I = locInts.begin(); I.valid(); ++I) {
395       const DbgVariableValue &DbgValue = I.value();
396       if (DbgValue.containsLocNo(LocNo))
397         return;
398     }
399     // Remove the entry in the locations vector, and adjust all references to
400     // location numbers above the removed entry.
401     locations.erase(locations.begin() + LocNo);
402     for (LocMap::iterator I = locInts.begin(); I.valid(); ++I) {
403       const DbgVariableValue &DbgValue = I.value();
404       if (DbgValue.hasLocNoGreaterThan(LocNo))
405         I.setValueUnchecked(DbgValue.decrementLocNosAfterPivot(LocNo));
406     }
407   }
408 
409   /// Ensure that all virtual register locations are mapped.
410   void mapVirtRegs(LDVImpl *LDV);
411 
412   /// Add a definition point to this user value.
413   void addDef(SlotIndex Idx, ArrayRef<MachineOperand> LocMOs, bool IsIndirect,
414               bool IsList, const DIExpression &Expr) {
415     SmallVector<unsigned> Locs;
416     for (const MachineOperand &Op : LocMOs)
417       Locs.push_back(getLocationNo(Op));
418     DbgVariableValue DbgValue(Locs, IsIndirect, IsList, Expr);
419     // Add a singular (Idx,Idx) -> value mapping.
420     LocMap::iterator I = locInts.find(Idx);
421     if (!I.valid() || I.start() != Idx)
422       I.insert(Idx, Idx.getNextSlot(), std::move(DbgValue));
423     else
424       // A later DBG_VALUE at the same SlotIndex overrides the old location.
425       I.setValue(std::move(DbgValue));
426   }
427 
428   /// Extend the current definition as far as possible down.
429   ///
430   /// Stop when meeting an existing def or when leaving the live
431   /// range of VNI. End points where VNI is no longer live are added to Kills.
432   ///
433   /// We only propagate DBG_VALUES locally here. LiveDebugValues performs a
434   /// data-flow analysis to propagate them beyond basic block boundaries.
435   ///
436   /// \param Idx Starting point for the definition.
437   /// \param DbgValue value to propagate.
438   /// \param LiveIntervalInfo For each location number key in this map,
439   /// restricts liveness to where the LiveRange has the value equal to the\
440   /// VNInfo.
441   /// \param [out] Kills Append end points of VNI's live range to Kills.
442   /// \param LIS Live intervals analysis.
443   void extendDef(SlotIndex Idx, DbgVariableValue DbgValue,
444                  SmallDenseMap<unsigned, std::pair<LiveRange *, const VNInfo *>>
445                      &LiveIntervalInfo,
446                  Optional<std::pair<SlotIndex, SmallVector<unsigned>>> &Kills,
447                  LiveIntervals &LIS);
448 
449   /// The value in LI may be copies to other registers. Determine if
450   /// any of the copies are available at the kill points, and add defs if
451   /// possible.
452   ///
453   /// \param DbgValue Location number of LI->reg, and DIExpression.
454   /// \param LocIntervals Scan for copies of the value for each location in the
455   /// corresponding LiveInterval->reg.
456   /// \param KilledAt The point where the range of DbgValue could be extended.
457   /// \param [in,out] NewDefs Append (Idx, DbgValue) of inserted defs here.
458   void addDefsFromCopies(
459       DbgVariableValue DbgValue,
460       SmallVectorImpl<std::pair<unsigned, LiveInterval *>> &LocIntervals,
461       SlotIndex KilledAt,
462       SmallVectorImpl<std::pair<SlotIndex, DbgVariableValue>> &NewDefs,
463       MachineRegisterInfo &MRI, LiveIntervals &LIS);
464 
465   /// Compute the live intervals of all locations after collecting all their
466   /// def points.
467   void computeIntervals(MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI,
468                         LiveIntervals &LIS, LexicalScopes &LS);
469 
470   /// Replace OldReg ranges with NewRegs ranges where NewRegs is
471   /// live. Returns true if any changes were made.
472   bool splitRegister(Register OldReg, ArrayRef<Register> NewRegs,
473                      LiveIntervals &LIS);
474 
475   /// Rewrite virtual register locations according to the provided virtual
476   /// register map. Record the stack slot offsets for the locations that
477   /// were spilled.
478   void rewriteLocations(VirtRegMap &VRM, const MachineFunction &MF,
479                         const TargetInstrInfo &TII,
480                         const TargetRegisterInfo &TRI,
481                         SpillOffsetMap &SpillOffsets);
482 
483   /// Recreate DBG_VALUE instruction from data structures.
484   void emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS,
485                        const TargetInstrInfo &TII,
486                        const TargetRegisterInfo &TRI,
487                        const SpillOffsetMap &SpillOffsets,
488                        BlockSkipInstsMap &BBSkipInstsMap);
489 
490   /// Return DebugLoc of this UserValue.
491   const DebugLoc &getDebugLoc() { return dl; }
492 
493   void print(raw_ostream &, const TargetRegisterInfo *);
494 };
495 
496 /// A user label is a part of a debug info user label.
497 class UserLabel {
498   const DILabel *Label; ///< The debug info label we are part of.
499   DebugLoc dl;          ///< The debug location for the label. This is
500                         ///< used by dwarf writer to find lexical scope.
501   SlotIndex loc;        ///< Slot used by the debug label.
502 
503   /// Insert a DBG_LABEL into MBB at Idx.
504   void insertDebugLabel(MachineBasicBlock *MBB, SlotIndex Idx,
505                         LiveIntervals &LIS, const TargetInstrInfo &TII,
506                         BlockSkipInstsMap &BBSkipInstsMap);
507 
508 public:
509   /// Create a new UserLabel.
510   UserLabel(const DILabel *label, DebugLoc L, SlotIndex Idx)
511       : Label(label), dl(std::move(L)), loc(Idx) {}
512 
513   /// Does this UserLabel match the parameters?
514   bool matches(const DILabel *L, const DILocation *IA,
515              const SlotIndex Index) const {
516     return Label == L && dl->getInlinedAt() == IA && loc == Index;
517   }
518 
519   /// Recreate DBG_LABEL instruction from data structures.
520   void emitDebugLabel(LiveIntervals &LIS, const TargetInstrInfo &TII,
521                       BlockSkipInstsMap &BBSkipInstsMap);
522 
523   /// Return DebugLoc of this UserLabel.
524   const DebugLoc &getDebugLoc() { return dl; }
525 
526   void print(raw_ostream &, const TargetRegisterInfo *);
527 };
528 
529 /// Implementation of the LiveDebugVariables pass.
530 class LDVImpl {
531   LiveDebugVariables &pass;
532   LocMap::Allocator allocator;
533   MachineFunction *MF = nullptr;
534   LiveIntervals *LIS;
535   const TargetRegisterInfo *TRI;
536 
537   /// Position and VReg of a PHI instruction during register allocation.
538   struct PHIValPos {
539     SlotIndex SI;    /// Slot where this PHI occurs.
540     Register Reg;    /// VReg this PHI occurs in.
541     unsigned SubReg; /// Qualifiying subregister for Reg.
542   };
543 
544   /// Map from debug instruction number to PHI position during allocation.
545   std::map<unsigned, PHIValPos> PHIValToPos;
546   /// Index of, for each VReg, which debug instruction numbers and corresponding
547   /// PHIs are sensitive to splitting. Each VReg may have multiple PHI defs,
548   /// at different positions.
549   DenseMap<Register, std::vector<unsigned>> RegToPHIIdx;
550 
551   /// Record for any debug instructions unlinked from their blocks during
552   /// regalloc. Stores the instr and it's location, so that they can be
553   /// re-inserted after regalloc is over.
554   struct InstrPos {
555     MachineInstr *MI;       ///< Debug instruction, unlinked from it's block.
556     SlotIndex Idx;          ///< Slot position where MI should be re-inserted.
557     MachineBasicBlock *MBB; ///< Block that MI was in.
558   };
559 
560   /// Collection of stored debug instructions, preserved until after regalloc.
561   SmallVector<InstrPos, 32> StashedDebugInstrs;
562 
563   /// Whether emitDebugValues is called.
564   bool EmitDone = false;
565 
566   /// Whether the machine function is modified during the pass.
567   bool ModifiedMF = false;
568 
569   /// All allocated UserValue instances.
570   SmallVector<std::unique_ptr<UserValue>, 8> userValues;
571 
572   /// All allocated UserLabel instances.
573   SmallVector<std::unique_ptr<UserLabel>, 2> userLabels;
574 
575   /// Map virtual register to eq class leader.
576   using VRMap = DenseMap<unsigned, UserValue *>;
577   VRMap virtRegToEqClass;
578 
579   /// Map to find existing UserValue instances.
580   using UVMap = DenseMap<DebugVariable, UserValue *>;
581   UVMap userVarMap;
582 
583   /// Find or create a UserValue.
584   UserValue *getUserValue(const DILocalVariable *Var,
585                           Optional<DIExpression::FragmentInfo> Fragment,
586                           const DebugLoc &DL);
587 
588   /// Find the EC leader for VirtReg or null.
589   UserValue *lookupVirtReg(Register VirtReg);
590 
591   /// Add DBG_VALUE instruction to our maps.
592   ///
593   /// \param MI DBG_VALUE instruction
594   /// \param Idx Last valid SLotIndex before instruction.
595   ///
596   /// \returns True if the DBG_VALUE instruction should be deleted.
597   bool handleDebugValue(MachineInstr &MI, SlotIndex Idx);
598 
599   /// Track variable location debug instructions while using the instruction
600   /// referencing implementation. Such debug instructions do not need to be
601   /// updated during regalloc because they identify instructions rather than
602   /// register locations. However, they needs to be removed from the
603   /// MachineFunction during regalloc, then re-inserted later, to avoid
604   /// disrupting the allocator.
605   ///
606   /// \param MI Any DBG_VALUE / DBG_INSTR_REF / DBG_PHI instruction
607   /// \param Idx Last valid SlotIndex before instruction
608   ///
609   /// \returns Iterator to continue processing from after unlinking.
610   MachineBasicBlock::iterator handleDebugInstr(MachineInstr &MI, SlotIndex Idx);
611 
612   /// Add DBG_LABEL instruction to UserLabel.
613   ///
614   /// \param MI DBG_LABEL instruction
615   /// \param Idx Last valid SlotIndex before instruction.
616   ///
617   /// \returns True if the DBG_LABEL instruction should be deleted.
618   bool handleDebugLabel(MachineInstr &MI, SlotIndex Idx);
619 
620   /// Collect and erase all DBG_VALUE instructions, adding a UserValue def
621   /// for each instruction.
622   ///
623   /// \param mf MachineFunction to be scanned.
624   /// \param InstrRef Whether to operate in instruction referencing mode. If
625   ///        true, most of LiveDebugVariables doesn't run.
626   ///
627   /// \returns True if any debug values were found.
628   bool collectDebugValues(MachineFunction &mf, bool InstrRef);
629 
630   /// Compute the live intervals of all user values after collecting all
631   /// their def points.
632   void computeIntervals();
633 
634 public:
635   LDVImpl(LiveDebugVariables *ps) : pass(*ps) {}
636 
637   bool runOnMachineFunction(MachineFunction &mf, bool InstrRef);
638 
639   /// Release all memory.
640   void clear() {
641     MF = nullptr;
642     PHIValToPos.clear();
643     RegToPHIIdx.clear();
644     StashedDebugInstrs.clear();
645     userValues.clear();
646     userLabels.clear();
647     virtRegToEqClass.clear();
648     userVarMap.clear();
649     // Make sure we call emitDebugValues if the machine function was modified.
650     assert((!ModifiedMF || EmitDone) &&
651            "Dbg values are not emitted in LDV");
652     EmitDone = false;
653     ModifiedMF = false;
654   }
655 
656   /// Map virtual register to an equivalence class.
657   void mapVirtReg(Register VirtReg, UserValue *EC);
658 
659   /// Replace any PHI referring to OldReg with its corresponding NewReg, if
660   /// present.
661   void splitPHIRegister(Register OldReg, ArrayRef<Register> NewRegs);
662 
663   /// Replace all references to OldReg with NewRegs.
664   void splitRegister(Register OldReg, ArrayRef<Register> NewRegs);
665 
666   /// Recreate DBG_VALUE instruction from data structures.
667   void emitDebugValues(VirtRegMap *VRM);
668 
669   void print(raw_ostream&);
670 };
671 
672 } // end anonymous namespace
673 
674 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
675 static void printDebugLoc(const DebugLoc &DL, raw_ostream &CommentOS,
676                           const LLVMContext &Ctx) {
677   if (!DL)
678     return;
679 
680   auto *Scope = cast<DIScope>(DL.getScope());
681   // Omit the directory, because it's likely to be long and uninteresting.
682   CommentOS << Scope->getFilename();
683   CommentOS << ':' << DL.getLine();
684   if (DL.getCol() != 0)
685     CommentOS << ':' << DL.getCol();
686 
687   DebugLoc InlinedAtDL = DL.getInlinedAt();
688   if (!InlinedAtDL)
689     return;
690 
691   CommentOS << " @[ ";
692   printDebugLoc(InlinedAtDL, CommentOS, Ctx);
693   CommentOS << " ]";
694 }
695 
696 static void printExtendedName(raw_ostream &OS, const DINode *Node,
697                               const DILocation *DL) {
698   const LLVMContext &Ctx = Node->getContext();
699   StringRef Res;
700   unsigned Line = 0;
701   if (const auto *V = dyn_cast<const DILocalVariable>(Node)) {
702     Res = V->getName();
703     Line = V->getLine();
704   } else if (const auto *L = dyn_cast<const DILabel>(Node)) {
705     Res = L->getName();
706     Line = L->getLine();
707   }
708 
709   if (!Res.empty())
710     OS << Res << "," << Line;
711   auto *InlinedAt = DL ? DL->getInlinedAt() : nullptr;
712   if (InlinedAt) {
713     if (DebugLoc InlinedAtDL = InlinedAt) {
714       OS << " @[";
715       printDebugLoc(InlinedAtDL, OS, Ctx);
716       OS << "]";
717     }
718   }
719 }
720 
721 void UserValue::print(raw_ostream &OS, const TargetRegisterInfo *TRI) {
722   OS << "!\"";
723   printExtendedName(OS, Variable, dl);
724 
725   OS << "\"\t";
726   for (LocMap::const_iterator I = locInts.begin(); I.valid(); ++I) {
727     OS << " [" << I.start() << ';' << I.stop() << "):";
728     if (I.value().isUndef())
729       OS << " undef";
730     else {
731       I.value().printLocNos(OS);
732       if (I.value().getWasIndirect())
733         OS << " ind";
734       else if (I.value().getWasList())
735         OS << " list";
736     }
737   }
738   for (unsigned i = 0, e = locations.size(); i != e; ++i) {
739     OS << " Loc" << i << '=';
740     locations[i].print(OS, TRI);
741   }
742   OS << '\n';
743 }
744 
745 void UserLabel::print(raw_ostream &OS, const TargetRegisterInfo *TRI) {
746   OS << "!\"";
747   printExtendedName(OS, Label, dl);
748 
749   OS << "\"\t";
750   OS << loc;
751   OS << '\n';
752 }
753 
754 void LDVImpl::print(raw_ostream &OS) {
755   OS << "********** DEBUG VARIABLES **********\n";
756   for (auto &userValue : userValues)
757     userValue->print(OS, TRI);
758   OS << "********** DEBUG LABELS **********\n";
759   for (auto &userLabel : userLabels)
760     userLabel->print(OS, TRI);
761 }
762 #endif
763 
764 void UserValue::mapVirtRegs(LDVImpl *LDV) {
765   for (unsigned i = 0, e = locations.size(); i != e; ++i)
766     if (locations[i].isReg() &&
767         Register::isVirtualRegister(locations[i].getReg()))
768       LDV->mapVirtReg(locations[i].getReg(), this);
769 }
770 
771 UserValue *LDVImpl::getUserValue(const DILocalVariable *Var,
772                                  Optional<DIExpression::FragmentInfo> Fragment,
773                                  const DebugLoc &DL) {
774   // FIXME: Handle partially overlapping fragments. See
775   // https://reviews.llvm.org/D70121#1849741.
776   DebugVariable ID(Var, Fragment, DL->getInlinedAt());
777   UserValue *&UV = userVarMap[ID];
778   if (!UV) {
779     userValues.push_back(
780         std::make_unique<UserValue>(Var, Fragment, DL, allocator));
781     UV = userValues.back().get();
782   }
783   return UV;
784 }
785 
786 void LDVImpl::mapVirtReg(Register VirtReg, UserValue *EC) {
787   assert(Register::isVirtualRegister(VirtReg) && "Only map VirtRegs");
788   UserValue *&Leader = virtRegToEqClass[VirtReg];
789   Leader = UserValue::merge(Leader, EC);
790 }
791 
792 UserValue *LDVImpl::lookupVirtReg(Register VirtReg) {
793   if (UserValue *UV = virtRegToEqClass.lookup(VirtReg))
794     return UV->getLeader();
795   return nullptr;
796 }
797 
798 bool LDVImpl::handleDebugValue(MachineInstr &MI, SlotIndex Idx) {
799   // DBG_VALUE loc, offset, variable, expr
800   // DBG_VALUE_LIST variable, expr, locs...
801   if (!MI.isDebugValue()) {
802     LLVM_DEBUG(dbgs() << "Can't handle non-DBG_VALUE*: " << MI);
803     return false;
804   }
805   if (!MI.getDebugVariableOp().isMetadata()) {
806     LLVM_DEBUG(dbgs() << "Can't handle DBG_VALUE* with invalid variable: "
807                       << MI);
808     return false;
809   }
810   if (MI.isNonListDebugValue() &&
811       (MI.getNumOperands() != 4 ||
812        !(MI.getDebugOffset().isImm() || MI.getDebugOffset().isReg()))) {
813     LLVM_DEBUG(dbgs() << "Can't handle malformed DBG_VALUE: " << MI);
814     return false;
815   }
816 
817   // Detect invalid DBG_VALUE instructions, with a debug-use of a virtual
818   // register that hasn't been defined yet. If we do not remove those here, then
819   // the re-insertion of the DBG_VALUE instruction after register allocation
820   // will be incorrect.
821   bool Discard = false;
822   for (const MachineOperand &Op : MI.debug_operands()) {
823     if (Op.isReg() && Register::isVirtualRegister(Op.getReg())) {
824       const Register Reg = Op.getReg();
825       if (!LIS->hasInterval(Reg)) {
826         // The DBG_VALUE is described by a virtual register that does not have a
827         // live interval. Discard the DBG_VALUE.
828         Discard = true;
829         LLVM_DEBUG(dbgs() << "Discarding debug info (no LIS interval): " << Idx
830                           << " " << MI);
831       } else {
832         // The DBG_VALUE is only valid if either Reg is live out from Idx, or
833         // Reg is defined dead at Idx (where Idx is the slot index for the
834         // instruction preceding the DBG_VALUE).
835         const LiveInterval &LI = LIS->getInterval(Reg);
836         LiveQueryResult LRQ = LI.Query(Idx);
837         if (!LRQ.valueOutOrDead()) {
838           // We have found a DBG_VALUE with the value in a virtual register that
839           // is not live. Discard the DBG_VALUE.
840           Discard = true;
841           LLVM_DEBUG(dbgs() << "Discarding debug info (reg not live): " << Idx
842                             << " " << MI);
843         }
844       }
845     }
846   }
847 
848   // Get or create the UserValue for (variable,offset) here.
849   bool IsIndirect = MI.isDebugOffsetImm();
850   if (IsIndirect)
851     assert(MI.getDebugOffset().getImm() == 0 &&
852            "DBG_VALUE with nonzero offset");
853   bool IsList = MI.isDebugValueList();
854   const DILocalVariable *Var = MI.getDebugVariable();
855   const DIExpression *Expr = MI.getDebugExpression();
856   UserValue *UV = getUserValue(Var, Expr->getFragmentInfo(), MI.getDebugLoc());
857   if (!Discard)
858     UV->addDef(Idx,
859                ArrayRef<MachineOperand>(MI.debug_operands().begin(),
860                                         MI.debug_operands().end()),
861                IsIndirect, IsList, *Expr);
862   else {
863     MachineOperand MO = MachineOperand::CreateReg(0U, false);
864     MO.setIsDebug();
865     // We should still pass a list the same size as MI.debug_operands() even if
866     // all MOs are undef, so that DbgVariableValue can correctly adjust the
867     // expression while removing the duplicated undefs.
868     SmallVector<MachineOperand, 4> UndefMOs(MI.getNumDebugOperands(), MO);
869     UV->addDef(Idx, UndefMOs, false, IsList, *Expr);
870   }
871   return true;
872 }
873 
874 MachineBasicBlock::iterator LDVImpl::handleDebugInstr(MachineInstr &MI,
875                                                       SlotIndex Idx) {
876   assert(MI.isDebugValue() || MI.isDebugRef() || MI.isDebugPHI());
877 
878   // In instruction referencing mode, there should be no DBG_VALUE instructions
879   // that refer to virtual registers. They might still refer to constants.
880   if (MI.isDebugValue())
881     assert(!MI.getOperand(0).isReg() || !MI.getOperand(0).getReg().isVirtual());
882 
883   // Unlink the instruction, store it in the debug instructions collection.
884   auto NextInst = std::next(MI.getIterator());
885   auto *MBB = MI.getParent();
886   MI.removeFromParent();
887   StashedDebugInstrs.push_back({&MI, Idx, MBB});
888   return NextInst;
889 }
890 
891 bool LDVImpl::handleDebugLabel(MachineInstr &MI, SlotIndex Idx) {
892   // DBG_LABEL label
893   if (MI.getNumOperands() != 1 || !MI.getOperand(0).isMetadata()) {
894     LLVM_DEBUG(dbgs() << "Can't handle " << MI);
895     return false;
896   }
897 
898   // Get or create the UserLabel for label here.
899   const DILabel *Label = MI.getDebugLabel();
900   const DebugLoc &DL = MI.getDebugLoc();
901   bool Found = false;
902   for (auto const &L : userLabels) {
903     if (L->matches(Label, DL->getInlinedAt(), Idx)) {
904       Found = true;
905       break;
906     }
907   }
908   if (!Found)
909     userLabels.push_back(std::make_unique<UserLabel>(Label, DL, Idx));
910 
911   return true;
912 }
913 
914 bool LDVImpl::collectDebugValues(MachineFunction &mf, bool InstrRef) {
915   bool Changed = false;
916   for (MachineBasicBlock &MBB : mf) {
917     for (MachineBasicBlock::iterator MBBI = MBB.begin(), MBBE = MBB.end();
918          MBBI != MBBE;) {
919       // Use the first debug instruction in the sequence to get a SlotIndex
920       // for following consecutive debug instructions.
921       if (!MBBI->isDebugOrPseudoInstr()) {
922         ++MBBI;
923         continue;
924       }
925       // Debug instructions has no slot index. Use the previous
926       // non-debug instruction's SlotIndex as its SlotIndex.
927       SlotIndex Idx =
928           MBBI == MBB.begin()
929               ? LIS->getMBBStartIdx(&MBB)
930               : LIS->getInstructionIndex(*std::prev(MBBI)).getRegSlot();
931       // Handle consecutive debug instructions with the same slot index.
932       do {
933         // In instruction referencing mode, pass each instr to handleDebugInstr
934         // to be unlinked. Ignore DBG_VALUE_LISTs -- they refer to vregs, and
935         // need to go through the normal live interval splitting process.
936         if (InstrRef && (MBBI->isNonListDebugValue() || MBBI->isDebugPHI() ||
937                          MBBI->isDebugRef())) {
938           MBBI = handleDebugInstr(*MBBI, Idx);
939           Changed = true;
940         // In normal debug mode, use the dedicated DBG_VALUE / DBG_LABEL handler
941         // to track things through register allocation, and erase the instr.
942         } else if ((MBBI->isDebugValue() && handleDebugValue(*MBBI, Idx)) ||
943                    (MBBI->isDebugLabel() && handleDebugLabel(*MBBI, Idx))) {
944           MBBI = MBB.erase(MBBI);
945           Changed = true;
946         } else
947           ++MBBI;
948       } while (MBBI != MBBE && MBBI->isDebugOrPseudoInstr());
949     }
950   }
951   return Changed;
952 }
953 
954 void UserValue::extendDef(
955     SlotIndex Idx, DbgVariableValue DbgValue,
956     SmallDenseMap<unsigned, std::pair<LiveRange *, const VNInfo *>>
957         &LiveIntervalInfo,
958     Optional<std::pair<SlotIndex, SmallVector<unsigned>>> &Kills,
959     LiveIntervals &LIS) {
960   SlotIndex Start = Idx;
961   MachineBasicBlock *MBB = LIS.getMBBFromIndex(Start);
962   SlotIndex Stop = LIS.getMBBEndIdx(MBB);
963   LocMap::iterator I = locInts.find(Start);
964 
965   // Limit to the intersection of the VNIs' live ranges.
966   for (auto &LII : LiveIntervalInfo) {
967     LiveRange *LR = LII.second.first;
968     assert(LR && LII.second.second && "Missing range info for Idx.");
969     LiveInterval::Segment *Segment = LR->getSegmentContaining(Start);
970     assert(Segment && Segment->valno == LII.second.second &&
971            "Invalid VNInfo for Idx given?");
972     if (Segment->end < Stop) {
973       Stop = Segment->end;
974       Kills = {Stop, {LII.first}};
975     } else if (Segment->end == Stop && Kills) {
976       // If multiple locations end at the same place, track all of them in
977       // Kills.
978       Kills->second.push_back(LII.first);
979     }
980   }
981 
982   // There could already be a short def at Start.
983   if (I.valid() && I.start() <= Start) {
984     // Stop when meeting a different location or an already extended interval.
985     Start = Start.getNextSlot();
986     if (I.value() != DbgValue || I.stop() != Start) {
987       // Clear `Kills`, as we have a new def available.
988       Kills = None;
989       return;
990     }
991     // This is a one-slot placeholder. Just skip it.
992     ++I;
993   }
994 
995   // Limited by the next def.
996   if (I.valid() && I.start() < Stop) {
997     Stop = I.start();
998     // Clear `Kills`, as we have a new def available.
999     Kills = None;
1000   }
1001 
1002   if (Start < Stop) {
1003     DbgVariableValue ExtDbgValue(DbgValue);
1004     I.insert(Start, Stop, std::move(ExtDbgValue));
1005   }
1006 }
1007 
1008 void UserValue::addDefsFromCopies(
1009     DbgVariableValue DbgValue,
1010     SmallVectorImpl<std::pair<unsigned, LiveInterval *>> &LocIntervals,
1011     SlotIndex KilledAt,
1012     SmallVectorImpl<std::pair<SlotIndex, DbgVariableValue>> &NewDefs,
1013     MachineRegisterInfo &MRI, LiveIntervals &LIS) {
1014   // Don't track copies from physregs, there are too many uses.
1015   if (any_of(LocIntervals, [](auto LocI) {
1016         return !Register::isVirtualRegister(LocI.second->reg());
1017       }))
1018     return;
1019 
1020   // Collect all the (vreg, valno) pairs that are copies of LI.
1021   SmallDenseMap<unsigned,
1022                 SmallVector<std::pair<LiveInterval *, const VNInfo *>, 4>>
1023       CopyValues;
1024   for (auto &LocInterval : LocIntervals) {
1025     unsigned LocNo = LocInterval.first;
1026     LiveInterval *LI = LocInterval.second;
1027     for (MachineOperand &MO : MRI.use_nodbg_operands(LI->reg())) {
1028       MachineInstr *MI = MO.getParent();
1029       // Copies of the full value.
1030       if (MO.getSubReg() || !MI->isCopy())
1031         continue;
1032       Register DstReg = MI->getOperand(0).getReg();
1033 
1034       // Don't follow copies to physregs. These are usually setting up call
1035       // arguments, and the argument registers are always call clobbered. We are
1036       // better off in the source register which could be a callee-saved
1037       // register, or it could be spilled.
1038       if (!Register::isVirtualRegister(DstReg))
1039         continue;
1040 
1041       // Is the value extended to reach this copy? If not, another def may be
1042       // blocking it, or we are looking at a wrong value of LI.
1043       SlotIndex Idx = LIS.getInstructionIndex(*MI);
1044       LocMap::iterator I = locInts.find(Idx.getRegSlot(true));
1045       if (!I.valid() || I.value() != DbgValue)
1046         continue;
1047 
1048       if (!LIS.hasInterval(DstReg))
1049         continue;
1050       LiveInterval *DstLI = &LIS.getInterval(DstReg);
1051       const VNInfo *DstVNI = DstLI->getVNInfoAt(Idx.getRegSlot());
1052       assert(DstVNI && DstVNI->def == Idx.getRegSlot() && "Bad copy value");
1053       CopyValues[LocNo].push_back(std::make_pair(DstLI, DstVNI));
1054     }
1055   }
1056 
1057   if (CopyValues.empty())
1058     return;
1059 
1060 #if !defined(NDEBUG)
1061   for (auto &LocInterval : LocIntervals)
1062     LLVM_DEBUG(dbgs() << "Got " << CopyValues[LocInterval.first].size()
1063                       << " copies of " << *LocInterval.second << '\n');
1064 #endif
1065 
1066   // Try to add defs of the copied values for the kill point. Check that there
1067   // isn't already a def at Idx.
1068   LocMap::iterator I = locInts.find(KilledAt);
1069   if (I.valid() && I.start() <= KilledAt)
1070     return;
1071   DbgVariableValue NewValue(DbgValue);
1072   for (auto &LocInterval : LocIntervals) {
1073     unsigned LocNo = LocInterval.first;
1074     bool FoundCopy = false;
1075     for (auto &LIAndVNI : CopyValues[LocNo]) {
1076       LiveInterval *DstLI = LIAndVNI.first;
1077       const VNInfo *DstVNI = LIAndVNI.second;
1078       if (DstLI->getVNInfoAt(KilledAt) != DstVNI)
1079         continue;
1080       LLVM_DEBUG(dbgs() << "Kill at " << KilledAt << " covered by valno #"
1081                         << DstVNI->id << " in " << *DstLI << '\n');
1082       MachineInstr *CopyMI = LIS.getInstructionFromIndex(DstVNI->def);
1083       assert(CopyMI && CopyMI->isCopy() && "Bad copy value");
1084       unsigned NewLocNo = getLocationNo(CopyMI->getOperand(0));
1085       NewValue = NewValue.changeLocNo(LocNo, NewLocNo);
1086       FoundCopy = true;
1087       break;
1088     }
1089     // If there are any killed locations we can't find a copy for, we can't
1090     // extend the variable value.
1091     if (!FoundCopy)
1092       return;
1093   }
1094   I.insert(KilledAt, KilledAt.getNextSlot(), NewValue);
1095   NewDefs.push_back(std::make_pair(KilledAt, NewValue));
1096 }
1097 
1098 void UserValue::computeIntervals(MachineRegisterInfo &MRI,
1099                                  const TargetRegisterInfo &TRI,
1100                                  LiveIntervals &LIS, LexicalScopes &LS) {
1101   SmallVector<std::pair<SlotIndex, DbgVariableValue>, 16> Defs;
1102 
1103   // Collect all defs to be extended (Skipping undefs).
1104   for (LocMap::const_iterator I = locInts.begin(); I.valid(); ++I)
1105     if (!I.value().isUndef())
1106       Defs.push_back(std::make_pair(I.start(), I.value()));
1107 
1108   // Extend all defs, and possibly add new ones along the way.
1109   for (unsigned i = 0; i != Defs.size(); ++i) {
1110     SlotIndex Idx = Defs[i].first;
1111     DbgVariableValue DbgValue = Defs[i].second;
1112     SmallDenseMap<unsigned, std::pair<LiveRange *, const VNInfo *>> LIs;
1113     SmallVector<const VNInfo *, 4> VNIs;
1114     bool ShouldExtendDef = false;
1115     for (unsigned LocNo : DbgValue.loc_nos()) {
1116       const MachineOperand &LocMO = locations[LocNo];
1117       if (!LocMO.isReg() || !Register::isVirtualRegister(LocMO.getReg())) {
1118         ShouldExtendDef |= !LocMO.isReg();
1119         continue;
1120       }
1121       ShouldExtendDef = true;
1122       LiveInterval *LI = nullptr;
1123       const VNInfo *VNI = nullptr;
1124       if (LIS.hasInterval(LocMO.getReg())) {
1125         LI = &LIS.getInterval(LocMO.getReg());
1126         VNI = LI->getVNInfoAt(Idx);
1127       }
1128       if (LI && VNI)
1129         LIs[LocNo] = {LI, VNI};
1130     }
1131     if (ShouldExtendDef) {
1132       Optional<std::pair<SlotIndex, SmallVector<unsigned>>> Kills;
1133       extendDef(Idx, DbgValue, LIs, Kills, LIS);
1134 
1135       if (Kills) {
1136         SmallVector<std::pair<unsigned, LiveInterval *>, 2> KilledLocIntervals;
1137         bool AnySubreg = false;
1138         for (unsigned LocNo : Kills->second) {
1139           const MachineOperand &LocMO = this->locations[LocNo];
1140           if (LocMO.getSubReg()) {
1141             AnySubreg = true;
1142             break;
1143           }
1144           LiveInterval *LI = &LIS.getInterval(LocMO.getReg());
1145           KilledLocIntervals.push_back({LocNo, LI});
1146         }
1147 
1148         // FIXME: Handle sub-registers in addDefsFromCopies. The problem is that
1149         // if the original location for example is %vreg0:sub_hi, and we find a
1150         // full register copy in addDefsFromCopies (at the moment it only
1151         // handles full register copies), then we must add the sub1 sub-register
1152         // index to the new location. However, that is only possible if the new
1153         // virtual register is of the same regclass (or if there is an
1154         // equivalent sub-register in that regclass). For now, simply skip
1155         // handling copies if a sub-register is involved.
1156         if (!AnySubreg)
1157           addDefsFromCopies(DbgValue, KilledLocIntervals, Kills->first, Defs,
1158                             MRI, LIS);
1159       }
1160     }
1161 
1162     // For physregs, we only mark the start slot idx. DwarfDebug will see it
1163     // as if the DBG_VALUE is valid up until the end of the basic block, or
1164     // the next def of the physical register. So we do not need to extend the
1165     // range. It might actually happen that the DBG_VALUE is the last use of
1166     // the physical register (e.g. if this is an unused input argument to a
1167     // function).
1168   }
1169 
1170   // The computed intervals may extend beyond the range of the debug
1171   // location's lexical scope. In this case, splitting of an interval
1172   // can result in an interval outside of the scope being created,
1173   // causing extra unnecessary DBG_VALUEs to be emitted. To prevent
1174   // this, trim the intervals to the lexical scope in the case of inlined
1175   // variables, since heavy inlining may cause production of dramatically big
1176   // number of DBG_VALUEs to be generated.
1177   if (!dl.getInlinedAt())
1178     return;
1179 
1180   LexicalScope *Scope = LS.findLexicalScope(dl);
1181   if (!Scope)
1182     return;
1183 
1184   SlotIndex PrevEnd;
1185   LocMap::iterator I = locInts.begin();
1186 
1187   // Iterate over the lexical scope ranges. Each time round the loop
1188   // we check the intervals for overlap with the end of the previous
1189   // range and the start of the next. The first range is handled as
1190   // a special case where there is no PrevEnd.
1191   for (const InsnRange &Range : Scope->getRanges()) {
1192     SlotIndex RStart = LIS.getInstructionIndex(*Range.first);
1193     SlotIndex REnd = LIS.getInstructionIndex(*Range.second);
1194 
1195     // Variable locations at the first instruction of a block should be
1196     // based on the block's SlotIndex, not the first instruction's index.
1197     if (Range.first == Range.first->getParent()->begin())
1198       RStart = LIS.getSlotIndexes()->getIndexBefore(*Range.first);
1199 
1200     // At the start of each iteration I has been advanced so that
1201     // I.stop() >= PrevEnd. Check for overlap.
1202     if (PrevEnd && I.start() < PrevEnd) {
1203       SlotIndex IStop = I.stop();
1204       DbgVariableValue DbgValue = I.value();
1205 
1206       // Stop overlaps previous end - trim the end of the interval to
1207       // the scope range.
1208       I.setStopUnchecked(PrevEnd);
1209       ++I;
1210 
1211       // If the interval also overlaps the start of the "next" (i.e.
1212       // current) range create a new interval for the remainder (which
1213       // may be further trimmed).
1214       if (RStart < IStop)
1215         I.insert(RStart, IStop, DbgValue);
1216     }
1217 
1218     // Advance I so that I.stop() >= RStart, and check for overlap.
1219     I.advanceTo(RStart);
1220     if (!I.valid())
1221       return;
1222 
1223     if (I.start() < RStart) {
1224       // Interval start overlaps range - trim to the scope range.
1225       I.setStartUnchecked(RStart);
1226       // Remember that this interval was trimmed.
1227       trimmedDefs.insert(RStart);
1228     }
1229 
1230     // The end of a lexical scope range is the last instruction in the
1231     // range. To convert to an interval we need the index of the
1232     // instruction after it.
1233     REnd = REnd.getNextIndex();
1234 
1235     // Advance I to first interval outside current range.
1236     I.advanceTo(REnd);
1237     if (!I.valid())
1238       return;
1239 
1240     PrevEnd = REnd;
1241   }
1242 
1243   // Check for overlap with end of final range.
1244   if (PrevEnd && I.start() < PrevEnd)
1245     I.setStopUnchecked(PrevEnd);
1246 }
1247 
1248 void LDVImpl::computeIntervals() {
1249   LexicalScopes LS;
1250   LS.initialize(*MF);
1251 
1252   for (unsigned i = 0, e = userValues.size(); i != e; ++i) {
1253     userValues[i]->computeIntervals(MF->getRegInfo(), *TRI, *LIS, LS);
1254     userValues[i]->mapVirtRegs(this);
1255   }
1256 }
1257 
1258 bool LDVImpl::runOnMachineFunction(MachineFunction &mf, bool InstrRef) {
1259   clear();
1260   MF = &mf;
1261   LIS = &pass.getAnalysis<LiveIntervals>();
1262   TRI = mf.getSubtarget().getRegisterInfo();
1263   LLVM_DEBUG(dbgs() << "********** COMPUTING LIVE DEBUG VARIABLES: "
1264                     << mf.getName() << " **********\n");
1265 
1266   bool Changed = collectDebugValues(mf, InstrRef);
1267   computeIntervals();
1268   LLVM_DEBUG(print(dbgs()));
1269 
1270   // Collect the set of VReg / SlotIndexs where PHIs occur; index the sensitive
1271   // VRegs too, for when we're notified of a range split.
1272   SlotIndexes *Slots = LIS->getSlotIndexes();
1273   for (const auto &PHIIt : MF->DebugPHIPositions) {
1274     const MachineFunction::DebugPHIRegallocPos &Position = PHIIt.second;
1275     MachineBasicBlock *MBB = Position.MBB;
1276     Register Reg = Position.Reg;
1277     unsigned SubReg = Position.SubReg;
1278     SlotIndex SI = Slots->getMBBStartIdx(MBB);
1279     PHIValPos VP = {SI, Reg, SubReg};
1280     PHIValToPos.insert(std::make_pair(PHIIt.first, VP));
1281     RegToPHIIdx[Reg].push_back(PHIIt.first);
1282   }
1283 
1284   ModifiedMF = Changed;
1285   return Changed;
1286 }
1287 
1288 static void removeDebugInstrs(MachineFunction &mf) {
1289   for (MachineBasicBlock &MBB : mf) {
1290     for (MachineInstr &MI : llvm::make_early_inc_range(MBB))
1291       if (MI.isDebugInstr())
1292         MBB.erase(&MI);
1293   }
1294 }
1295 
1296 bool LiveDebugVariables::runOnMachineFunction(MachineFunction &mf) {
1297   if (!EnableLDV)
1298     return false;
1299   if (!mf.getFunction().getSubprogram()) {
1300     removeDebugInstrs(mf);
1301     return false;
1302   }
1303 
1304   // Have we been asked to track variable locations using instruction
1305   // referencing?
1306   bool InstrRef = mf.useDebugInstrRef();
1307 
1308   if (!pImpl)
1309     pImpl = new LDVImpl(this);
1310   return static_cast<LDVImpl *>(pImpl)->runOnMachineFunction(mf, InstrRef);
1311 }
1312 
1313 void LiveDebugVariables::releaseMemory() {
1314   if (pImpl)
1315     static_cast<LDVImpl*>(pImpl)->clear();
1316 }
1317 
1318 LiveDebugVariables::~LiveDebugVariables() {
1319   if (pImpl)
1320     delete static_cast<LDVImpl*>(pImpl);
1321 }
1322 
1323 //===----------------------------------------------------------------------===//
1324 //                           Live Range Splitting
1325 //===----------------------------------------------------------------------===//
1326 
1327 bool
1328 UserValue::splitLocation(unsigned OldLocNo, ArrayRef<Register> NewRegs,
1329                          LiveIntervals& LIS) {
1330   LLVM_DEBUG({
1331     dbgs() << "Splitting Loc" << OldLocNo << '\t';
1332     print(dbgs(), nullptr);
1333   });
1334   bool DidChange = false;
1335   LocMap::iterator LocMapI;
1336   LocMapI.setMap(locInts);
1337   for (Register NewReg : NewRegs) {
1338     LiveInterval *LI = &LIS.getInterval(NewReg);
1339     if (LI->empty())
1340       continue;
1341 
1342     // Don't allocate the new LocNo until it is needed.
1343     unsigned NewLocNo = UndefLocNo;
1344 
1345     // Iterate over the overlaps between locInts and LI.
1346     LocMapI.find(LI->beginIndex());
1347     if (!LocMapI.valid())
1348       continue;
1349     LiveInterval::iterator LII = LI->advanceTo(LI->begin(), LocMapI.start());
1350     LiveInterval::iterator LIE = LI->end();
1351     while (LocMapI.valid() && LII != LIE) {
1352       // At this point, we know that LocMapI.stop() > LII->start.
1353       LII = LI->advanceTo(LII, LocMapI.start());
1354       if (LII == LIE)
1355         break;
1356 
1357       // Now LII->end > LocMapI.start(). Do we have an overlap?
1358       if (LocMapI.value().containsLocNo(OldLocNo) &&
1359           LII->start < LocMapI.stop()) {
1360         // Overlapping correct location. Allocate NewLocNo now.
1361         if (NewLocNo == UndefLocNo) {
1362           MachineOperand MO = MachineOperand::CreateReg(LI->reg(), false);
1363           MO.setSubReg(locations[OldLocNo].getSubReg());
1364           NewLocNo = getLocationNo(MO);
1365           DidChange = true;
1366         }
1367 
1368         SlotIndex LStart = LocMapI.start();
1369         SlotIndex LStop = LocMapI.stop();
1370         DbgVariableValue OldDbgValue = LocMapI.value();
1371 
1372         // Trim LocMapI down to the LII overlap.
1373         if (LStart < LII->start)
1374           LocMapI.setStartUnchecked(LII->start);
1375         if (LStop > LII->end)
1376           LocMapI.setStopUnchecked(LII->end);
1377 
1378         // Change the value in the overlap. This may trigger coalescing.
1379         LocMapI.setValue(OldDbgValue.changeLocNo(OldLocNo, NewLocNo));
1380 
1381         // Re-insert any removed OldDbgValue ranges.
1382         if (LStart < LocMapI.start()) {
1383           LocMapI.insert(LStart, LocMapI.start(), OldDbgValue);
1384           ++LocMapI;
1385           assert(LocMapI.valid() && "Unexpected coalescing");
1386         }
1387         if (LStop > LocMapI.stop()) {
1388           ++LocMapI;
1389           LocMapI.insert(LII->end, LStop, OldDbgValue);
1390           --LocMapI;
1391         }
1392       }
1393 
1394       // Advance to the next overlap.
1395       if (LII->end < LocMapI.stop()) {
1396         if (++LII == LIE)
1397           break;
1398         LocMapI.advanceTo(LII->start);
1399       } else {
1400         ++LocMapI;
1401         if (!LocMapI.valid())
1402           break;
1403         LII = LI->advanceTo(LII, LocMapI.start());
1404       }
1405     }
1406   }
1407 
1408   // Finally, remove OldLocNo unless it is still used by some interval in the
1409   // locInts map. One case when OldLocNo still is in use is when the register
1410   // has been spilled. In such situations the spilled register is kept as a
1411   // location until rewriteLocations is called (VirtRegMap is mapping the old
1412   // register to the spill slot). So for a while we can have locations that map
1413   // to virtual registers that have been removed from both the MachineFunction
1414   // and from LiveIntervals.
1415   //
1416   // We may also just be using the location for a value with a different
1417   // expression.
1418   removeLocationIfUnused(OldLocNo);
1419 
1420   LLVM_DEBUG({
1421     dbgs() << "Split result: \t";
1422     print(dbgs(), nullptr);
1423   });
1424   return DidChange;
1425 }
1426 
1427 bool
1428 UserValue::splitRegister(Register OldReg, ArrayRef<Register> NewRegs,
1429                          LiveIntervals &LIS) {
1430   bool DidChange = false;
1431   // Split locations referring to OldReg. Iterate backwards so splitLocation can
1432   // safely erase unused locations.
1433   for (unsigned i = locations.size(); i ; --i) {
1434     unsigned LocNo = i-1;
1435     const MachineOperand *Loc = &locations[LocNo];
1436     if (!Loc->isReg() || Loc->getReg() != OldReg)
1437       continue;
1438     DidChange |= splitLocation(LocNo, NewRegs, LIS);
1439   }
1440   return DidChange;
1441 }
1442 
1443 void LDVImpl::splitPHIRegister(Register OldReg, ArrayRef<Register> NewRegs) {
1444   auto RegIt = RegToPHIIdx.find(OldReg);
1445   if (RegIt == RegToPHIIdx.end())
1446     return;
1447 
1448   std::vector<std::pair<Register, unsigned>> NewRegIdxes;
1449   // Iterate over all the debug instruction numbers affected by this split.
1450   for (unsigned InstrID : RegIt->second) {
1451     auto PHIIt = PHIValToPos.find(InstrID);
1452     assert(PHIIt != PHIValToPos.end());
1453     const SlotIndex &Slot = PHIIt->second.SI;
1454     assert(OldReg == PHIIt->second.Reg);
1455 
1456     // Find the new register that covers this position.
1457     for (auto NewReg : NewRegs) {
1458       const LiveInterval &LI = LIS->getInterval(NewReg);
1459       auto LII = LI.find(Slot);
1460       if (LII != LI.end() && LII->start <= Slot) {
1461         // This new register covers this PHI position, record this for indexing.
1462         NewRegIdxes.push_back(std::make_pair(NewReg, InstrID));
1463         // Record that this value lives in a different VReg now.
1464         PHIIt->second.Reg = NewReg;
1465         break;
1466       }
1467     }
1468 
1469     // If we do not find a new register covering this PHI, then register
1470     // allocation has dropped its location, for example because it's not live.
1471     // The old VReg will not be mapped to a physreg, and the instruction
1472     // number will have been optimized out.
1473   }
1474 
1475   // Re-create register index using the new register numbers.
1476   RegToPHIIdx.erase(RegIt);
1477   for (auto &RegAndInstr : NewRegIdxes)
1478     RegToPHIIdx[RegAndInstr.first].push_back(RegAndInstr.second);
1479 }
1480 
1481 void LDVImpl::splitRegister(Register OldReg, ArrayRef<Register> NewRegs) {
1482   // Consider whether this split range affects any PHI locations.
1483   splitPHIRegister(OldReg, NewRegs);
1484 
1485   // Check whether any intervals mapped by a DBG_VALUE were split and need
1486   // updating.
1487   bool DidChange = false;
1488   for (UserValue *UV = lookupVirtReg(OldReg); UV; UV = UV->getNext())
1489     DidChange |= UV->splitRegister(OldReg, NewRegs, *LIS);
1490 
1491   if (!DidChange)
1492     return;
1493 
1494   // Map all of the new virtual registers.
1495   UserValue *UV = lookupVirtReg(OldReg);
1496   for (Register NewReg : NewRegs)
1497     mapVirtReg(NewReg, UV);
1498 }
1499 
1500 void LiveDebugVariables::
1501 splitRegister(Register OldReg, ArrayRef<Register> NewRegs, LiveIntervals &LIS) {
1502   if (pImpl)
1503     static_cast<LDVImpl*>(pImpl)->splitRegister(OldReg, NewRegs);
1504 }
1505 
1506 void UserValue::rewriteLocations(VirtRegMap &VRM, const MachineFunction &MF,
1507                                  const TargetInstrInfo &TII,
1508                                  const TargetRegisterInfo &TRI,
1509                                  SpillOffsetMap &SpillOffsets) {
1510   // Build a set of new locations with new numbers so we can coalesce our
1511   // IntervalMap if two vreg intervals collapse to the same physical location.
1512   // Use MapVector instead of SetVector because MapVector::insert returns the
1513   // position of the previously or newly inserted element. The boolean value
1514   // tracks if the location was produced by a spill.
1515   // FIXME: This will be problematic if we ever support direct and indirect
1516   // frame index locations, i.e. expressing both variables in memory and
1517   // 'int x, *px = &x'. The "spilled" bit must become part of the location.
1518   MapVector<MachineOperand, std::pair<bool, unsigned>> NewLocations;
1519   SmallVector<unsigned, 4> LocNoMap(locations.size());
1520   for (unsigned I = 0, E = locations.size(); I != E; ++I) {
1521     bool Spilled = false;
1522     unsigned SpillOffset = 0;
1523     MachineOperand Loc = locations[I];
1524     // Only virtual registers are rewritten.
1525     if (Loc.isReg() && Loc.getReg() &&
1526         Register::isVirtualRegister(Loc.getReg())) {
1527       Register VirtReg = Loc.getReg();
1528       if (VRM.isAssignedReg(VirtReg) &&
1529           Register::isPhysicalRegister(VRM.getPhys(VirtReg))) {
1530         // This can create a %noreg operand in rare cases when the sub-register
1531         // index is no longer available. That means the user value is in a
1532         // non-existent sub-register, and %noreg is exactly what we want.
1533         Loc.substPhysReg(VRM.getPhys(VirtReg), TRI);
1534       } else if (VRM.getStackSlot(VirtReg) != VirtRegMap::NO_STACK_SLOT) {
1535         // Retrieve the stack slot offset.
1536         unsigned SpillSize;
1537         const MachineRegisterInfo &MRI = MF.getRegInfo();
1538         const TargetRegisterClass *TRC = MRI.getRegClass(VirtReg);
1539         bool Success = TII.getStackSlotRange(TRC, Loc.getSubReg(), SpillSize,
1540                                              SpillOffset, MF);
1541 
1542         // FIXME: Invalidate the location if the offset couldn't be calculated.
1543         (void)Success;
1544 
1545         Loc = MachineOperand::CreateFI(VRM.getStackSlot(VirtReg));
1546         Spilled = true;
1547       } else {
1548         Loc.setReg(0);
1549         Loc.setSubReg(0);
1550       }
1551     }
1552 
1553     // Insert this location if it doesn't already exist and record a mapping
1554     // from the old number to the new number.
1555     auto InsertResult = NewLocations.insert({Loc, {Spilled, SpillOffset}});
1556     unsigned NewLocNo = std::distance(NewLocations.begin(), InsertResult.first);
1557     LocNoMap[I] = NewLocNo;
1558   }
1559 
1560   // Rewrite the locations and record the stack slot offsets for spills.
1561   locations.clear();
1562   SpillOffsets.clear();
1563   for (auto &Pair : NewLocations) {
1564     bool Spilled;
1565     unsigned SpillOffset;
1566     std::tie(Spilled, SpillOffset) = Pair.second;
1567     locations.push_back(Pair.first);
1568     if (Spilled) {
1569       unsigned NewLocNo = std::distance(&*NewLocations.begin(), &Pair);
1570       SpillOffsets[NewLocNo] = SpillOffset;
1571     }
1572   }
1573 
1574   // Update the interval map, but only coalesce left, since intervals to the
1575   // right use the old location numbers. This should merge two contiguous
1576   // DBG_VALUE intervals with different vregs that were allocated to the same
1577   // physical register.
1578   for (LocMap::iterator I = locInts.begin(); I.valid(); ++I) {
1579     I.setValueUnchecked(I.value().remapLocNos(LocNoMap));
1580     I.setStart(I.start());
1581   }
1582 }
1583 
1584 /// Find an iterator for inserting a DBG_VALUE instruction.
1585 static MachineBasicBlock::iterator
1586 findInsertLocation(MachineBasicBlock *MBB, SlotIndex Idx, LiveIntervals &LIS,
1587                    BlockSkipInstsMap &BBSkipInstsMap) {
1588   SlotIndex Start = LIS.getMBBStartIdx(MBB);
1589   Idx = Idx.getBaseIndex();
1590 
1591   // Try to find an insert location by going backwards from Idx.
1592   MachineInstr *MI;
1593   while (!(MI = LIS.getInstructionFromIndex(Idx))) {
1594     // We've reached the beginning of MBB.
1595     if (Idx == Start) {
1596       // Retrieve the last PHI/Label/Debug location found when calling
1597       // SkipPHIsLabelsAndDebug last time. Start searching from there.
1598       //
1599       // Note the iterator kept in BBSkipInstsMap is one step back based
1600       // on the iterator returned by SkipPHIsLabelsAndDebug last time.
1601       // One exception is when SkipPHIsLabelsAndDebug returns MBB->begin(),
1602       // BBSkipInstsMap won't save it. This is to consider the case that
1603       // new instructions may be inserted at the beginning of MBB after
1604       // last call of SkipPHIsLabelsAndDebug. If we save MBB->begin() in
1605       // BBSkipInstsMap, after new non-phi/non-label/non-debug instructions
1606       // are inserted at the beginning of the MBB, the iterator in
1607       // BBSkipInstsMap won't point to the beginning of the MBB anymore.
1608       // Therefore The next search in SkipPHIsLabelsAndDebug will skip those
1609       // newly added instructions and that is unwanted.
1610       MachineBasicBlock::iterator BeginIt;
1611       auto MapIt = BBSkipInstsMap.find(MBB);
1612       if (MapIt == BBSkipInstsMap.end())
1613         BeginIt = MBB->begin();
1614       else
1615         BeginIt = std::next(MapIt->second);
1616       auto I = MBB->SkipPHIsLabelsAndDebug(BeginIt);
1617       if (I != BeginIt)
1618         BBSkipInstsMap[MBB] = std::prev(I);
1619       return I;
1620     }
1621     Idx = Idx.getPrevIndex();
1622   }
1623 
1624   // Don't insert anything after the first terminator, though.
1625   return MI->isTerminator() ? MBB->getFirstTerminator() :
1626                               std::next(MachineBasicBlock::iterator(MI));
1627 }
1628 
1629 /// Find an iterator for inserting the next DBG_VALUE instruction
1630 /// (or end if no more insert locations found).
1631 static MachineBasicBlock::iterator
1632 findNextInsertLocation(MachineBasicBlock *MBB, MachineBasicBlock::iterator I,
1633                        SlotIndex StopIdx, ArrayRef<MachineOperand> LocMOs,
1634                        LiveIntervals &LIS, const TargetRegisterInfo &TRI) {
1635   SmallVector<Register, 4> Regs;
1636   for (const MachineOperand &LocMO : LocMOs)
1637     if (LocMO.isReg())
1638       Regs.push_back(LocMO.getReg());
1639   if (Regs.empty())
1640     return MBB->instr_end();
1641 
1642   // Find the next instruction in the MBB that define the register Reg.
1643   while (I != MBB->end() && !I->isTerminator()) {
1644     if (!LIS.isNotInMIMap(*I) &&
1645         SlotIndex::isEarlierEqualInstr(StopIdx, LIS.getInstructionIndex(*I)))
1646       break;
1647     if (any_of(Regs, [&I, &TRI](Register &Reg) {
1648           return I->definesRegister(Reg, &TRI);
1649         }))
1650       // The insert location is directly after the instruction/bundle.
1651       return std::next(I);
1652     ++I;
1653   }
1654   return MBB->end();
1655 }
1656 
1657 void UserValue::insertDebugValue(MachineBasicBlock *MBB, SlotIndex StartIdx,
1658                                  SlotIndex StopIdx, DbgVariableValue DbgValue,
1659                                  ArrayRef<bool> LocSpills,
1660                                  ArrayRef<unsigned> SpillOffsets,
1661                                  LiveIntervals &LIS, const TargetInstrInfo &TII,
1662                                  const TargetRegisterInfo &TRI,
1663                                  BlockSkipInstsMap &BBSkipInstsMap) {
1664   SlotIndex MBBEndIdx = LIS.getMBBEndIdx(&*MBB);
1665   // Only search within the current MBB.
1666   StopIdx = (MBBEndIdx < StopIdx) ? MBBEndIdx : StopIdx;
1667   MachineBasicBlock::iterator I =
1668       findInsertLocation(MBB, StartIdx, LIS, BBSkipInstsMap);
1669   // Undef values don't exist in locations so create new "noreg" register MOs
1670   // for them. See getLocationNo().
1671   SmallVector<MachineOperand, 8> MOs;
1672   if (DbgValue.isUndef()) {
1673     MOs.assign(DbgValue.loc_nos().size(),
1674                MachineOperand::CreateReg(
1675                    /* Reg */ 0, /* isDef */ false, /* isImp */ false,
1676                    /* isKill */ false, /* isDead */ false,
1677                    /* isUndef */ false, /* isEarlyClobber */ false,
1678                    /* SubReg */ 0, /* isDebug */ true));
1679   } else {
1680     for (unsigned LocNo : DbgValue.loc_nos())
1681       MOs.push_back(locations[LocNo]);
1682   }
1683 
1684   ++NumInsertedDebugValues;
1685 
1686   assert(cast<DILocalVariable>(Variable)
1687              ->isValidLocationForIntrinsic(getDebugLoc()) &&
1688          "Expected inlined-at fields to agree");
1689 
1690   // If the location was spilled, the new DBG_VALUE will be indirect. If the
1691   // original DBG_VALUE was indirect, we need to add DW_OP_deref to indicate
1692   // that the original virtual register was a pointer. Also, add the stack slot
1693   // offset for the spilled register to the expression.
1694   const DIExpression *Expr = DbgValue.getExpression();
1695   bool IsIndirect = DbgValue.getWasIndirect();
1696   bool IsList = DbgValue.getWasList();
1697   for (unsigned I = 0, E = LocSpills.size(); I != E; ++I) {
1698     if (LocSpills[I]) {
1699       if (!IsList) {
1700         uint8_t DIExprFlags = DIExpression::ApplyOffset;
1701         if (IsIndirect)
1702           DIExprFlags |= DIExpression::DerefAfter;
1703         Expr = DIExpression::prepend(Expr, DIExprFlags, SpillOffsets[I]);
1704         IsIndirect = true;
1705       } else {
1706         SmallVector<uint64_t, 4> Ops;
1707         DIExpression::appendOffset(Ops, SpillOffsets[I]);
1708         Ops.push_back(dwarf::DW_OP_deref);
1709         Expr = DIExpression::appendOpsToArg(Expr, Ops, I);
1710       }
1711     }
1712 
1713     assert((!LocSpills[I] || MOs[I].isFI()) &&
1714            "a spilled location must be a frame index");
1715   }
1716 
1717   unsigned DbgValueOpcode =
1718       IsList ? TargetOpcode::DBG_VALUE_LIST : TargetOpcode::DBG_VALUE;
1719   do {
1720     BuildMI(*MBB, I, getDebugLoc(), TII.get(DbgValueOpcode), IsIndirect, MOs,
1721             Variable, Expr);
1722 
1723     // Continue and insert DBG_VALUES after every redefinition of a register
1724     // associated with the debug value within the range
1725     I = findNextInsertLocation(MBB, I, StopIdx, MOs, LIS, TRI);
1726   } while (I != MBB->end());
1727 }
1728 
1729 void UserLabel::insertDebugLabel(MachineBasicBlock *MBB, SlotIndex Idx,
1730                                  LiveIntervals &LIS, const TargetInstrInfo &TII,
1731                                  BlockSkipInstsMap &BBSkipInstsMap) {
1732   MachineBasicBlock::iterator I =
1733       findInsertLocation(MBB, Idx, LIS, BBSkipInstsMap);
1734   ++NumInsertedDebugLabels;
1735   BuildMI(*MBB, I, getDebugLoc(), TII.get(TargetOpcode::DBG_LABEL))
1736       .addMetadata(Label);
1737 }
1738 
1739 void UserValue::emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS,
1740                                 const TargetInstrInfo &TII,
1741                                 const TargetRegisterInfo &TRI,
1742                                 const SpillOffsetMap &SpillOffsets,
1743                                 BlockSkipInstsMap &BBSkipInstsMap) {
1744   MachineFunction::iterator MFEnd = VRM->getMachineFunction().end();
1745 
1746   for (LocMap::const_iterator I = locInts.begin(); I.valid();) {
1747     SlotIndex Start = I.start();
1748     SlotIndex Stop = I.stop();
1749     DbgVariableValue DbgValue = I.value();
1750 
1751     SmallVector<bool> SpilledLocs;
1752     SmallVector<unsigned> LocSpillOffsets;
1753     for (unsigned LocNo : DbgValue.loc_nos()) {
1754       auto SpillIt =
1755           !DbgValue.isUndef() ? SpillOffsets.find(LocNo) : SpillOffsets.end();
1756       bool Spilled = SpillIt != SpillOffsets.end();
1757       SpilledLocs.push_back(Spilled);
1758       LocSpillOffsets.push_back(Spilled ? SpillIt->second : 0);
1759     }
1760 
1761     // If the interval start was trimmed to the lexical scope insert the
1762     // DBG_VALUE at the previous index (otherwise it appears after the
1763     // first instruction in the range).
1764     if (trimmedDefs.count(Start))
1765       Start = Start.getPrevIndex();
1766 
1767     LLVM_DEBUG(auto &dbg = dbgs(); dbg << "\t[" << Start << ';' << Stop << "):";
1768                DbgValue.printLocNos(dbg));
1769     MachineFunction::iterator MBB = LIS.getMBBFromIndex(Start)->getIterator();
1770     SlotIndex MBBEnd = LIS.getMBBEndIdx(&*MBB);
1771 
1772     LLVM_DEBUG(dbgs() << ' ' << printMBBReference(*MBB) << '-' << MBBEnd);
1773     insertDebugValue(&*MBB, Start, Stop, DbgValue, SpilledLocs, LocSpillOffsets,
1774                      LIS, TII, TRI, BBSkipInstsMap);
1775     // This interval may span multiple basic blocks.
1776     // Insert a DBG_VALUE into each one.
1777     while (Stop > MBBEnd) {
1778       // Move to the next block.
1779       Start = MBBEnd;
1780       if (++MBB == MFEnd)
1781         break;
1782       MBBEnd = LIS.getMBBEndIdx(&*MBB);
1783       LLVM_DEBUG(dbgs() << ' ' << printMBBReference(*MBB) << '-' << MBBEnd);
1784       insertDebugValue(&*MBB, Start, Stop, DbgValue, SpilledLocs,
1785                        LocSpillOffsets, LIS, TII, TRI, BBSkipInstsMap);
1786     }
1787     LLVM_DEBUG(dbgs() << '\n');
1788     if (MBB == MFEnd)
1789       break;
1790 
1791     ++I;
1792   }
1793 }
1794 
1795 void UserLabel::emitDebugLabel(LiveIntervals &LIS, const TargetInstrInfo &TII,
1796                                BlockSkipInstsMap &BBSkipInstsMap) {
1797   LLVM_DEBUG(dbgs() << "\t" << loc);
1798   MachineFunction::iterator MBB = LIS.getMBBFromIndex(loc)->getIterator();
1799 
1800   LLVM_DEBUG(dbgs() << ' ' << printMBBReference(*MBB));
1801   insertDebugLabel(&*MBB, loc, LIS, TII, BBSkipInstsMap);
1802 
1803   LLVM_DEBUG(dbgs() << '\n');
1804 }
1805 
1806 void LDVImpl::emitDebugValues(VirtRegMap *VRM) {
1807   LLVM_DEBUG(dbgs() << "********** EMITTING LIVE DEBUG VARIABLES **********\n");
1808   if (!MF)
1809     return;
1810 
1811   BlockSkipInstsMap BBSkipInstsMap;
1812   const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
1813   SpillOffsetMap SpillOffsets;
1814   for (auto &userValue : userValues) {
1815     LLVM_DEBUG(userValue->print(dbgs(), TRI));
1816     userValue->rewriteLocations(*VRM, *MF, *TII, *TRI, SpillOffsets);
1817     userValue->emitDebugValues(VRM, *LIS, *TII, *TRI, SpillOffsets,
1818                                BBSkipInstsMap);
1819   }
1820   LLVM_DEBUG(dbgs() << "********** EMITTING LIVE DEBUG LABELS **********\n");
1821   for (auto &userLabel : userLabels) {
1822     LLVM_DEBUG(userLabel->print(dbgs(), TRI));
1823     userLabel->emitDebugLabel(*LIS, *TII, BBSkipInstsMap);
1824   }
1825 
1826   LLVM_DEBUG(dbgs() << "********** EMITTING DEBUG PHIS **********\n");
1827 
1828   auto Slots = LIS->getSlotIndexes();
1829   for (auto &It : PHIValToPos) {
1830     // For each ex-PHI, identify its physreg location or stack slot, and emit
1831     // a DBG_PHI for it.
1832     unsigned InstNum = It.first;
1833     auto Slot = It.second.SI;
1834     Register Reg = It.second.Reg;
1835     unsigned SubReg = It.second.SubReg;
1836 
1837     MachineBasicBlock *OrigMBB = Slots->getMBBFromIndex(Slot);
1838     if (VRM->isAssignedReg(Reg) &&
1839         Register::isPhysicalRegister(VRM->getPhys(Reg))) {
1840       unsigned PhysReg = VRM->getPhys(Reg);
1841       if (SubReg != 0)
1842         PhysReg = TRI->getSubReg(PhysReg, SubReg);
1843 
1844       auto Builder = BuildMI(*OrigMBB, OrigMBB->begin(), DebugLoc(),
1845                              TII->get(TargetOpcode::DBG_PHI));
1846       Builder.addReg(PhysReg);
1847       Builder.addImm(InstNum);
1848     } else if (VRM->getStackSlot(Reg) != VirtRegMap::NO_STACK_SLOT) {
1849       const MachineRegisterInfo &MRI = MF->getRegInfo();
1850       const TargetRegisterClass *TRC = MRI.getRegClass(Reg);
1851       unsigned SpillSize, SpillOffset;
1852 
1853       unsigned regSizeInBits = TRI->getRegSizeInBits(*TRC);
1854       if (SubReg)
1855         regSizeInBits = TRI->getSubRegIdxSize(SubReg);
1856 
1857       // Test whether this location is legal with the given subreg. If the
1858       // subregister has a nonzero offset, drop this location, it's too complex
1859       // to describe. (TODO: future work).
1860       bool Success =
1861           TII->getStackSlotRange(TRC, SubReg, SpillSize, SpillOffset, *MF);
1862 
1863       if (Success && SpillOffset == 0) {
1864         auto Builder = BuildMI(*OrigMBB, OrigMBB->begin(), DebugLoc(),
1865                                TII->get(TargetOpcode::DBG_PHI));
1866         Builder.addFrameIndex(VRM->getStackSlot(Reg));
1867         Builder.addImm(InstNum);
1868         // Record how large the original value is. The stack slot might be
1869         // merged and altered during optimisation, but we will want to know how
1870         // large the value is, at this DBG_PHI.
1871         Builder.addImm(regSizeInBits);
1872       }
1873 
1874       LLVM_DEBUG(
1875       if (SpillOffset != 0) {
1876         dbgs() << "DBG_PHI for Vreg " << Reg << " subreg " << SubReg <<
1877                   " has nonzero offset\n";
1878       }
1879       );
1880     }
1881     // If there was no mapping for a value ID, it's optimized out. Create no
1882     // DBG_PHI, and any variables using this value will become optimized out.
1883   }
1884   MF->DebugPHIPositions.clear();
1885 
1886   LLVM_DEBUG(dbgs() << "********** EMITTING INSTR REFERENCES **********\n");
1887 
1888   // Re-insert any debug instrs back in the position they were. We must
1889   // re-insert in the same order to ensure that debug instructions don't swap,
1890   // which could re-order assignments. Do so in a batch -- once we find the
1891   // insert position, insert all instructions at the same SlotIdx. They are
1892   // guaranteed to appear in-sequence in StashedDebugInstrs because we insert
1893   // them in order.
1894   for (auto *StashIt = StashedDebugInstrs.begin();
1895        StashIt != StashedDebugInstrs.end(); ++StashIt) {
1896     SlotIndex Idx = StashIt->Idx;
1897     MachineBasicBlock *MBB = StashIt->MBB;
1898     MachineInstr *MI = StashIt->MI;
1899 
1900     auto EmitInstsHere = [this, &StashIt, MBB, Idx,
1901                           MI](MachineBasicBlock::iterator InsertPos) {
1902       // Insert this debug instruction.
1903       MBB->insert(InsertPos, MI);
1904 
1905       // Look at subsequent stashed debug instructions: if they're at the same
1906       // index, insert those too.
1907       auto NextItem = std::next(StashIt);
1908       while (NextItem != StashedDebugInstrs.end() && NextItem->Idx == Idx) {
1909         assert(NextItem->MBB == MBB && "Instrs with same slot index should be"
1910                "in the same block");
1911         MBB->insert(InsertPos, NextItem->MI);
1912         StashIt = NextItem;
1913         NextItem = std::next(StashIt);
1914       };
1915     };
1916 
1917     // Start block index: find the first non-debug instr in the block, and
1918     // insert before it.
1919     if (Idx == Slots->getMBBStartIdx(MBB)) {
1920       MachineBasicBlock::iterator InsertPos =
1921           findInsertLocation(MBB, Idx, *LIS, BBSkipInstsMap);
1922       EmitInstsHere(InsertPos);
1923       continue;
1924     }
1925 
1926     if (MachineInstr *Pos = Slots->getInstructionFromIndex(Idx)) {
1927       // Insert at the end of any debug instructions.
1928       auto PostDebug = std::next(Pos->getIterator());
1929       PostDebug = skipDebugInstructionsForward(PostDebug, MBB->instr_end());
1930       EmitInstsHere(PostDebug);
1931     } else {
1932       // Insert position disappeared; walk forwards through slots until we
1933       // find a new one.
1934       SlotIndex End = Slots->getMBBEndIdx(MBB);
1935       for (; Idx < End; Idx = Slots->getNextNonNullIndex(Idx)) {
1936         Pos = Slots->getInstructionFromIndex(Idx);
1937         if (Pos) {
1938           EmitInstsHere(Pos->getIterator());
1939           break;
1940         }
1941       }
1942 
1943       // We have reached the end of the block and didn't find anywhere to
1944       // insert! It's not safe to discard any debug instructions; place them
1945       // in front of the first terminator, or in front of end().
1946       if (Idx >= End) {
1947         auto TermIt = MBB->getFirstTerminator();
1948         EmitInstsHere(TermIt);
1949       }
1950     }
1951   }
1952 
1953   EmitDone = true;
1954   BBSkipInstsMap.clear();
1955 }
1956 
1957 void LiveDebugVariables::emitDebugValues(VirtRegMap *VRM) {
1958   if (pImpl)
1959     static_cast<LDVImpl*>(pImpl)->emitDebugValues(VRM);
1960 }
1961 
1962 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1963 LLVM_DUMP_METHOD void LiveDebugVariables::dump() const {
1964   if (pImpl)
1965     static_cast<LDVImpl*>(pImpl)->print(dbgs());
1966 }
1967 #endif
1968