1 //===-------- LegalizeTypesGeneric.cpp - Generic type legalization --------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file implements generic type expansion and splitting for LegalizeTypes. 10 // The routines here perform legalization when the details of the type (such as 11 // whether it is an integer or a float) do not matter. 12 // Expansion is the act of changing a computation in an illegal type to be a 13 // computation in two identical registers of a smaller type. The Lo/Hi part 14 // is required to be stored first in memory on little/big-endian machines. 15 // Splitting is the act of changing a computation in an illegal type to be a 16 // computation in two not necessarily identical registers of a smaller type. 17 // There are no requirements on how the type is represented in memory. 18 // 19 //===----------------------------------------------------------------------===// 20 21 #include "LegalizeTypes.h" 22 #include "llvm/IR/DataLayout.h" 23 using namespace llvm; 24 25 #define DEBUG_TYPE "legalize-types" 26 27 //===----------------------------------------------------------------------===// 28 // Generic Result Expansion. 29 //===----------------------------------------------------------------------===// 30 31 // These routines assume that the Lo/Hi part is stored first in memory on 32 // little/big-endian machines, followed by the Hi/Lo part. This means that 33 // they cannot be used as is on vectors, for which Lo is always stored first. 34 void DAGTypeLegalizer::ExpandRes_MERGE_VALUES(SDNode *N, unsigned ResNo, 35 SDValue &Lo, SDValue &Hi) { 36 SDValue Op = DisintegrateMERGE_VALUES(N, ResNo); 37 GetExpandedOp(Op, Lo, Hi); 38 } 39 40 void DAGTypeLegalizer::ExpandRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi) { 41 EVT OutVT = N->getValueType(0); 42 EVT NOutVT = TLI.getTypeToTransformTo(*DAG.getContext(), OutVT); 43 SDValue InOp = N->getOperand(0); 44 EVT InVT = InOp.getValueType(); 45 SDLoc dl(N); 46 47 // Handle some special cases efficiently. 48 switch (getTypeAction(InVT)) { 49 case TargetLowering::TypeLegal: 50 case TargetLowering::TypePromoteInteger: 51 break; 52 case TargetLowering::TypePromoteFloat: 53 llvm_unreachable("Bitcast of a promotion-needing float should never need" 54 "expansion"); 55 case TargetLowering::TypeSoftenFloat: 56 SplitInteger(GetSoftenedFloat(InOp), Lo, Hi); 57 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); 58 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); 59 return; 60 case TargetLowering::TypeExpandInteger: 61 case TargetLowering::TypeExpandFloat: { 62 auto &DL = DAG.getDataLayout(); 63 // Convert the expanded pieces of the input. 64 GetExpandedOp(InOp, Lo, Hi); 65 if (TLI.hasBigEndianPartOrdering(InVT, DL) != 66 TLI.hasBigEndianPartOrdering(OutVT, DL)) 67 std::swap(Lo, Hi); 68 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); 69 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); 70 return; 71 } 72 case TargetLowering::TypeSplitVector: 73 GetSplitVector(InOp, Lo, Hi); 74 if (TLI.hasBigEndianPartOrdering(OutVT, DAG.getDataLayout())) 75 std::swap(Lo, Hi); 76 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); 77 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); 78 return; 79 case TargetLowering::TypeScalarizeVector: 80 // Convert the element instead. 81 SplitInteger(BitConvertToInteger(GetScalarizedVector(InOp)), Lo, Hi); 82 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); 83 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); 84 return; 85 case TargetLowering::TypeWidenVector: { 86 assert(!(InVT.getVectorNumElements() & 1) && "Unsupported BITCAST"); 87 InOp = GetWidenedVector(InOp); 88 EVT LoVT, HiVT; 89 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(InVT); 90 std::tie(Lo, Hi) = DAG.SplitVector(InOp, dl, LoVT, HiVT); 91 if (TLI.hasBigEndianPartOrdering(OutVT, DAG.getDataLayout())) 92 std::swap(Lo, Hi); 93 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); 94 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); 95 return; 96 } 97 } 98 99 if (InVT.isVector() && OutVT.isInteger()) { 100 // Handle cases like i64 = BITCAST v1i64 on x86, where the operand 101 // is legal but the result is not. 102 unsigned NumElems = 2; 103 EVT ElemVT = NOutVT; 104 EVT NVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, NumElems); 105 106 // If <ElemVT * N> is not a legal type, try <ElemVT/2 * (N*2)>. 107 while (!isTypeLegal(NVT)) { 108 unsigned NewSizeInBits = ElemVT.getSizeInBits() / 2; 109 // If the element size is smaller than byte, bail. 110 if (NewSizeInBits < 8) 111 break; 112 NumElems *= 2; 113 ElemVT = EVT::getIntegerVT(*DAG.getContext(), NewSizeInBits); 114 NVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, NumElems); 115 } 116 117 if (isTypeLegal(NVT)) { 118 SDValue CastInOp = DAG.getNode(ISD::BITCAST, dl, NVT, InOp); 119 120 SmallVector<SDValue, 8> Vals; 121 for (unsigned i = 0; i < NumElems; ++i) 122 Vals.push_back(DAG.getNode( 123 ISD::EXTRACT_VECTOR_ELT, dl, ElemVT, CastInOp, 124 DAG.getConstant(i, dl, TLI.getVectorIdxTy(DAG.getDataLayout())))); 125 126 // Build Lo, Hi pair by pairing extracted elements if needed. 127 unsigned Slot = 0; 128 for (unsigned e = Vals.size(); e - Slot > 2; Slot += 2, e += 1) { 129 // Each iteration will BUILD_PAIR two nodes and append the result until 130 // there are only two nodes left, i.e. Lo and Hi. 131 SDValue LHS = Vals[Slot]; 132 SDValue RHS = Vals[Slot + 1]; 133 134 if (DAG.getDataLayout().isBigEndian()) 135 std::swap(LHS, RHS); 136 137 Vals.push_back(DAG.getNode( 138 ISD::BUILD_PAIR, dl, 139 EVT::getIntegerVT(*DAG.getContext(), LHS.getValueSizeInBits() << 1), 140 LHS, RHS)); 141 } 142 Lo = Vals[Slot++]; 143 Hi = Vals[Slot++]; 144 145 if (DAG.getDataLayout().isBigEndian()) 146 std::swap(Lo, Hi); 147 148 return; 149 } 150 } 151 152 // Lower the bit-convert to a store/load from the stack. 153 assert(NOutVT.isByteSized() && "Expanded type not byte sized!"); 154 155 // Create the stack frame object. Make sure it is aligned for both 156 // the source and expanded destination types. 157 unsigned Alignment = DAG.getDataLayout().getPrefTypeAlignment( 158 NOutVT.getTypeForEVT(*DAG.getContext())); 159 SDValue StackPtr = DAG.CreateStackTemporary(InVT, Alignment); 160 int SPFI = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex(); 161 MachinePointerInfo PtrInfo = 162 MachinePointerInfo::getFixedStack(DAG.getMachineFunction(), SPFI); 163 164 // Emit a store to the stack slot. 165 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, InOp, StackPtr, PtrInfo); 166 167 // Load the first half from the stack slot. 168 Lo = DAG.getLoad(NOutVT, dl, Store, StackPtr, PtrInfo); 169 170 // Increment the pointer to the other half. 171 unsigned IncrementSize = NOutVT.getSizeInBits() / 8; 172 StackPtr = DAG.getMemBasePlusOffset(StackPtr, IncrementSize, dl); 173 174 // Load the second half from the stack slot. 175 Hi = DAG.getLoad(NOutVT, dl, Store, StackPtr, 176 PtrInfo.getWithOffset(IncrementSize), 177 MinAlign(Alignment, IncrementSize)); 178 179 // Handle endianness of the load. 180 if (TLI.hasBigEndianPartOrdering(OutVT, DAG.getDataLayout())) 181 std::swap(Lo, Hi); 182 } 183 184 void DAGTypeLegalizer::ExpandRes_BUILD_PAIR(SDNode *N, SDValue &Lo, 185 SDValue &Hi) { 186 // Return the operands. 187 Lo = N->getOperand(0); 188 Hi = N->getOperand(1); 189 } 190 191 void DAGTypeLegalizer::ExpandRes_EXTRACT_ELEMENT(SDNode *N, SDValue &Lo, 192 SDValue &Hi) { 193 GetExpandedOp(N->getOperand(0), Lo, Hi); 194 SDValue Part = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue() ? 195 Hi : Lo; 196 197 assert(Part.getValueType() == N->getValueType(0) && 198 "Type twice as big as expanded type not itself expanded!"); 199 200 GetPairElements(Part, Lo, Hi); 201 } 202 203 void DAGTypeLegalizer::ExpandRes_EXTRACT_VECTOR_ELT(SDNode *N, SDValue &Lo, 204 SDValue &Hi) { 205 SDValue OldVec = N->getOperand(0); 206 unsigned OldElts = OldVec.getValueType().getVectorNumElements(); 207 EVT OldEltVT = OldVec.getValueType().getVectorElementType(); 208 SDLoc dl(N); 209 210 // Convert to a vector of the expanded element type, for example 211 // <3 x i64> -> <6 x i32>. 212 EVT OldVT = N->getValueType(0); 213 EVT NewVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldVT); 214 215 if (OldVT != OldEltVT) { 216 // The result of EXTRACT_VECTOR_ELT may be larger than the element type of 217 // the input vector. If so, extend the elements of the input vector to the 218 // same bitwidth as the result before expanding. 219 assert(OldEltVT.bitsLT(OldVT) && "Result type smaller then element type!"); 220 EVT NVecVT = EVT::getVectorVT(*DAG.getContext(), OldVT, OldElts); 221 OldVec = DAG.getNode(ISD::ANY_EXTEND, dl, NVecVT, N->getOperand(0)); 222 } 223 224 SDValue NewVec = DAG.getNode(ISD::BITCAST, dl, 225 EVT::getVectorVT(*DAG.getContext(), 226 NewVT, 2*OldElts), 227 OldVec); 228 229 // Extract the elements at 2 * Idx and 2 * Idx + 1 from the new vector. 230 SDValue Idx = N->getOperand(1); 231 232 Idx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx, Idx); 233 Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx); 234 235 Idx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx, 236 DAG.getConstant(1, dl, Idx.getValueType())); 237 Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx); 238 239 if (DAG.getDataLayout().isBigEndian()) 240 std::swap(Lo, Hi); 241 } 242 243 void DAGTypeLegalizer::ExpandRes_NormalLoad(SDNode *N, SDValue &Lo, 244 SDValue &Hi) { 245 assert(ISD::isNormalLoad(N) && "This routine only for normal loads!"); 246 SDLoc dl(N); 247 248 LoadSDNode *LD = cast<LoadSDNode>(N); 249 assert(!LD->isAtomic() && "Atomics can not be split"); 250 EVT ValueVT = LD->getValueType(0); 251 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), ValueVT); 252 SDValue Chain = LD->getChain(); 253 SDValue Ptr = LD->getBasePtr(); 254 unsigned Alignment = LD->getAlignment(); 255 AAMDNodes AAInfo = LD->getAAInfo(); 256 257 assert(NVT.isByteSized() && "Expanded type not byte sized!"); 258 259 Lo = DAG.getLoad(NVT, dl, Chain, Ptr, LD->getPointerInfo(), Alignment, 260 LD->getMemOperand()->getFlags(), AAInfo); 261 262 // Increment the pointer to the other half. 263 unsigned IncrementSize = NVT.getSizeInBits() / 8; 264 Ptr = DAG.getMemBasePlusOffset(Ptr, IncrementSize, dl); 265 Hi = DAG.getLoad(NVT, dl, Chain, Ptr, 266 LD->getPointerInfo().getWithOffset(IncrementSize), 267 MinAlign(Alignment, IncrementSize), 268 LD->getMemOperand()->getFlags(), AAInfo); 269 270 // Build a factor node to remember that this load is independent of the 271 // other one. 272 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue(1), 273 Hi.getValue(1)); 274 275 // Handle endianness of the load. 276 if (TLI.hasBigEndianPartOrdering(ValueVT, DAG.getDataLayout())) 277 std::swap(Lo, Hi); 278 279 // Modified the chain - switch anything that used the old chain to use 280 // the new one. 281 ReplaceValueWith(SDValue(N, 1), Chain); 282 } 283 284 void DAGTypeLegalizer::ExpandRes_VAARG(SDNode *N, SDValue &Lo, SDValue &Hi) { 285 EVT OVT = N->getValueType(0); 286 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), OVT); 287 SDValue Chain = N->getOperand(0); 288 SDValue Ptr = N->getOperand(1); 289 SDLoc dl(N); 290 const unsigned Align = N->getConstantOperandVal(3); 291 292 Lo = DAG.getVAArg(NVT, dl, Chain, Ptr, N->getOperand(2), Align); 293 Hi = DAG.getVAArg(NVT, dl, Lo.getValue(1), Ptr, N->getOperand(2), 0); 294 Chain = Hi.getValue(1); 295 296 // Handle endianness of the load. 297 if (TLI.hasBigEndianPartOrdering(OVT, DAG.getDataLayout())) 298 std::swap(Lo, Hi); 299 300 // Modified the chain - switch anything that used the old chain to use 301 // the new one. 302 ReplaceValueWith(SDValue(N, 1), Chain); 303 } 304 305 306 //===--------------------------------------------------------------------===// 307 // Generic Operand Expansion. 308 //===--------------------------------------------------------------------===// 309 310 void DAGTypeLegalizer::IntegerToVector(SDValue Op, unsigned NumElements, 311 SmallVectorImpl<SDValue> &Ops, 312 EVT EltVT) { 313 assert(Op.getValueType().isInteger()); 314 SDLoc DL(Op); 315 SDValue Parts[2]; 316 317 if (NumElements > 1) { 318 NumElements >>= 1; 319 SplitInteger(Op, Parts[0], Parts[1]); 320 if (DAG.getDataLayout().isBigEndian()) 321 std::swap(Parts[0], Parts[1]); 322 IntegerToVector(Parts[0], NumElements, Ops, EltVT); 323 IntegerToVector(Parts[1], NumElements, Ops, EltVT); 324 } else { 325 Ops.push_back(DAG.getNode(ISD::BITCAST, DL, EltVT, Op)); 326 } 327 } 328 329 SDValue DAGTypeLegalizer::ExpandOp_BITCAST(SDNode *N) { 330 SDLoc dl(N); 331 if (N->getValueType(0).isVector() && 332 N->getOperand(0).getValueType().isInteger()) { 333 // An illegal expanding type is being converted to a legal vector type. 334 // Make a two element vector out of the expanded parts and convert that 335 // instead, but only if the new vector type is legal (otherwise there 336 // is no point, and it might create expansion loops). For example, on 337 // x86 this turns v1i64 = BITCAST i64 into v1i64 = BITCAST v2i32. 338 // 339 // FIXME: I'm not sure why we are first trying to split the input into 340 // a 2 element vector, so I'm leaving it here to maintain the current 341 // behavior. 342 unsigned NumElts = 2; 343 EVT OVT = N->getOperand(0).getValueType(); 344 EVT NVT = EVT::getVectorVT(*DAG.getContext(), 345 TLI.getTypeToTransformTo(*DAG.getContext(), OVT), 346 NumElts); 347 if (!isTypeLegal(NVT)) { 348 // If we can't find a legal type by splitting the integer in half, 349 // then we can use the node's value type. 350 NumElts = N->getValueType(0).getVectorNumElements(); 351 NVT = N->getValueType(0); 352 } 353 354 SmallVector<SDValue, 8> Ops; 355 IntegerToVector(N->getOperand(0), NumElts, Ops, NVT.getVectorElementType()); 356 357 SDValue Vec = 358 DAG.getBuildVector(NVT, dl, makeArrayRef(Ops.data(), NumElts)); 359 return DAG.getNode(ISD::BITCAST, dl, N->getValueType(0), Vec); 360 } 361 362 // Otherwise, store to a temporary and load out again as the new type. 363 return CreateStackStoreLoad(N->getOperand(0), N->getValueType(0)); 364 } 365 366 SDValue DAGTypeLegalizer::ExpandOp_BUILD_VECTOR(SDNode *N) { 367 // The vector type is legal but the element type needs expansion. 368 EVT VecVT = N->getValueType(0); 369 unsigned NumElts = VecVT.getVectorNumElements(); 370 EVT OldVT = N->getOperand(0).getValueType(); 371 EVT NewVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldVT); 372 SDLoc dl(N); 373 374 assert(OldVT == VecVT.getVectorElementType() && 375 "BUILD_VECTOR operand type doesn't match vector element type!"); 376 377 // Build a vector of twice the length out of the expanded elements. 378 // For example <3 x i64> -> <6 x i32>. 379 SmallVector<SDValue, 16> NewElts; 380 NewElts.reserve(NumElts*2); 381 382 for (unsigned i = 0; i < NumElts; ++i) { 383 SDValue Lo, Hi; 384 GetExpandedOp(N->getOperand(i), Lo, Hi); 385 if (DAG.getDataLayout().isBigEndian()) 386 std::swap(Lo, Hi); 387 NewElts.push_back(Lo); 388 NewElts.push_back(Hi); 389 } 390 391 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NewElts.size()); 392 SDValue NewVec = DAG.getBuildVector(NewVecVT, dl, NewElts); 393 394 // Convert the new vector to the old vector type. 395 return DAG.getNode(ISD::BITCAST, dl, VecVT, NewVec); 396 } 397 398 SDValue DAGTypeLegalizer::ExpandOp_EXTRACT_ELEMENT(SDNode *N) { 399 SDValue Lo, Hi; 400 GetExpandedOp(N->getOperand(0), Lo, Hi); 401 return cast<ConstantSDNode>(N->getOperand(1))->getZExtValue() ? Hi : Lo; 402 } 403 404 SDValue DAGTypeLegalizer::ExpandOp_INSERT_VECTOR_ELT(SDNode *N) { 405 // The vector type is legal but the element type needs expansion. 406 EVT VecVT = N->getValueType(0); 407 unsigned NumElts = VecVT.getVectorNumElements(); 408 SDLoc dl(N); 409 410 SDValue Val = N->getOperand(1); 411 EVT OldEVT = Val.getValueType(); 412 EVT NewEVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldEVT); 413 414 assert(OldEVT == VecVT.getVectorElementType() && 415 "Inserted element type doesn't match vector element type!"); 416 417 // Bitconvert to a vector of twice the length with elements of the expanded 418 // type, insert the expanded vector elements, and then convert back. 419 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewEVT, NumElts*2); 420 SDValue NewVec = DAG.getNode(ISD::BITCAST, dl, 421 NewVecVT, N->getOperand(0)); 422 423 SDValue Lo, Hi; 424 GetExpandedOp(Val, Lo, Hi); 425 if (DAG.getDataLayout().isBigEndian()) 426 std::swap(Lo, Hi); 427 428 SDValue Idx = N->getOperand(2); 429 Idx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx, Idx); 430 NewVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, NewVec, Lo, Idx); 431 Idx = DAG.getNode(ISD::ADD, dl, 432 Idx.getValueType(), Idx, 433 DAG.getConstant(1, dl, Idx.getValueType())); 434 NewVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, NewVec, Hi, Idx); 435 436 // Convert the new vector to the old vector type. 437 return DAG.getNode(ISD::BITCAST, dl, VecVT, NewVec); 438 } 439 440 SDValue DAGTypeLegalizer::ExpandOp_SCALAR_TO_VECTOR(SDNode *N) { 441 SDLoc dl(N); 442 EVT VT = N->getValueType(0); 443 assert(VT.getVectorElementType() == N->getOperand(0).getValueType() && 444 "SCALAR_TO_VECTOR operand type doesn't match vector element type!"); 445 unsigned NumElts = VT.getVectorNumElements(); 446 SmallVector<SDValue, 16> Ops(NumElts); 447 Ops[0] = N->getOperand(0); 448 SDValue UndefVal = DAG.getUNDEF(Ops[0].getValueType()); 449 for (unsigned i = 1; i < NumElts; ++i) 450 Ops[i] = UndefVal; 451 return DAG.getBuildVector(VT, dl, Ops); 452 } 453 454 SDValue DAGTypeLegalizer::ExpandOp_NormalStore(SDNode *N, unsigned OpNo) { 455 assert(ISD::isNormalStore(N) && "This routine only for normal stores!"); 456 assert(OpNo == 1 && "Can only expand the stored value so far"); 457 SDLoc dl(N); 458 459 StoreSDNode *St = cast<StoreSDNode>(N); 460 assert(!St->isAtomic() && "Atomics can not be split"); 461 EVT ValueVT = St->getValue().getValueType(); 462 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), ValueVT); 463 SDValue Chain = St->getChain(); 464 SDValue Ptr = St->getBasePtr(); 465 unsigned Alignment = St->getAlignment(); 466 AAMDNodes AAInfo = St->getAAInfo(); 467 468 assert(NVT.isByteSized() && "Expanded type not byte sized!"); 469 unsigned IncrementSize = NVT.getSizeInBits() / 8; 470 471 SDValue Lo, Hi; 472 GetExpandedOp(St->getValue(), Lo, Hi); 473 474 if (TLI.hasBigEndianPartOrdering(ValueVT, DAG.getDataLayout())) 475 std::swap(Lo, Hi); 476 477 Lo = DAG.getStore(Chain, dl, Lo, Ptr, St->getPointerInfo(), Alignment, 478 St->getMemOperand()->getFlags(), AAInfo); 479 480 Ptr = DAG.getObjectPtrOffset(dl, Ptr, IncrementSize); 481 Hi = DAG.getStore(Chain, dl, Hi, Ptr, 482 St->getPointerInfo().getWithOffset(IncrementSize), 483 MinAlign(Alignment, IncrementSize), 484 St->getMemOperand()->getFlags(), AAInfo); 485 486 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo, Hi); 487 } 488 489 490 //===--------------------------------------------------------------------===// 491 // Generic Result Splitting. 492 //===--------------------------------------------------------------------===// 493 494 // Be careful to make no assumptions about which of Lo/Hi is stored first in 495 // memory (for vectors it is always Lo first followed by Hi in the following 496 // bytes; for integers and floats it is Lo first if and only if the machine is 497 // little-endian). 498 499 void DAGTypeLegalizer::SplitRes_MERGE_VALUES(SDNode *N, unsigned ResNo, 500 SDValue &Lo, SDValue &Hi) { 501 SDValue Op = DisintegrateMERGE_VALUES(N, ResNo); 502 GetSplitOp(Op, Lo, Hi); 503 } 504 505 void DAGTypeLegalizer::SplitRes_SELECT(SDNode *N, SDValue &Lo, SDValue &Hi) { 506 SDValue LL, LH, RL, RH, CL, CH; 507 SDLoc dl(N); 508 GetSplitOp(N->getOperand(1), LL, LH); 509 GetSplitOp(N->getOperand(2), RL, RH); 510 511 SDValue Cond = N->getOperand(0); 512 CL = CH = Cond; 513 if (Cond.getValueType().isVector()) { 514 if (SDValue Res = WidenVSELECTAndMask(N)) 515 std::tie(CL, CH) = DAG.SplitVector(Res->getOperand(0), dl); 516 // Check if there are already splitted versions of the vector available and 517 // use those instead of splitting the mask operand again. 518 else if (getTypeAction(Cond.getValueType()) == 519 TargetLowering::TypeSplitVector) 520 GetSplitVector(Cond, CL, CH); 521 // It seems to improve code to generate two narrow SETCCs as opposed to 522 // splitting a wide result vector. 523 else if (Cond.getOpcode() == ISD::SETCC) { 524 // If the condition is a vXi1 vector, and the LHS of the setcc is a legal 525 // type and the setcc result type is the same vXi1, then leave the setcc 526 // alone. 527 EVT CondLHSVT = Cond.getOperand(0).getValueType(); 528 if (Cond.getValueType().getVectorElementType() == MVT::i1 && 529 isTypeLegal(CondLHSVT) && 530 getSetCCResultType(CondLHSVT) == Cond.getValueType()) 531 std::tie(CL, CH) = DAG.SplitVector(Cond, dl); 532 else 533 SplitVecRes_SETCC(Cond.getNode(), CL, CH); 534 } else 535 std::tie(CL, CH) = DAG.SplitVector(Cond, dl); 536 } 537 538 Lo = DAG.getNode(N->getOpcode(), dl, LL.getValueType(), CL, LL, RL); 539 Hi = DAG.getNode(N->getOpcode(), dl, LH.getValueType(), CH, LH, RH); 540 } 541 542 void DAGTypeLegalizer::SplitRes_SELECT_CC(SDNode *N, SDValue &Lo, 543 SDValue &Hi) { 544 SDValue LL, LH, RL, RH; 545 SDLoc dl(N); 546 GetSplitOp(N->getOperand(2), LL, LH); 547 GetSplitOp(N->getOperand(3), RL, RH); 548 549 Lo = DAG.getNode(ISD::SELECT_CC, dl, LL.getValueType(), N->getOperand(0), 550 N->getOperand(1), LL, RL, N->getOperand(4)); 551 Hi = DAG.getNode(ISD::SELECT_CC, dl, LH.getValueType(), N->getOperand(0), 552 N->getOperand(1), LH, RH, N->getOperand(4)); 553 } 554 555 void DAGTypeLegalizer::SplitRes_UNDEF(SDNode *N, SDValue &Lo, SDValue &Hi) { 556 EVT LoVT, HiVT; 557 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0)); 558 Lo = DAG.getUNDEF(LoVT); 559 Hi = DAG.getUNDEF(HiVT); 560 } 561