1 //===- MC/MCRegisterInfo.cpp - Target Register Description ----------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file implements MCRegisterInfo functions. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "llvm/MC/MCRegisterInfo.h" 14 #include "llvm/ADT/DenseMap.h" 15 #include "llvm/ADT/Twine.h" 16 #include "llvm/Support/ErrorHandling.h" 17 #include <algorithm> 18 #include <cassert> 19 #include <cstdint> 20 21 using namespace llvm; 22 23 MCRegister 24 MCRegisterInfo::getMatchingSuperReg(MCRegister Reg, unsigned SubIdx, 25 const MCRegisterClass *RC) const { 26 for (MCSuperRegIterator Supers(Reg, this); Supers.isValid(); ++Supers) 27 if (RC->contains(*Supers) && Reg == getSubReg(*Supers, SubIdx)) 28 return *Supers; 29 return 0; 30 } 31 32 MCRegister MCRegisterInfo::getSubReg(MCRegister Reg, unsigned Idx) const { 33 assert(Idx && Idx < getNumSubRegIndices() && 34 "This is not a subregister index"); 35 // Get a pointer to the corresponding SubRegIndices list. This list has the 36 // name of each sub-register in the same order as MCSubRegIterator. 37 const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices; 38 for (MCSubRegIterator Subs(Reg, this); Subs.isValid(); ++Subs, ++SRI) 39 if (*SRI == Idx) 40 return *Subs; 41 return 0; 42 } 43 44 unsigned MCRegisterInfo::getSubRegIndex(MCRegister Reg, 45 MCRegister SubReg) const { 46 assert(SubReg && SubReg < getNumRegs() && "This is not a register"); 47 // Get a pointer to the corresponding SubRegIndices list. This list has the 48 // name of each sub-register in the same order as MCSubRegIterator. 49 const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices; 50 for (MCSubRegIterator Subs(Reg, this); Subs.isValid(); ++Subs, ++SRI) 51 if (*Subs == SubReg) 52 return *SRI; 53 return 0; 54 } 55 56 unsigned MCRegisterInfo::getSubRegIdxSize(unsigned Idx) const { 57 assert(Idx && Idx < getNumSubRegIndices() && 58 "This is not a subregister index"); 59 return SubRegIdxRanges[Idx].Size; 60 } 61 62 unsigned MCRegisterInfo::getSubRegIdxOffset(unsigned Idx) const { 63 assert(Idx && Idx < getNumSubRegIndices() && 64 "This is not a subregister index"); 65 return SubRegIdxRanges[Idx].Offset; 66 } 67 68 int MCRegisterInfo::getDwarfRegNum(MCRegister RegNum, bool isEH) const { 69 const DwarfLLVMRegPair *M = isEH ? EHL2DwarfRegs : L2DwarfRegs; 70 unsigned Size = isEH ? EHL2DwarfRegsSize : L2DwarfRegsSize; 71 72 if (!M) 73 return -1; 74 DwarfLLVMRegPair Key = { RegNum, 0 }; 75 const DwarfLLVMRegPair *I = std::lower_bound(M, M+Size, Key); 76 if (I == M+Size || I->FromReg != RegNum) 77 return -1; 78 return I->ToReg; 79 } 80 81 Optional<unsigned> MCRegisterInfo::getLLVMRegNum(unsigned RegNum, 82 bool isEH) const { 83 const DwarfLLVMRegPair *M = isEH ? EHDwarf2LRegs : Dwarf2LRegs; 84 unsigned Size = isEH ? EHDwarf2LRegsSize : Dwarf2LRegsSize; 85 86 if (!M) 87 return None; 88 DwarfLLVMRegPair Key = { RegNum, 0 }; 89 const DwarfLLVMRegPair *I = std::lower_bound(M, M+Size, Key); 90 if (I != M + Size && I->FromReg == RegNum) 91 return I->ToReg; 92 return None; 93 } 94 95 int MCRegisterInfo::getDwarfRegNumFromDwarfEHRegNum(unsigned RegNum) const { 96 // On ELF platforms, DWARF EH register numbers are the same as DWARF 97 // other register numbers. On Darwin x86, they differ and so need to be 98 // mapped. The .cfi_* directives accept integer literals as well as 99 // register names and should generate exactly what the assembly code 100 // asked for, so there might be DWARF/EH register numbers that don't have 101 // a corresponding LLVM register number at all. So if we can't map the 102 // EH register number to an LLVM register number, assume it's just a 103 // valid DWARF register number as is. 104 if (Optional<unsigned> LRegNum = getLLVMRegNum(RegNum, true)) 105 return getDwarfRegNum(*LRegNum, false); 106 return RegNum; 107 } 108 109 int MCRegisterInfo::getSEHRegNum(MCRegister RegNum) const { 110 const DenseMap<MCRegister, int>::const_iterator I = L2SEHRegs.find(RegNum); 111 if (I == L2SEHRegs.end()) return (int)RegNum; 112 return I->second; 113 } 114 115 int MCRegisterInfo::getCodeViewRegNum(MCRegister RegNum) const { 116 if (L2CVRegs.empty()) 117 report_fatal_error("target does not implement codeview register mapping"); 118 const DenseMap<MCRegister, int>::const_iterator I = L2CVRegs.find(RegNum); 119 if (I == L2CVRegs.end()) 120 report_fatal_error("unknown codeview register " + (RegNum < getNumRegs() 121 ? getName(RegNum) 122 : Twine(RegNum))); 123 return I->second; 124 } 125 126 bool MCRegisterInfo::regsOverlap(MCRegister RegA, MCRegister RegB) const { 127 // Regunits are numerically ordered. Find a common unit. 128 MCRegUnitIterator RUA(RegA, this); 129 MCRegUnitIterator RUB(RegB, this); 130 do { 131 if (*RUA == *RUB) 132 return true; 133 } while (*RUA < *RUB ? (++RUA).isValid() : (++RUB).isValid()); 134 return false; 135 } 136