1 //===- MCSubtargetInfo.cpp - Subtarget Information ------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "llvm/MC/MCSubtargetInfo.h"
10 #include "llvm/ADT/ArrayRef.h"
11 #include "llvm/ADT/StringRef.h"
12 #include "llvm/MC/MCInstrItineraries.h"
13 #include "llvm/MC/MCSchedule.h"
14 #include "llvm/MC/SubtargetFeature.h"
15 #include "llvm/Support/Format.h"
16 #include "llvm/Support/raw_ostream.h"
17 #include <algorithm>
18 #include <cassert>
19 #include <cstring>
20 
21 using namespace llvm;
22 
23 /// Find KV in array using binary search.
24 template <typename T>
25 static const T *Find(StringRef S, ArrayRef<T> A) {
26   // Binary search the array
27   auto F = llvm::lower_bound(A, S);
28   // If not found then return NULL
29   if (F == A.end() || StringRef(F->Key) != S) return nullptr;
30   // Return the found array item
31   return F;
32 }
33 
34 /// For each feature that is (transitively) implied by this feature, set it.
35 static
36 void SetImpliedBits(FeatureBitset &Bits, const FeatureBitset &Implies,
37                     ArrayRef<SubtargetFeatureKV> FeatureTable) {
38   // OR the Implies bits in outside the loop. This allows the Implies for CPUs
39   // which might imply features not in FeatureTable to use this.
40   Bits |= Implies;
41   for (const SubtargetFeatureKV &FE : FeatureTable)
42     if (Implies.test(FE.Value))
43       SetImpliedBits(Bits, FE.Implies.getAsBitset(), FeatureTable);
44 }
45 
46 /// For each feature that (transitively) implies this feature, clear it.
47 static
48 void ClearImpliedBits(FeatureBitset &Bits, unsigned Value,
49                       ArrayRef<SubtargetFeatureKV> FeatureTable) {
50   for (const SubtargetFeatureKV &FE : FeatureTable) {
51     if (FE.Implies.getAsBitset().test(Value)) {
52       Bits.reset(FE.Value);
53       ClearImpliedBits(Bits, FE.Value, FeatureTable);
54     }
55   }
56 }
57 
58 static void ApplyFeatureFlag(FeatureBitset &Bits, StringRef Feature,
59                              ArrayRef<SubtargetFeatureKV> FeatureTable) {
60   assert(SubtargetFeatures::hasFlag(Feature) &&
61          "Feature flags should start with '+' or '-'");
62 
63   // Find feature in table.
64   const SubtargetFeatureKV *FeatureEntry =
65       Find(SubtargetFeatures::StripFlag(Feature), FeatureTable);
66   // If there is a match
67   if (FeatureEntry) {
68     // Enable/disable feature in bits
69     if (SubtargetFeatures::isEnabled(Feature)) {
70       Bits.set(FeatureEntry->Value);
71 
72       // For each feature that this implies, set it.
73       SetImpliedBits(Bits, FeatureEntry->Implies.getAsBitset(), FeatureTable);
74     } else {
75       Bits.reset(FeatureEntry->Value);
76 
77       // For each feature that implies this, clear it.
78       ClearImpliedBits(Bits, FeatureEntry->Value, FeatureTable);
79     }
80   } else {
81     errs() << "'" << Feature << "' is not a recognized feature for this target"
82            << " (ignoring feature)\n";
83   }
84 }
85 
86 /// Return the length of the longest entry in the table.
87 template <typename T>
88 static size_t getLongestEntryLength(ArrayRef<T> Table) {
89   size_t MaxLen = 0;
90   for (auto &I : Table)
91     MaxLen = std::max(MaxLen, std::strlen(I.Key));
92   return MaxLen;
93 }
94 
95 /// Display help for feature and mcpu choices.
96 static void Help(ArrayRef<SubtargetSubTypeKV> CPUTable,
97                  ArrayRef<SubtargetFeatureKV> FeatTable) {
98   // the static variable ensures that the help information only gets
99   // printed once even though a target machine creates multiple subtargets
100   static bool PrintOnce = false;
101   if (PrintOnce) {
102     return;
103   }
104 
105   // Determine the length of the longest CPU and Feature entries.
106   unsigned MaxCPULen  = getLongestEntryLength(CPUTable);
107   unsigned MaxFeatLen = getLongestEntryLength(FeatTable);
108 
109   // Print the CPU table.
110   errs() << "Available CPUs for this target:\n\n";
111   for (auto &CPU : CPUTable)
112     errs() << format("  %-*s - Select the %s processor.\n", MaxCPULen, CPU.Key,
113                      CPU.Key);
114   errs() << '\n';
115 
116   // Print the Feature table.
117   errs() << "Available features for this target:\n\n";
118   for (auto &Feature : FeatTable)
119     errs() << format("  %-*s - %s.\n", MaxFeatLen, Feature.Key, Feature.Desc);
120   errs() << '\n';
121 
122   errs() << "Use +feature to enable a feature, or -feature to disable it.\n"
123             "For example, llc -mcpu=mycpu -mattr=+feature1,-feature2\n";
124 
125   PrintOnce = true;
126 }
127 
128 /// Display help for mcpu choices only
129 static void cpuHelp(ArrayRef<SubtargetSubTypeKV> CPUTable) {
130   // the static variable ensures that the help information only gets
131   // printed once even though a target machine creates multiple subtargets
132   static bool PrintOnce = false;
133   if (PrintOnce) {
134     return;
135   }
136 
137   // Print the CPU table.
138   errs() << "Available CPUs for this target:\n\n";
139   for (auto &CPU : CPUTable)
140     errs() << "\t" << CPU.Key << "\n";
141   errs() << '\n';
142 
143   errs() << "Use -mcpu or -mtune to specify the target's processor.\n"
144             "For example, clang --target=aarch64-unknown-linux-gui "
145             "-mcpu=cortex-a35\n";
146 
147   PrintOnce = true;
148 }
149 
150 static FeatureBitset getFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS,
151                                  ArrayRef<SubtargetSubTypeKV> ProcDesc,
152                                  ArrayRef<SubtargetFeatureKV> ProcFeatures) {
153   SubtargetFeatures Features(FS);
154 
155   if (ProcDesc.empty() || ProcFeatures.empty())
156     return FeatureBitset();
157 
158   assert(llvm::is_sorted(ProcDesc) && "CPU table is not sorted");
159   assert(llvm::is_sorted(ProcFeatures) && "CPU features table is not sorted");
160   // Resulting bits
161   FeatureBitset Bits;
162 
163   // Check if help is needed
164   if (CPU == "help")
165     Help(ProcDesc, ProcFeatures);
166 
167   // Find CPU entry if CPU name is specified.
168   else if (!CPU.empty()) {
169     const SubtargetSubTypeKV *CPUEntry = Find(CPU, ProcDesc);
170 
171     // If there is a match
172     if (CPUEntry) {
173       // Set the features implied by this CPU feature, if any.
174       SetImpliedBits(Bits, CPUEntry->Implies.getAsBitset(), ProcFeatures);
175     } else {
176       errs() << "'" << CPU << "' is not a recognized processor for this target"
177              << " (ignoring processor)\n";
178     }
179   }
180 
181   if (!TuneCPU.empty()) {
182     const SubtargetSubTypeKV *CPUEntry = Find(TuneCPU, ProcDesc);
183 
184     // If there is a match
185     if (CPUEntry) {
186       // Set the features implied by this CPU feature, if any.
187       SetImpliedBits(Bits, CPUEntry->TuneImplies.getAsBitset(), ProcFeatures);
188     } else if (TuneCPU != CPU) {
189       errs() << "'" << TuneCPU << "' is not a recognized processor for this "
190              << "target (ignoring processor)\n";
191     }
192   }
193 
194   // Iterate through each feature
195   for (const std::string &Feature : Features.getFeatures()) {
196     // Check for help
197     if (Feature == "+help")
198       Help(ProcDesc, ProcFeatures);
199     else if (Feature == "+cpuhelp")
200       cpuHelp(ProcDesc);
201     else
202       ApplyFeatureFlag(Bits, Feature, ProcFeatures);
203   }
204 
205   return Bits;
206 }
207 
208 void MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU, StringRef TuneCPU,
209                                           StringRef FS) {
210   FeatureBits = getFeatures(CPU, TuneCPU, FS, ProcDesc, ProcFeatures);
211   FeatureString = std::string(FS);
212 
213   if (!TuneCPU.empty())
214     CPUSchedModel = &getSchedModelForCPU(TuneCPU);
215   else
216     CPUSchedModel = &MCSchedModel::GetDefaultSchedModel();
217 }
218 
219 void MCSubtargetInfo::setDefaultFeatures(StringRef CPU, StringRef TuneCPU,
220                                          StringRef FS) {
221   FeatureBits = getFeatures(CPU, TuneCPU, FS, ProcDesc, ProcFeatures);
222   FeatureString = std::string(FS);
223 }
224 
225 MCSubtargetInfo::MCSubtargetInfo(const Triple &TT, StringRef C, StringRef TC,
226                                  StringRef FS, ArrayRef<SubtargetFeatureKV> PF,
227                                  ArrayRef<SubtargetSubTypeKV> PD,
228                                  const MCWriteProcResEntry *WPR,
229                                  const MCWriteLatencyEntry *WL,
230                                  const MCReadAdvanceEntry *RA,
231                                  const InstrStage *IS, const unsigned *OC,
232                                  const unsigned *FP)
233     : TargetTriple(TT), CPU(std::string(C)), TuneCPU(std::string(TC)),
234       ProcFeatures(PF), ProcDesc(PD), WriteProcResTable(WPR),
235       WriteLatencyTable(WL), ReadAdvanceTable(RA), Stages(IS),
236       OperandCycles(OC), ForwardingPaths(FP) {
237   InitMCProcessorInfo(CPU, TuneCPU, FS);
238 }
239 
240 FeatureBitset MCSubtargetInfo::ToggleFeature(uint64_t FB) {
241   FeatureBits.flip(FB);
242   return FeatureBits;
243 }
244 
245 FeatureBitset MCSubtargetInfo::ToggleFeature(const FeatureBitset &FB) {
246   FeatureBits ^= FB;
247   return FeatureBits;
248 }
249 
250 FeatureBitset MCSubtargetInfo::SetFeatureBitsTransitively(
251   const FeatureBitset &FB) {
252   SetImpliedBits(FeatureBits, FB, ProcFeatures);
253   return FeatureBits;
254 }
255 
256 FeatureBitset MCSubtargetInfo::ClearFeatureBitsTransitively(
257   const FeatureBitset &FB) {
258   for (unsigned I = 0, E = FB.size(); I < E; I++) {
259     if (FB[I]) {
260       FeatureBits.reset(I);
261       ClearImpliedBits(FeatureBits, I, ProcFeatures);
262     }
263   }
264   return FeatureBits;
265 }
266 
267 FeatureBitset MCSubtargetInfo::ToggleFeature(StringRef Feature) {
268   // Find feature in table.
269   const SubtargetFeatureKV *FeatureEntry =
270       Find(SubtargetFeatures::StripFlag(Feature), ProcFeatures);
271   // If there is a match
272   if (FeatureEntry) {
273     if (FeatureBits.test(FeatureEntry->Value)) {
274       FeatureBits.reset(FeatureEntry->Value);
275       // For each feature that implies this, clear it.
276       ClearImpliedBits(FeatureBits, FeatureEntry->Value, ProcFeatures);
277     } else {
278       FeatureBits.set(FeatureEntry->Value);
279 
280       // For each feature that this implies, set it.
281       SetImpliedBits(FeatureBits, FeatureEntry->Implies.getAsBitset(),
282                      ProcFeatures);
283     }
284   } else {
285     errs() << "'" << Feature << "' is not a recognized feature for this target"
286            << " (ignoring feature)\n";
287   }
288 
289   return FeatureBits;
290 }
291 
292 FeatureBitset MCSubtargetInfo::ApplyFeatureFlag(StringRef FS) {
293   ::ApplyFeatureFlag(FeatureBits, FS, ProcFeatures);
294   return FeatureBits;
295 }
296 
297 bool MCSubtargetInfo::checkFeatures(StringRef FS) const {
298   SubtargetFeatures T(FS);
299   FeatureBitset Set, All;
300   for (std::string F : T.getFeatures()) {
301     ::ApplyFeatureFlag(Set, F, ProcFeatures);
302     if (F[0] == '-')
303       F[0] = '+';
304     ::ApplyFeatureFlag(All, F, ProcFeatures);
305   }
306   return (FeatureBits & All) == Set;
307 }
308 
309 const MCSchedModel &MCSubtargetInfo::getSchedModelForCPU(StringRef CPU) const {
310   assert(llvm::is_sorted(ProcDesc) &&
311          "Processor machine model table is not sorted");
312 
313   // Find entry
314   const SubtargetSubTypeKV *CPUEntry = Find(CPU, ProcDesc);
315 
316   if (!CPUEntry) {
317     if (CPU != "help") // Don't error if the user asked for help.
318       errs() << "'" << CPU
319              << "' is not a recognized processor for this target"
320              << " (ignoring processor)\n";
321     return MCSchedModel::GetDefaultSchedModel();
322   }
323   assert(CPUEntry->SchedModel && "Missing processor SchedModel value");
324   return *CPUEntry->SchedModel;
325 }
326 
327 InstrItineraryData
328 MCSubtargetInfo::getInstrItineraryForCPU(StringRef CPU) const {
329   const MCSchedModel &SchedModel = getSchedModelForCPU(CPU);
330   return InstrItineraryData(SchedModel, Stages, OperandCycles, ForwardingPaths);
331 }
332 
333 void MCSubtargetInfo::initInstrItins(InstrItineraryData &InstrItins) const {
334   InstrItins = InstrItineraryData(getSchedModel(), Stages, OperandCycles,
335                                   ForwardingPaths);
336 }
337 
338 Optional<unsigned> MCSubtargetInfo::getCacheSize(unsigned Level) const {
339   return Optional<unsigned>();
340 }
341 
342 Optional<unsigned>
343 MCSubtargetInfo::getCacheAssociativity(unsigned Level) const {
344   return Optional<unsigned>();
345 }
346 
347 Optional<unsigned> MCSubtargetInfo::getCacheLineSize(unsigned Level) const {
348   return Optional<unsigned>();
349 }
350 
351 unsigned MCSubtargetInfo::getPrefetchDistance() const {
352   return 0;
353 }
354 
355 unsigned MCSubtargetInfo::getMaxPrefetchIterationsAhead() const {
356   return UINT_MAX;
357 }
358 
359 bool MCSubtargetInfo::enableWritePrefetching() const {
360   return false;
361 }
362 
363 unsigned MCSubtargetInfo::getMinPrefetchStride(unsigned NumMemAccesses,
364                                                unsigned NumStridedMemAccesses,
365                                                unsigned NumPrefetches,
366                                                bool HasCall) const {
367   return 1;
368 }
369