10b57cec5SDimitry Andric //===-- AArch64InstPrinter.h - Convert AArch64 MCInst to assembly syntax --===// 20b57cec5SDimitry Andric // 30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric // 70b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric // 90b57cec5SDimitry Andric // This class prints an AArch64 MCInst to a .s file. 100b57cec5SDimitry Andric // 110b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 120b57cec5SDimitry Andric 130b57cec5SDimitry Andric #ifndef LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64INSTPRINTER_H 140b57cec5SDimitry Andric #define LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64INSTPRINTER_H 150b57cec5SDimitry Andric 160b57cec5SDimitry Andric #include "MCTargetDesc/AArch64MCTargetDesc.h" 170b57cec5SDimitry Andric #include "llvm/ADT/StringRef.h" 180b57cec5SDimitry Andric #include "llvm/MC/MCInstPrinter.h" 190b57cec5SDimitry Andric #include "../Utils/AArch64BaseInfo.h" 200b57cec5SDimitry Andric 210b57cec5SDimitry Andric namespace llvm { 220b57cec5SDimitry Andric 230b57cec5SDimitry Andric class AArch64InstPrinter : public MCInstPrinter { 240b57cec5SDimitry Andric public: 250b57cec5SDimitry Andric AArch64InstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII, 260b57cec5SDimitry Andric const MCRegisterInfo &MRI); 270b57cec5SDimitry Andric 28fe6060f1SDimitry Andric bool applyTargetSpecificCLOption(StringRef Opt) override; 29fe6060f1SDimitry Andric 30480093f4SDimitry Andric void printInst(const MCInst *MI, uint64_t Address, StringRef Annot, 31480093f4SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O) override; 32bdd1243dSDimitry Andric void printRegName(raw_ostream &OS, MCRegister Reg) const override; 33bdd1243dSDimitry Andric void printRegName(raw_ostream &OS, MCRegister Reg, unsigned AltIdx) const; 340b57cec5SDimitry Andric 350b57cec5SDimitry Andric // Autogenerated by tblgen. 36e8d8bef9SDimitry Andric std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override; 37480093f4SDimitry Andric virtual void printInstruction(const MCInst *MI, uint64_t Address, 38480093f4SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 395ffd83dbSDimitry Andric virtual bool printAliasInstr(const MCInst *MI, uint64_t Address, 405ffd83dbSDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 415ffd83dbSDimitry Andric virtual void printCustomAliasOperand(const MCInst *MI, uint64_t Address, 425ffd83dbSDimitry Andric unsigned OpIdx, unsigned PrintMethodIdx, 430b57cec5SDimitry Andric const MCSubtargetInfo &STI, 440b57cec5SDimitry Andric raw_ostream &O); 450b57cec5SDimitry Andric 46bdd1243dSDimitry Andric virtual StringRef getRegName(MCRegister Reg) const; 470b57cec5SDimitry Andric 48bdd1243dSDimitry Andric static const char *getRegisterName(MCRegister Reg, 490b57cec5SDimitry Andric unsigned AltIdx = AArch64::NoRegAltName); 500b57cec5SDimitry Andric 510b57cec5SDimitry Andric protected: 520b57cec5SDimitry Andric bool printSysAlias(const MCInst *MI, const MCSubtargetInfo &STI, 530b57cec5SDimitry Andric raw_ostream &O); 54bdd1243dSDimitry Andric bool printSyspAlias(const MCInst *MI, const MCSubtargetInfo &STI, 55bdd1243dSDimitry Andric raw_ostream &O); 56bdd1243dSDimitry Andric bool printRangePrefetchAlias(const MCInst *MI, const MCSubtargetInfo &STI, 57bdd1243dSDimitry Andric raw_ostream &O, StringRef Annot); 580b57cec5SDimitry Andric // Operand printers 590b57cec5SDimitry Andric void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, 600b57cec5SDimitry Andric raw_ostream &O); 610b57cec5SDimitry Andric void printImm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, 620b57cec5SDimitry Andric raw_ostream &O); 630b57cec5SDimitry Andric void printImmHex(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, 640b57cec5SDimitry Andric raw_ostream &O); 655ffd83dbSDimitry Andric template <int Size> 665ffd83dbSDimitry Andric void printSImm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, 675ffd83dbSDimitry Andric raw_ostream &O); 680b57cec5SDimitry Andric template <typename T> void printImmSVE(T Value, raw_ostream &O); 690b57cec5SDimitry Andric void printPostIncOperand(const MCInst *MI, unsigned OpNo, unsigned Imm, 700b57cec5SDimitry Andric raw_ostream &O); 710b57cec5SDimitry Andric template <int Amount> printPostIncOperand(const MCInst * MI,unsigned OpNo,const MCSubtargetInfo & STI,raw_ostream & O)720b57cec5SDimitry Andric void printPostIncOperand(const MCInst *MI, unsigned OpNo, 730b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O) { 740b57cec5SDimitry Andric printPostIncOperand(MI, OpNo, Amount, O); 750b57cec5SDimitry Andric } 760b57cec5SDimitry Andric 770b57cec5SDimitry Andric void printVRegOperand(const MCInst *MI, unsigned OpNo, 780b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 790b57cec5SDimitry Andric void printSysCROperand(const MCInst *MI, unsigned OpNo, 800b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 810b57cec5SDimitry Andric void printAddSubImm(const MCInst *MI, unsigned OpNum, 820b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 830b57cec5SDimitry Andric template <typename T> 840b57cec5SDimitry Andric void printLogicalImm(const MCInst *MI, unsigned OpNum, 850b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 860b57cec5SDimitry Andric void printShifter(const MCInst *MI, unsigned OpNum, 870b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 880b57cec5SDimitry Andric void printShiftedRegister(const MCInst *MI, unsigned OpNum, 890b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 900b57cec5SDimitry Andric void printExtendedRegister(const MCInst *MI, unsigned OpNum, 910b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 920b57cec5SDimitry Andric void printArithExtend(const MCInst *MI, unsigned OpNum, 930b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 945f757f3fSDimitry Andric void printMemExtendImpl(bool SignExtend, bool DoShift, unsigned Width, 955f757f3fSDimitry Andric char SrcRegKind, raw_ostream &O); 960b57cec5SDimitry Andric void printMemExtend(const MCInst *MI, unsigned OpNum, raw_ostream &O, 970b57cec5SDimitry Andric char SrcRegKind, unsigned Width); 980b57cec5SDimitry Andric template <char SrcRegKind, unsigned Width> printMemExtend(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O)990b57cec5SDimitry Andric void printMemExtend(const MCInst *MI, unsigned OpNum, 1000b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O) { 1010b57cec5SDimitry Andric printMemExtend(MI, OpNum, O, SrcRegKind, Width); 1020b57cec5SDimitry Andric } 1030b57cec5SDimitry Andric template <bool SignedExtend, int ExtWidth, char SrcRegKind, char Suffix> 1040b57cec5SDimitry Andric void printRegWithShiftExtend(const MCInst *MI, unsigned OpNum, 1050b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 1060b57cec5SDimitry Andric void printCondCode(const MCInst *MI, unsigned OpNum, 1070b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 1080b57cec5SDimitry Andric void printInverseCondCode(const MCInst *MI, unsigned OpNum, 1090b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 1105ffd83dbSDimitry Andric void printAlignedLabel(const MCInst *MI, uint64_t Address, unsigned OpNum, 1110b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 1120b57cec5SDimitry Andric void printUImm12Offset(const MCInst *MI, unsigned OpNum, unsigned Scale, 1130b57cec5SDimitry Andric raw_ostream &O); 1140b57cec5SDimitry Andric void printAMIndexedWB(const MCInst *MI, unsigned OpNum, unsigned Scale, 1150b57cec5SDimitry Andric raw_ostream &O); 1160b57cec5SDimitry Andric 1170b57cec5SDimitry Andric template <int Scale> printUImm12Offset(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O)1180b57cec5SDimitry Andric void printUImm12Offset(const MCInst *MI, unsigned OpNum, 1190b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O) { 1200b57cec5SDimitry Andric printUImm12Offset(MI, OpNum, Scale, O); 1210b57cec5SDimitry Andric } 1220b57cec5SDimitry Andric 1230b57cec5SDimitry Andric template <int BitWidth> printAMIndexedWB(const MCInst * MI,unsigned OpNum,const MCSubtargetInfo & STI,raw_ostream & O)1240b57cec5SDimitry Andric void printAMIndexedWB(const MCInst *MI, unsigned OpNum, 1250b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O) { 1260b57cec5SDimitry Andric printAMIndexedWB(MI, OpNum, BitWidth / 8, O); 1270b57cec5SDimitry Andric } 1280b57cec5SDimitry Andric 1290b57cec5SDimitry Andric void printAMNoIndex(const MCInst *MI, unsigned OpNum, 1300b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 1310b57cec5SDimitry Andric 1320b57cec5SDimitry Andric template <int Scale> 1330b57cec5SDimitry Andric void printImmScale(const MCInst *MI, unsigned OpNum, 1340b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 1350b57cec5SDimitry Andric 136bdd1243dSDimitry Andric template <int Scale, int Offset> 137bdd1243dSDimitry Andric void printImmRangeScale(const MCInst *MI, unsigned OpNum, 138bdd1243dSDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 139bdd1243dSDimitry Andric 1400b57cec5SDimitry Andric template <bool IsSVEPrefetch = false> 1410b57cec5SDimitry Andric void printPrefetchOp(const MCInst *MI, unsigned OpNum, 1420b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 1430b57cec5SDimitry Andric 144bdd1243dSDimitry Andric void printRPRFMOperand(const MCInst *MI, unsigned OpNum, 145bdd1243dSDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 146bdd1243dSDimitry Andric 1470b57cec5SDimitry Andric void printPSBHintOp(const MCInst *MI, unsigned OpNum, 1480b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 1490b57cec5SDimitry Andric 1500b57cec5SDimitry Andric void printBTIHintOp(const MCInst *MI, unsigned OpNum, 1510b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 1520b57cec5SDimitry Andric 1530b57cec5SDimitry Andric void printFPImmOperand(const MCInst *MI, unsigned OpNum, 1540b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 1550b57cec5SDimitry Andric 1560b57cec5SDimitry Andric void printVectorList(const MCInst *MI, unsigned OpNum, 1570b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O, 1580b57cec5SDimitry Andric StringRef LayoutSuffix); 1590b57cec5SDimitry Andric 160fe6060f1SDimitry Andric void printMatrixTileList(const MCInst *MI, unsigned OpNum, 161fe6060f1SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 162fe6060f1SDimitry Andric 1630b57cec5SDimitry Andric /// Print a list of vector registers where the type suffix is implicit 1640b57cec5SDimitry Andric /// (i.e. attached to the instruction rather than the registers). 1650b57cec5SDimitry Andric void printImplicitlyTypedVectorList(const MCInst *MI, unsigned OpNum, 1660b57cec5SDimitry Andric const MCSubtargetInfo &STI, 1670b57cec5SDimitry Andric raw_ostream &O); 1680b57cec5SDimitry Andric 1690b57cec5SDimitry Andric template <unsigned NumLanes, char LaneKind> 1700b57cec5SDimitry Andric void printTypedVectorList(const MCInst *MI, unsigned OpNum, 1710b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 1720b57cec5SDimitry Andric 173bdd1243dSDimitry Andric template <unsigned Scale = 1> 1740b57cec5SDimitry Andric void printVectorIndex(const MCInst *MI, unsigned OpNum, 1750b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 1765f757f3fSDimitry Andric template <unsigned Scale = 1> 177349cc55cSDimitry Andric void printMatrixIndex(const MCInst *MI, unsigned OpNum, 178349cc55cSDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 17906c3fb27SDimitry Andric void printAdrAdrpLabel(const MCInst *MI, uint64_t Address, unsigned OpNum, 1800b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 1810b57cec5SDimitry Andric void printBarrierOption(const MCInst *MI, unsigned OpNum, 1820b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 183e8d8bef9SDimitry Andric void printBarriernXSOption(const MCInst *MI, unsigned OpNum, 184e8d8bef9SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 1850b57cec5SDimitry Andric void printMSRSystemRegister(const MCInst *MI, unsigned OpNum, 1860b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 1870b57cec5SDimitry Andric void printMRSSystemRegister(const MCInst *MI, unsigned OpNum, 1880b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 1890b57cec5SDimitry Andric void printSystemPStateField(const MCInst *MI, unsigned OpNum, 1900b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 1910b57cec5SDimitry Andric void printSIMDType10Operand(const MCInst *MI, unsigned OpNum, 1920b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 193bdd1243dSDimitry Andric template <int EltSize> 194bdd1243dSDimitry Andric void printPredicateAsCounter(const MCInst *MI, unsigned OpNum, 195bdd1243dSDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 1960b57cec5SDimitry Andric template<int64_t Angle, int64_t Remainder> 1970b57cec5SDimitry Andric void printComplexRotationOp(const MCInst *MI, unsigned OpNo, 1980b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 1990b57cec5SDimitry Andric template<unsigned size> 2000b57cec5SDimitry Andric void printGPRSeqPairsClassOperand(const MCInst *MI, unsigned OpNum, 2010b57cec5SDimitry Andric const MCSubtargetInfo &STI, 2020b57cec5SDimitry Andric raw_ostream &O); 2030b57cec5SDimitry Andric template <typename T> 2040b57cec5SDimitry Andric void printImm8OptLsl(const MCInst *MI, unsigned OpNum, 2050b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 2060b57cec5SDimitry Andric template <typename T> 2070b57cec5SDimitry Andric void printSVELogicalImm(const MCInst *MI, unsigned OpNum, 2080b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 2090b57cec5SDimitry Andric void printSVEPattern(const MCInst *MI, unsigned OpNum, 2100b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 211bdd1243dSDimitry Andric void printSVEVecLenSpecifier(const MCInst *MI, unsigned OpNum, 212bdd1243dSDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 213fe6060f1SDimitry Andric 214fe6060f1SDimitry Andric template <bool IsVertical> 215fe6060f1SDimitry Andric void printMatrixTileVector(const MCInst *MI, unsigned OpNum, 216fe6060f1SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 217fe6060f1SDimitry Andric void printMatrixTile(const MCInst *MI, unsigned OpNum, 218fe6060f1SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 219fe6060f1SDimitry Andric template <int EltSize> 220fe6060f1SDimitry Andric void printMatrix(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, 221fe6060f1SDimitry Andric raw_ostream &O); 222fe6060f1SDimitry Andric void printSVCROp(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, 223fe6060f1SDimitry Andric raw_ostream &O); 2240b57cec5SDimitry Andric template <char = 0> 2250b57cec5SDimitry Andric void printSVERegOp(const MCInst *MI, unsigned OpNum, 2260b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 2270b57cec5SDimitry Andric void printGPR64as32(const MCInst *MI, unsigned OpNum, 2280b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 229e8d8bef9SDimitry Andric void printGPR64x8(const MCInst *MI, unsigned OpNum, 230e8d8bef9SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 231bdd1243dSDimitry Andric void printSyspXzrPair(const MCInst *MI, unsigned OpNum, 232bdd1243dSDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 2330b57cec5SDimitry Andric template <int Width> 2340b57cec5SDimitry Andric void printZPRasFPR(const MCInst *MI, unsigned OpNum, 2350b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 2360b57cec5SDimitry Andric template <unsigned ImmIs0, unsigned ImmIs1> 2370b57cec5SDimitry Andric void printExactFPImm(const MCInst *MI, unsigned OpNum, 2380b57cec5SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O); 2390b57cec5SDimitry Andric }; 2400b57cec5SDimitry Andric 2410b57cec5SDimitry Andric class AArch64AppleInstPrinter : public AArch64InstPrinter { 2420b57cec5SDimitry Andric public: 2430b57cec5SDimitry Andric AArch64AppleInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII, 2440b57cec5SDimitry Andric const MCRegisterInfo &MRI); 2450b57cec5SDimitry Andric 246480093f4SDimitry Andric void printInst(const MCInst *MI, uint64_t Address, StringRef Annot, 247480093f4SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O) override; 2480b57cec5SDimitry Andric 249e8d8bef9SDimitry Andric std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override; 250480093f4SDimitry Andric void printInstruction(const MCInst *MI, uint64_t Address, 251480093f4SDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O) override; 2525ffd83dbSDimitry Andric bool printAliasInstr(const MCInst *MI, uint64_t Address, 2535ffd83dbSDimitry Andric const MCSubtargetInfo &STI, raw_ostream &O) override; 2545ffd83dbSDimitry Andric void printCustomAliasOperand(const MCInst *MI, uint64_t Address, 2555ffd83dbSDimitry Andric unsigned OpIdx, unsigned PrintMethodIdx, 2560b57cec5SDimitry Andric const MCSubtargetInfo &STI, 2570b57cec5SDimitry Andric raw_ostream &O) override; 2580b57cec5SDimitry Andric 259bdd1243dSDimitry Andric StringRef getRegName(MCRegister Reg) const override; 2600b57cec5SDimitry Andric 261bdd1243dSDimitry Andric static const char *getRegisterName(MCRegister Reg, 2620b57cec5SDimitry Andric unsigned AltIdx = AArch64::NoRegAltName); 2630b57cec5SDimitry Andric }; 2640b57cec5SDimitry Andric 2650b57cec5SDimitry Andric } // end namespace llvm 2660b57cec5SDimitry Andric 2670b57cec5SDimitry Andric #endif // LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64INSTPRINTER_H 268