1//===-- AMDGPUGIsel.td - AMDGPU GlobalISel Patterns---------*- tablegen -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8// This files contains patterns that should only be used by GlobalISel.  For
9// example patterns for V_* instructions that have S_* equivalents.
10// SelectionDAG does not support selecting V_* instructions.
11//===----------------------------------------------------------------------===//
12
13include "AMDGPU.td"
14include "AMDGPUCombine.td"
15
16def sd_vsrc0 : ComplexPattern<i32, 1, "">;
17def gi_vsrc0 :
18    GIComplexOperandMatcher<s32, "selectVSRC0">,
19    GIComplexPatternEquiv<sd_vsrc0>;
20
21def sd_vcsrc : ComplexPattern<i32, 1, "">;
22def gi_vcsrc :
23    GIComplexOperandMatcher<s32, "selectVCSRC">,
24    GIComplexPatternEquiv<sd_vcsrc>;
25
26def gi_vop3mods0 :
27    GIComplexOperandMatcher<s32, "selectVOP3Mods0">,
28    GIComplexPatternEquiv<VOP3Mods0>;
29
30def gi_vop3mods :
31    GIComplexOperandMatcher<s32, "selectVOP3Mods">,
32    GIComplexPatternEquiv<VOP3Mods>;
33
34def gi_vop3modsnoncanonicalizing :
35    GIComplexOperandMatcher<s32, "selectVOP3ModsNonCanonicalizing">,
36    GIComplexPatternEquiv<VOP3ModsNonCanonicalizing>;
37
38def gi_vop3_no_mods :
39    GIComplexOperandMatcher<s32, "selectVOP3NoMods">,
40    GIComplexPatternEquiv<VOP3NoMods>;
41
42def gi_vop3omods :
43    GIComplexOperandMatcher<s32, "selectVOP3OMods">,
44    GIComplexPatternEquiv<VOP3OMods>;
45
46def gi_vop3pmods :
47    GIComplexOperandMatcher<s32, "selectVOP3PMods">,
48    GIComplexPatternEquiv<VOP3PMods>;
49
50def gi_vop3pmodsdot :
51    GIComplexOperandMatcher<s32, "selectVOP3PModsDOT">,
52    GIComplexPatternEquiv<VOP3PModsDOT>;
53
54def gi_vop3pmodsneg :
55    GIComplexOperandMatcher<s32, "selectVOP3PModsNeg">,
56    GIComplexPatternEquiv<VOP3PModsNeg>;
57
58def gi_wmmaopselvop3pmods :
59    GIComplexOperandMatcher<s32, "selectWMMAOpSelVOP3PMods">,
60    GIComplexPatternEquiv<WMMAOpSelVOP3PMods>;
61
62def gi_wmmavisrc :
63    GIComplexOperandMatcher<s32, "selectWMMAVISrc">,
64    GIComplexPatternEquiv<WMMAVISrc>;
65
66def gi_wmmamods :
67    GIComplexOperandMatcher<s32, "selectWMMAModsF32NegAbs">,
68    GIComplexPatternEquiv<WMMAModsF32NegAbs>;
69
70def gi_wmmamodsf16Neg :
71    GIComplexOperandMatcher<s32, "selectWMMAModsF16Neg">,
72    GIComplexPatternEquiv<WMMAModsF16Neg>;
73
74def gi_wmmamodsf16NegAbs :
75    GIComplexOperandMatcher<s32, "selectWMMAModsF16NegAbs">,
76    GIComplexPatternEquiv<WMMAModsF16NegAbs>;
77
78def gi_swmmacindex8 :
79    GIComplexOperandMatcher<s32, "selectSWMMACIndex8">,
80    GIComplexPatternEquiv<SWMMACIndex8>;
81
82def gi_swmmacindex16 :
83    GIComplexOperandMatcher<s32, "selectSWMMACIndex16">,
84    GIComplexPatternEquiv<SWMMACIndex16>;
85
86def gi_vop3opselmods :
87    GIComplexOperandMatcher<s32, "selectVOP3OpSelMods">,
88    GIComplexPatternEquiv<VOP3OpSelMods>;
89
90def gi_vinterpmods :
91    GIComplexOperandMatcher<s32, "selectVINTERPMods">,
92    GIComplexPatternEquiv<VINTERPMods>;
93
94def gi_vinterpmods_hi :
95    GIComplexOperandMatcher<s32, "selectVINTERPModsHi">,
96    GIComplexPatternEquiv<VINTERPModsHi>;
97
98// FIXME: Why do we have both VOP3OpSel and VOP3OpSelMods?
99def gi_vop3opsel :
100    GIComplexOperandMatcher<s32, "selectVOP3OpSelMods">,
101    GIComplexPatternEquiv<VOP3OpSel>;
102
103def gi_smrd_imm :
104    GIComplexOperandMatcher<s64, "selectSmrdImm">,
105    GIComplexPatternEquiv<SMRDImm>;
106
107def gi_smrd_imm32 :
108    GIComplexOperandMatcher<s64, "selectSmrdImm32">,
109    GIComplexPatternEquiv<SMRDImm32>;
110
111def gi_smrd_sgpr :
112    GIComplexOperandMatcher<s64, "selectSmrdSgpr">,
113    GIComplexPatternEquiv<SMRDSgpr>;
114
115def gi_smrd_sgpr_imm :
116    GIComplexOperandMatcher<s64, "selectSmrdSgprImm">,
117    GIComplexPatternEquiv<SMRDSgprImm>;
118
119def gi_flat_offset :
120    GIComplexOperandMatcher<s64, "selectFlatOffset">,
121    GIComplexPatternEquiv<FlatOffset>;
122def gi_global_offset :
123    GIComplexOperandMatcher<s64, "selectGlobalOffset">,
124    GIComplexPatternEquiv<GlobalOffset>;
125def gi_global_saddr :
126    GIComplexOperandMatcher<s64, "selectGlobalSAddr">,
127    GIComplexPatternEquiv<GlobalSAddr>;
128
129def gi_mubuf_scratch_offset :
130    GIComplexOperandMatcher<s32, "selectMUBUFScratchOffset">,
131    GIComplexPatternEquiv<MUBUFScratchOffset>;
132
133def gi_buf_soffset :
134    GIComplexOperandMatcher<s32, "selectBUFSOffset">,
135    GIComplexPatternEquiv<BUFSOffset>;
136
137def gi_mubuf_scratch_offen :
138    GIComplexOperandMatcher<s32, "selectMUBUFScratchOffen">,
139    GIComplexPatternEquiv<MUBUFScratchOffen>;
140
141def gi_flat_scratch_offset :
142    GIComplexOperandMatcher<s32, "selectScratchOffset">,
143    GIComplexPatternEquiv<ScratchOffset>;
144
145def gi_flat_scratch_saddr :
146    GIComplexOperandMatcher<s32, "selectScratchSAddr">,
147    GIComplexPatternEquiv<ScratchSAddr>;
148
149def gi_flat_scratch_svaddr :
150    GIComplexOperandMatcher<s32, "selectScratchSVAddr">,
151    GIComplexPatternEquiv<ScratchSVAddr>;
152
153def gi_ds_1addr_1offset :
154    GIComplexOperandMatcher<s32, "selectDS1Addr1Offset">,
155    GIComplexPatternEquiv<DS1Addr1Offset>;
156
157def gi_ds_64bit_4byte_aligned :
158    GIComplexOperandMatcher<s64, "selectDS64Bit4ByteAligned">,
159    GIComplexPatternEquiv<DS64Bit4ByteAligned>;
160
161def gi_ds_128bit_8byte_aligned :
162    GIComplexOperandMatcher<s64, "selectDS128Bit8ByteAligned">,
163    GIComplexPatternEquiv<DS128Bit8ByteAligned>;
164
165def gi_mubuf_addr64 :
166    GIComplexOperandMatcher<s64, "selectMUBUFAddr64">,
167    GIComplexPatternEquiv<MUBUFAddr64>;
168
169def gi_mubuf_offset :
170    GIComplexOperandMatcher<s64, "selectMUBUFOffset">,
171    GIComplexPatternEquiv<MUBUFOffset>;
172
173def gi_smrd_buffer_imm :
174    GIComplexOperandMatcher<s64, "selectSMRDBufferImm">,
175    GIComplexPatternEquiv<SMRDBufferImm>;
176
177def gi_smrd_buffer_imm32 :
178    GIComplexOperandMatcher<s64, "selectSMRDBufferImm32">,
179    GIComplexPatternEquiv<SMRDBufferImm32>;
180
181def gi_smrd_buffer_sgpr_imm :
182    GIComplexOperandMatcher<s64, "selectSMRDBufferSgprImm">,
183    GIComplexPatternEquiv<SMRDBufferSgprImm>;
184
185def gi_vop3_mad_mix_mods :
186    GIComplexOperandMatcher<s64, "selectVOP3PMadMixMods">,
187    GIComplexPatternEquiv<VOP3PMadMixMods>;
188
189def gi_vop3_mad_mix_mods_ext :
190    GIComplexOperandMatcher<s64, "selectVOP3PMadMixModsExt">,
191    GIComplexPatternEquiv<VOP3PMadMixModsExt>;
192
193// Separate load nodes are defined to glue m0 initialization in
194// SelectionDAG. The GISel selector can just insert m0 initialization
195// directly before selecting a glue-less load, so hide this
196// distinction.
197
198def : GINodeEquiv<G_LOAD, AMDGPUld_glue> {
199  let CheckMMOIsNonAtomic = 1;
200  let IfSignExtend = G_SEXTLOAD;
201  let IfZeroExtend = G_ZEXTLOAD;
202}
203
204def : GINodeEquiv<G_STORE, AMDGPUst_glue> {
205  let CheckMMOIsNonAtomic = 1;
206}
207
208def : GINodeEquiv<G_LOAD, AMDGPUatomic_ld_glue> {
209  bit CheckMMOIsAtomic = 1;
210}
211
212def : GINodeEquiv<G_STORE, AMDGPUatomic_st_glue> {
213  bit CheckMMOIsAtomic = 1;
214}
215
216
217def : GINodeEquiv<G_ATOMIC_CMPXCHG, atomic_cmp_swap_glue>;
218def : GINodeEquiv<G_ATOMICRMW_XCHG, atomic_swap_glue>;
219def : GINodeEquiv<G_ATOMICRMW_ADD, atomic_load_add_glue>;
220def : GINodeEquiv<G_ATOMICRMW_SUB, atomic_load_sub_glue>;
221def : GINodeEquiv<G_ATOMICRMW_AND, atomic_load_and_glue>;
222def : GINodeEquiv<G_ATOMICRMW_OR, atomic_load_or_glue>;
223def : GINodeEquiv<G_ATOMICRMW_XOR, atomic_load_xor_glue>;
224def : GINodeEquiv<G_ATOMICRMW_MIN, atomic_load_min_glue>;
225def : GINodeEquiv<G_ATOMICRMW_MAX, atomic_load_max_glue>;
226def : GINodeEquiv<G_ATOMICRMW_UMIN, atomic_load_umin_glue>;
227def : GINodeEquiv<G_ATOMICRMW_UMAX, atomic_load_umax_glue>;
228def : GINodeEquiv<G_ATOMICRMW_FADD, atomic_load_fadd_glue>;
229
230def : GINodeEquiv<G_AMDGPU_FFBH_U32, AMDGPUffbh_u32_impl>;
231def : GINodeEquiv<G_AMDGPU_FFBL_B32, AMDGPUffbl_b32_impl>;
232def : GINodeEquiv<G_AMDGPU_FMIN_LEGACY, AMDGPUfmin_legacy>;
233def : GINodeEquiv<G_AMDGPU_FMAX_LEGACY, AMDGPUfmax_legacy>;
234def : GINodeEquiv<G_AMDGPU_RCP_IFLAG, AMDGPUrcp_iflag>;
235
236def : GINodeEquiv<G_AMDGPU_CVT_F32_UBYTE0, AMDGPUcvt_f32_ubyte0>;
237def : GINodeEquiv<G_AMDGPU_CVT_F32_UBYTE1, AMDGPUcvt_f32_ubyte1>;
238def : GINodeEquiv<G_AMDGPU_CVT_F32_UBYTE2, AMDGPUcvt_f32_ubyte2>;
239def : GINodeEquiv<G_AMDGPU_CVT_F32_UBYTE3, AMDGPUcvt_f32_ubyte3>;
240
241def : GINodeEquiv<G_AMDGPU_CVT_PK_I16_I32, AMDGPUpk_i16_i32_impl>;
242def : GINodeEquiv<G_AMDGPU_SMED3, AMDGPUsmed3>;
243def : GINodeEquiv<G_AMDGPU_UMED3, AMDGPUumed3>;
244def : GINodeEquiv<G_AMDGPU_FMED3, AMDGPUfmed3_impl>;
245def : GINodeEquiv<G_AMDGPU_CLAMP, AMDGPUclamp>;
246
247def : GINodeEquiv<G_AMDGPU_ATOMIC_CMPXCHG, AMDGPUatomic_cmp_swap>;
248def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD, SIbuffer_load>;
249def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_USHORT, SIbuffer_load_ushort>;
250def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_UBYTE, SIbuffer_load_ubyte>;
251def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_SSHORT, SIbuffer_load_short>;
252def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_SBYTE, SIbuffer_load_byte>;
253def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_FORMAT, SIbuffer_load_format>;
254def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_FORMAT_TFE, SIbuffer_load_format_tfe>;
255def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_FORMAT_D16, SIbuffer_load_format_d16>;
256def : GINodeEquiv<G_AMDGPU_TBUFFER_LOAD_FORMAT, SItbuffer_load>;
257def : GINodeEquiv<G_AMDGPU_TBUFFER_LOAD_FORMAT_D16, SItbuffer_load_d16>;
258def : GINodeEquiv<G_AMDGPU_BUFFER_STORE, SIbuffer_store>;
259def : GINodeEquiv<G_AMDGPU_BUFFER_STORE_SHORT, SIbuffer_store_short>;
260def : GINodeEquiv<G_AMDGPU_BUFFER_STORE_BYTE, SIbuffer_store_byte>;
261def : GINodeEquiv<G_AMDGPU_BUFFER_STORE_FORMAT, SIbuffer_store_format>;
262def : GINodeEquiv<G_AMDGPU_BUFFER_STORE_FORMAT_D16, SIbuffer_store_format_d16>;
263def : GINodeEquiv<G_AMDGPU_TBUFFER_STORE_FORMAT, SItbuffer_store>;
264def : GINodeEquiv<G_AMDGPU_TBUFFER_STORE_FORMAT_D16, SItbuffer_store_d16>;
265
266// FIXME: Check MMO is atomic
267def : GINodeEquiv<G_ATOMICRMW_UINC_WRAP, atomic_load_uinc_wrap_glue>;
268def : GINodeEquiv<G_ATOMICRMW_UDEC_WRAP, atomic_load_udec_wrap_glue>;
269def : GINodeEquiv<G_AMDGPU_ATOMIC_FMIN, SIatomic_fmin>;
270def : GINodeEquiv<G_AMDGPU_ATOMIC_FMAX, SIatomic_fmax>;
271def : GINodeEquiv<G_AMDGPU_ATOMIC_FMIN, atomic_load_fmin_glue>;
272def : GINodeEquiv<G_AMDGPU_ATOMIC_FMAX, atomic_load_fmax_glue>;
273
274
275def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_SWAP, SIbuffer_atomic_swap>;
276def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_ADD, SIbuffer_atomic_add>;
277def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_SUB, SIbuffer_atomic_sub>;
278def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_SMIN, SIbuffer_atomic_smin>;
279def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_UMIN, SIbuffer_atomic_umin>;
280def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_SMAX, SIbuffer_atomic_smax>;
281def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_UMAX, SIbuffer_atomic_umax>;
282def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_AND, SIbuffer_atomic_and>;
283def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_OR, SIbuffer_atomic_or>;
284def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_XOR, SIbuffer_atomic_xor>;
285def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_INC, SIbuffer_atomic_inc>;
286def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_DEC, SIbuffer_atomic_dec>;
287def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_FADD, SIbuffer_atomic_fadd>;
288def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_FADD_BF16, SIbuffer_atomic_fadd_bf16>;
289def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_FMIN, SIbuffer_atomic_fmin>;
290def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_FMAX, SIbuffer_atomic_fmax>;
291def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_CMPSWAP, SIbuffer_atomic_cmpswap>;
292def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_COND_SUB_U32, SIbuffer_atomic_cond_sub_u32>;
293def : GINodeEquiv<G_AMDGPU_S_BUFFER_LOAD, SIsbuffer_load>;
294def : GINodeEquiv<G_AMDGPU_S_BUFFER_LOAD_SBYTE, SIsbuffer_load_byte>;
295def : GINodeEquiv<G_AMDGPU_S_BUFFER_LOAD_UBYTE, SIsbuffer_load_ubyte>;
296def : GINodeEquiv<G_AMDGPU_S_BUFFER_LOAD_SSHORT, SIsbuffer_load_short>;
297def : GINodeEquiv<G_AMDGPU_S_BUFFER_LOAD_USHORT, SIsbuffer_load_ushort>;
298
299def : GINodeEquiv<G_FPTRUNC_ROUND_UPWARD, SIfptrunc_round_upward>;
300def : GINodeEquiv<G_FPTRUNC_ROUND_DOWNWARD, SIfptrunc_round_downward>;
301
302class GISelSop2Pat <
303  SDPatternOperator node,
304  Instruction inst,
305  ValueType dst_vt,
306  ValueType src0_vt = dst_vt, ValueType src1_vt = src0_vt>   : GCNPat <
307
308  (dst_vt (node (src0_vt SReg_32:$src0), (src1_vt SReg_32:$src1))),
309  (inst src0_vt:$src0, src1_vt:$src1)
310>;
311
312class GISelVop2Pat <
313  SDPatternOperator node,
314  Instruction inst,
315  ValueType dst_vt,
316  ValueType src0_vt = dst_vt, ValueType src1_vt = src0_vt>   : GCNPat <
317
318  (dst_vt (node (src0_vt (sd_vsrc0 src0_vt:$src0)), (src1_vt VGPR_32:$src1))),
319  (inst src0_vt:$src0, src1_vt:$src1)
320>;
321
322class GISelVop2CommutePat <
323  SDPatternOperator node,
324  Instruction inst,
325  ValueType dst_vt,
326  ValueType src0_vt = dst_vt, ValueType src1_vt = src0_vt>   : GCNPat <
327
328  (dst_vt (node (src1_vt VGPR_32:$src1), (src0_vt (sd_vsrc0 src0_vt:$src0)))),
329  (inst src0_vt:$src0, src1_vt:$src1)
330>;
331
332class GISelVop3Pat2 <
333  SDPatternOperator node,
334  Instruction inst,
335  ValueType dst_vt,
336  ValueType src0_vt = dst_vt, ValueType src1_vt = src0_vt>   : GCNPat <
337
338  (dst_vt (node (src0_vt (sd_vcsrc src0_vt:$src0)), (src1_vt (sd_vcsrc src1_vt:$src1)))),
339  (inst src0_vt:$src0, src1_vt:$src1)
340>;
341
342class GISelVop3Pat2CommutePat <
343  SDPatternOperator node,
344  Instruction inst,
345  ValueType dst_vt,
346  ValueType src0_vt = dst_vt, ValueType src1_vt = src0_vt>   : GCNPat <
347
348  (dst_vt (node (src0_vt (sd_vcsrc src0_vt:$src0)), (src1_vt (sd_vcsrc src1_vt:$src1)))),
349  (inst src0_vt:$src1, src1_vt:$src0)
350>;
351
352class GISelVop3Pat2ModsPat <
353  SDPatternOperator node,
354  Instruction inst,
355  ValueType dst_vt,
356  ValueType src0_vt = dst_vt, ValueType src1_vt = src0_vt> : GCNPat <
357
358  (dst_vt (node (src0_vt (VOP3Mods0 src0_vt:$src0, i32:$src0_modifiers, i1:$clamp, i32:$omods)),
359                (src1_vt (VOP3Mods src1_vt:$src1, i32:$src1_modifiers)))),
360  (inst i32:$src0_modifiers, src0_vt:$src0,
361        i32:$src1_modifiers, src1_vt:$src1, $clamp, $omods)
362>;
363
364multiclass GISelVop2IntrPat <
365  SDPatternOperator node, Instruction inst,
366  ValueType dst_vt, ValueType src_vt = dst_vt> {
367
368  def : GISelVop2Pat <node, inst, dst_vt, src_vt>;
369
370  // FIXME: Intrinsics aren't marked as commutable, so we need to add an explicit
371  // pattern to handle commuting.  This is another reason why legalizing to a
372  // generic machine instruction may be better that matching the intrinsic
373  // directly.
374  def : GISelVop2CommutePat <node, inst, dst_vt, src_vt>;
375}
376
377// Since GlobalISel is more flexible then SelectionDAG, I think we can get
378// away with adding patterns for integer types and not legalizing all
379// loads and stores to vector types.  This should help simplify the load/store
380// legalization.
381foreach Ty = [i64, p0, p1, p4] in {
382  defm : SMRD_Pattern <"S_LOAD_DWORDX2",  Ty>;
383}
384
385def gi_as_i32timm : GICustomOperandRenderer<"renderTruncTImm">,
386  GISDNodeXFormEquiv<as_i32timm>;
387
388def gi_as_i16timm : GICustomOperandRenderer<"renderTruncTImm">,
389  GISDNodeXFormEquiv<as_i16timm>;
390
391def gi_as_i8timm : GICustomOperandRenderer<"renderTruncTImm">,
392  GISDNodeXFormEquiv<as_i8timm>;
393
394def gi_as_i1timm : GICustomOperandRenderer<"renderTruncTImm">,
395  GISDNodeXFormEquiv<as_i1timm>;
396
397def gi_NegateImm : GICustomOperandRenderer<"renderNegateImm">,
398  GISDNodeXFormEquiv<NegateImm>;
399
400def gi_bitcast_fpimm_to_i32 : GICustomOperandRenderer<"renderBitcastImm">,
401  GISDNodeXFormEquiv<bitcast_fpimm_to_i32>;
402
403def gi_IMMPopCount : GICustomOperandRenderer<"renderPopcntImm">,
404  GISDNodeXFormEquiv<IMMPopCount>;
405
406def gi_extract_cpol : GICustomOperandRenderer<"renderExtractCPol">,
407  GISDNodeXFormEquiv<extract_cpol>;
408
409def gi_extract_swz : GICustomOperandRenderer<"renderExtractSWZ">,
410  GISDNodeXFormEquiv<extract_swz>;
411
412def gi_extract_cpol_set_glc : GICustomOperandRenderer<"renderExtractCpolSetGLC">,
413  GISDNodeXFormEquiv<extract_cpol_set_glc>;
414
415def gi_frameindex_to_targetframeindex : GICustomOperandRenderer<"renderFrameIndex">,
416  GISDNodeXFormEquiv<frameindex_to_targetframeindex>;
417
418def gi_fp_pow2_to_exponent : GICustomOperandRenderer<"renderFPPow2ToExponent">,
419  GISDNodeXFormEquiv<FPPow2ToExponentXForm>;
420