1 //===- AMDGPULegalizerInfo ---------------------------------------*- C++ -*-==//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file declares the targeting of the Machinelegalizer class for
10 /// AMDGPU.
11 /// \todo This should be generated by TableGen.
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUMACHINELEGALIZER_H
15 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUMACHINELEGALIZER_H
16 
17 #include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
18 #include "AMDGPUArgumentUsageInfo.h"
19 #include "SIInstrInfo.h"
20 
21 namespace llvm {
22 
23 class GCNTargetMachine;
24 class GCNSubtarget;
25 class MachineIRBuilder;
26 
27 namespace AMDGPU {
28 struct ImageDimIntrinsicInfo;
29 }
30 /// This class provides the information for the target register banks.
31 class AMDGPULegalizerInfo final : public LegalizerInfo {
32   const GCNSubtarget &ST;
33 
34 public:
35   AMDGPULegalizerInfo(const GCNSubtarget &ST,
36                       const GCNTargetMachine &TM);
37 
38   bool legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI) const override;
39 
40   Register getSegmentAperture(unsigned AddrSpace,
41                               MachineRegisterInfo &MRI,
42                               MachineIRBuilder &B) const;
43 
44   bool legalizeAddrSpaceCast(MachineInstr &MI, MachineRegisterInfo &MRI,
45                              MachineIRBuilder &B) const;
46   bool legalizeFrint(MachineInstr &MI, MachineRegisterInfo &MRI,
47                      MachineIRBuilder &B) const;
48   bool legalizeFceil(MachineInstr &MI, MachineRegisterInfo &MRI,
49                      MachineIRBuilder &B) const;
50   bool legalizeFrem(MachineInstr &MI, MachineRegisterInfo &MRI,
51                     MachineIRBuilder &B) const;
52   bool legalizeIntrinsicTrunc(MachineInstr &MI, MachineRegisterInfo &MRI,
53                               MachineIRBuilder &B) const;
54   bool legalizeITOFP(MachineInstr &MI, MachineRegisterInfo &MRI,
55                      MachineIRBuilder &B, bool Signed) const;
56   bool legalizeFPTOI(MachineInstr &MI, MachineRegisterInfo &MRI,
57                      MachineIRBuilder &B, bool Signed) const;
58   bool legalizeMinNumMaxNum(LegalizerHelper &Helper, MachineInstr &MI) const;
59   bool legalizeExtractVectorElt(MachineInstr &MI, MachineRegisterInfo &MRI,
60                                 MachineIRBuilder &B) const;
61   bool legalizeInsertVectorElt(MachineInstr &MI, MachineRegisterInfo &MRI,
62                                MachineIRBuilder &B) const;
63 
64   bool legalizeSinCos(MachineInstr &MI, MachineRegisterInfo &MRI,
65                       MachineIRBuilder &B) const;
66 
67   bool buildPCRelGlobalAddress(Register DstReg, LLT PtrTy, MachineIRBuilder &B,
68                                const GlobalValue *GV, int64_t Offset,
69                                unsigned GAFlags = SIInstrInfo::MO_NONE) const;
70 
71   bool legalizeGlobalValue(MachineInstr &MI, MachineRegisterInfo &MRI,
72                            MachineIRBuilder &B) const;
73   bool legalizeLoad(LegalizerHelper &Helper, MachineInstr &MI) const;
74   bool legalizeStore(LegalizerHelper &Helper, MachineInstr &MI) const;
75 
76   bool legalizeFMad(MachineInstr &MI, MachineRegisterInfo &MRI,
77                     MachineIRBuilder &B) const;
78 
79   bool legalizeAtomicCmpXChg(MachineInstr &MI, MachineRegisterInfo &MRI,
80                              MachineIRBuilder &B) const;
81 
82   std::pair<Register, Register>
83   getScaledLogInput(MachineIRBuilder &B, Register Src, unsigned Flags) const;
84 
85   bool legalizeFlog2(MachineInstr &MI, MachineIRBuilder &B) const;
86   bool legalizeFlogCommon(MachineInstr &MI, MachineIRBuilder &B) const;
87   bool legalizeFlogUnsafe(MachineIRBuilder &B, Register Dst, Register Src,
88                           bool IsLog10, unsigned Flags) const;
89   bool legalizeFExp2(MachineInstr &MI, MachineIRBuilder &B) const;
90   bool legalizeFExpUnsafe(MachineIRBuilder &B, Register Dst, Register Src,
91                           unsigned Flags) const;
92   bool legalizeFExp(MachineInstr &MI, MachineIRBuilder &B) const;
93   bool legalizeFPow(MachineInstr &MI, MachineIRBuilder &B) const;
94   bool legalizeFFloor(MachineInstr &MI, MachineRegisterInfo &MRI,
95                       MachineIRBuilder &B) const;
96 
97   bool legalizeBuildVector(MachineInstr &MI, MachineRegisterInfo &MRI,
98                            MachineIRBuilder &B) const;
99 
100   void buildMultiply(LegalizerHelper &Helper, MutableArrayRef<Register> Accum,
101                      ArrayRef<Register> Src0, ArrayRef<Register> Src1,
102                      bool UsePartialMad64_32,
103                      bool SeparateOddAlignedProducts) const;
104   bool legalizeMul(LegalizerHelper &Helper, MachineInstr &MI) const;
105   bool legalizeCTLZ_CTTZ(MachineInstr &MI, MachineRegisterInfo &MRI,
106                          MachineIRBuilder &B) const;
107 
108   bool loadInputValue(Register DstReg, MachineIRBuilder &B,
109                       const ArgDescriptor *Arg,
110                       const TargetRegisterClass *ArgRC, LLT ArgTy) const;
111   bool loadInputValue(Register DstReg, MachineIRBuilder &B,
112                       AMDGPUFunctionArgInfo::PreloadedValue ArgType) const;
113 
114   bool legalizePointerAsRsrcIntrin(MachineInstr &MI, MachineRegisterInfo &MRI,
115                                    MachineIRBuilder &B) const;
116 
117   bool legalizePreloadedArgIntrin(
118     MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B,
119     AMDGPUFunctionArgInfo::PreloadedValue ArgType) const;
120   bool legalizeWorkitemIDIntrinsic(
121       MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B,
122       unsigned Dim, AMDGPUFunctionArgInfo::PreloadedValue ArgType) const;
123 
124   Register getKernargParameterPtr(MachineIRBuilder &B, int64_t Offset) const;
125   bool legalizeKernargMemParameter(MachineInstr &MI, MachineIRBuilder &B,
126                                    uint64_t Offset,
127                                    Align Alignment = Align(4)) const;
128 
129   bool legalizeUnsignedDIV_REM(MachineInstr &MI, MachineRegisterInfo &MRI,
130                                MachineIRBuilder &B) const;
131 
132   void legalizeUnsignedDIV_REM32Impl(MachineIRBuilder &B, Register DstDivReg,
133                                      Register DstRemReg, Register Num,
134                                      Register Den) const;
135 
136   void legalizeUnsignedDIV_REM64Impl(MachineIRBuilder &B, Register DstDivReg,
137                                      Register DstRemReg, Register Num,
138                                      Register Den) const;
139 
140   bool legalizeSignedDIV_REM(MachineInstr &MI, MachineRegisterInfo &MRI,
141                              MachineIRBuilder &B) const;
142 
143   bool legalizeFDIV(MachineInstr &MI, MachineRegisterInfo &MRI,
144                     MachineIRBuilder &B) const;
145   bool legalizeFDIV16(MachineInstr &MI, MachineRegisterInfo &MRI,
146                       MachineIRBuilder &B) const;
147   bool legalizeFDIV32(MachineInstr &MI, MachineRegisterInfo &MRI,
148                       MachineIRBuilder &B) const;
149   bool legalizeFDIV64(MachineInstr &MI, MachineRegisterInfo &MRI,
150                       MachineIRBuilder &B) const;
151   bool legalizeFFREXP(MachineInstr &MI, MachineRegisterInfo &MRI,
152                       MachineIRBuilder &B) const;
153   bool legalizeFastUnsafeFDIV(MachineInstr &MI, MachineRegisterInfo &MRI,
154                               MachineIRBuilder &B) const;
155   bool legalizeFastUnsafeFDIV64(MachineInstr &MI, MachineRegisterInfo &MRI,
156                                 MachineIRBuilder &B) const;
157   bool legalizeFDIVFastIntrin(MachineInstr &MI, MachineRegisterInfo &MRI,
158                               MachineIRBuilder &B) const;
159 
160   bool legalizeFSQRT(MachineInstr &MI, MachineRegisterInfo &MRI,
161                      MachineIRBuilder &B) const;
162 
163   bool legalizeRsqClampIntrinsic(MachineInstr &MI, MachineRegisterInfo &MRI,
164                                  MachineIRBuilder &B) const;
165 
166   bool legalizeDSAtomicFPIntrinsic(LegalizerHelper &Helper,
167                                    MachineInstr &MI, Intrinsic::ID IID) const;
168 
169   bool getImplicitArgPtr(Register DstReg, MachineRegisterInfo &MRI,
170                          MachineIRBuilder &B) const;
171 
172   bool legalizeImplicitArgPtr(MachineInstr &MI, MachineRegisterInfo &MRI,
173                               MachineIRBuilder &B) const;
174 
175   bool getLDSKernelId(Register DstReg, MachineRegisterInfo &MRI,
176                       MachineIRBuilder &B) const;
177 
178   bool legalizeLDSKernelId(MachineInstr &MI, MachineRegisterInfo &MRI,
179                            MachineIRBuilder &B) const;
180 
181   bool legalizeIsAddrSpace(MachineInstr &MI, MachineRegisterInfo &MRI,
182                            MachineIRBuilder &B, unsigned AddrSpace) const;
183 
184   std::pair<Register, unsigned> splitBufferOffsets(MachineIRBuilder &B,
185                                                    Register OrigOffset) const;
186 
187   Register handleD16VData(MachineIRBuilder &B, MachineRegisterInfo &MRI,
188                           Register Reg, bool ImageStore = false) const;
189   Register fixStoreSourceType(MachineIRBuilder &B, Register VData,
190                               bool IsFormat) const;
191 
192   bool legalizeBufferStore(MachineInstr &MI, MachineRegisterInfo &MRI,
193                            MachineIRBuilder &B, bool IsTyped,
194                            bool IsFormat) const;
195   bool legalizeBufferLoad(MachineInstr &MI, MachineRegisterInfo &MRI,
196                           MachineIRBuilder &B, bool IsFormat,
197                           bool IsTyped) const;
198   bool legalizeBufferAtomic(MachineInstr &MI, MachineIRBuilder &B,
199                             Intrinsic::ID IID) const;
200 
201   bool legalizeBVHIntrinsic(MachineInstr &MI, MachineIRBuilder &B) const;
202 
203   bool legalizeFPTruncRound(MachineInstr &MI, MachineIRBuilder &B) const;
204 
205   bool legalizeImageIntrinsic(
206       MachineInstr &MI, MachineIRBuilder &B,
207       GISelChangeObserver &Observer,
208       const AMDGPU::ImageDimIntrinsicInfo *ImageDimIntr) const;
209 
210   bool legalizeSBufferLoad(LegalizerHelper &Helper, MachineInstr &MI) const;
211 
212   bool legalizeTrapIntrinsic(MachineInstr &MI, MachineRegisterInfo &MRI,
213                              MachineIRBuilder &B) const;
214   bool legalizeTrapEndpgm(MachineInstr &MI, MachineRegisterInfo &MRI,
215                           MachineIRBuilder &B) const;
216   bool legalizeTrapHsaQueuePtr(MachineInstr &MI, MachineRegisterInfo &MRI,
217                                MachineIRBuilder &B) const;
218   bool legalizeTrapHsa(MachineInstr &MI, MachineRegisterInfo &MRI,
219                        MachineIRBuilder &B) const;
220   bool legalizeDebugTrapIntrinsic(MachineInstr &MI, MachineRegisterInfo &MRI,
221                                   MachineIRBuilder &B) const;
222 
223   bool legalizeIntrinsic(LegalizerHelper &Helper,
224                          MachineInstr &MI) const override;
225 };
226 } // End llvm namespace.
227 #endif
228