1//=- AMDGPURegisterBank.td - Describe the AMDGPU Banks -------*- tablegen -*-=//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9def SGPRRegBank : RegisterBank<"SGPR",
10  [SReg_LO16, SReg_32, SReg_64, SReg_96, SReg_128, SReg_160, SReg_192, SReg_224, SReg_256, SReg_512, SReg_1024]
11>;
12
13def VGPRRegBank : RegisterBank<"VGPR",
14  [VGPR_LO16, VGPR_HI16, VGPR_32, VReg_64, VReg_96, VReg_128, VReg_160, VReg_192, VReg_224, VReg_256, VReg_512, VReg_1024]
15>;
16
17// It is helpful to distinguish conditions from ordinary SGPRs.
18def VCCRegBank : RegisterBank <"VCC", [SReg_1]>;
19
20def AGPRRegBank : RegisterBank <"AGPR",
21  [AGPR_LO16, AGPR_32, AReg_64, AReg_96, AReg_128, AReg_160, AReg_192, AReg_224, AReg_256, AReg_512, AReg_1024]
22>;
23