1 //===- GCNCreateVOPD.cpp - Create VOPD Instructions ----------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// \file
10 /// Combine VALU pairs into VOPD instructions
11 /// Only works on wave32
12 /// Has register requirements, we reject creating VOPD if the requirements are
13 /// not met.
14 /// shouldCombineVOPD mutator in postRA machine scheduler puts candidate
15 /// instructions for VOPD back-to-back
16 ///
17 //
18 //===----------------------------------------------------------------------===//
19 
20 #include "AMDGPU.h"
21 #include "GCNSubtarget.h"
22 #include "GCNVOPDUtils.h"
23 #include "MCTargetDesc/AMDGPUMCTargetDesc.h"
24 #include "SIInstrInfo.h"
25 #include "Utils/AMDGPUBaseInfo.h"
26 #include "llvm/ADT/SmallVector.h"
27 #include "llvm/ADT/Statistic.h"
28 #include "llvm/ADT/StringMap.h"
29 #include "llvm/CodeGen/MachineBasicBlock.h"
30 #include "llvm/CodeGen/MachineInstr.h"
31 #include "llvm/CodeGen/MachineOperand.h"
32 #include "llvm/Support/Casting.h"
33 #include "llvm/Support/Debug.h"
34 #include <utility>
35 
36 #define DEBUG_TYPE "gcn-create-vopd"
37 STATISTIC(NumVOPDCreated, "Number of VOPD Insts Created.");
38 
39 using namespace llvm;
40 
41 namespace {
42 
43 class GCNCreateVOPD : public MachineFunctionPass {
44 private:
45     class VOPDCombineInfo {
46     public:
47       VOPDCombineInfo() {}
48       VOPDCombineInfo(MachineInstr *First, MachineInstr *Second)
49           : FirstMI(First), SecondMI(Second) {}
50 
51       MachineInstr *FirstMI;
52       MachineInstr *SecondMI;
53     };
54 
55 public:
56   static char ID;
57   const GCNSubtarget *ST = nullptr;
58 
59   GCNCreateVOPD() : MachineFunctionPass(ID) {}
60 
61   void getAnalysisUsage(AnalysisUsage &AU) const override {
62     AU.setPreservesCFG();
63     MachineFunctionPass::getAnalysisUsage(AU);
64   }
65 
66   StringRef getPassName() const override {
67     return "GCN Create VOPD Instructions";
68   }
69 
70   bool doReplace(const SIInstrInfo *SII, VOPDCombineInfo &CI) {
71     auto *FirstMI = CI.FirstMI;
72     auto *SecondMI = CI.SecondMI;
73     unsigned Opc1 = FirstMI->getOpcode();
74     unsigned Opc2 = SecondMI->getOpcode();
75     int NewOpcode = AMDGPU::getVOPDFull(AMDGPU::getVOPDOpcode(Opc1),
76                                         AMDGPU::getVOPDOpcode(Opc2));
77     assert(NewOpcode != -1 &&
78            "Should have previously determined this as a possible VOPD\n");
79 
80     auto VOPDInst = BuildMI(*FirstMI->getParent(), FirstMI,
81                             FirstMI->getDebugLoc(), SII->get(NewOpcode))
82                         .setMIFlags(FirstMI->getFlags() | SecondMI->getFlags());
83 
84     namespace VOPD = AMDGPU::VOPD;
85     MachineInstr *MI[] = {FirstMI, SecondMI};
86     auto InstInfo =
87         AMDGPU::getVOPDInstInfo(FirstMI->getDesc(), SecondMI->getDesc());
88 
89     for (auto CompIdx : VOPD::COMPONENTS) {
90       auto MCOprIdx = InstInfo[CompIdx].getIndexOfDstInMCOperands();
91       VOPDInst.add(MI[CompIdx]->getOperand(MCOprIdx));
92     }
93 
94     for (auto CompIdx : VOPD::COMPONENTS) {
95       auto CompSrcOprNum = InstInfo[CompIdx].getCompSrcOperandsNum();
96       for (unsigned CompSrcIdx = 0; CompSrcIdx < CompSrcOprNum; ++CompSrcIdx) {
97         auto MCOprIdx = InstInfo[CompIdx].getIndexOfSrcInMCOperands(CompSrcIdx);
98         VOPDInst.add(MI[CompIdx]->getOperand(MCOprIdx));
99       }
100     }
101 
102     for (auto CompIdx : VOPD::COMPONENTS)
103       VOPDInst.copyImplicitOps(*MI[CompIdx]);
104 
105     LLVM_DEBUG(dbgs() << "VOPD Fused: " << *VOPDInst << " from\tX: "
106                       << *CI.FirstMI << "\tY: " << *CI.SecondMI << "\n");
107 
108     for (auto CompIdx : VOPD::COMPONENTS)
109       MI[CompIdx]->eraseFromParent();
110 
111     ++NumVOPDCreated;
112     return true;
113   }
114 
115   bool runOnMachineFunction(MachineFunction &MF) override {
116     if (skipFunction(MF.getFunction()))
117       return false;
118     ST = &MF.getSubtarget<GCNSubtarget>();
119     if (!AMDGPU::hasVOPD(*ST) || !ST->isWave32())
120       return false;
121     LLVM_DEBUG(dbgs() << "CreateVOPD Pass:\n");
122 
123     const SIInstrInfo *SII = ST->getInstrInfo();
124     bool Changed = false;
125 
126     SmallVector<VOPDCombineInfo> ReplaceCandidates;
127 
128     for (auto &MBB : MF) {
129       auto MII = MBB.begin(), E = MBB.end();
130       while (MII != E) {
131         auto *FirstMI = &*MII;
132         MII = next_nodbg(MII, MBB.end());
133         if (MII == MBB.end())
134           break;
135         if (FirstMI->isDebugInstr())
136           continue;
137         auto *SecondMI = &*MII;
138         unsigned Opc = FirstMI->getOpcode();
139         unsigned Opc2 = SecondMI->getOpcode();
140         llvm::AMDGPU::CanBeVOPD FirstCanBeVOPD = AMDGPU::getCanBeVOPD(Opc);
141         llvm::AMDGPU::CanBeVOPD SecondCanBeVOPD = AMDGPU::getCanBeVOPD(Opc2);
142         VOPDCombineInfo CI;
143 
144         if (FirstCanBeVOPD.X && SecondCanBeVOPD.Y)
145           CI = VOPDCombineInfo(FirstMI, SecondMI);
146         else if (FirstCanBeVOPD.Y && SecondCanBeVOPD.X)
147           CI = VOPDCombineInfo(SecondMI, FirstMI);
148         else
149           continue;
150         // checkVOPDRegConstraints cares about program order, but doReplace
151         // cares about X-Y order in the constituted VOPD
152         if (llvm::checkVOPDRegConstraints(*SII, *FirstMI, *SecondMI)) {
153           ReplaceCandidates.push_back(CI);
154           ++MII;
155         }
156       }
157     }
158     for (auto &CI : ReplaceCandidates) {
159       Changed |= doReplace(SII, CI);
160     }
161 
162     return Changed;
163   }
164 };
165 
166 } // namespace
167 
168 char GCNCreateVOPD::ID = 0;
169 
170 char &llvm::GCNCreateVOPDID = GCNCreateVOPD::ID;
171 
172 INITIALIZE_PASS(GCNCreateVOPD, DEBUG_TYPE, "GCN Create VOPD Instructions",
173                 false, false)
174