1 //===- ThumbRegisterInfo.h - Thumb Register Information Impl -*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the Thumb implementation of the TargetRegisterInfo
10 // class. With the exception of emitLoadConstPool Thumb2 tracks
11 // ARMBaseRegisterInfo, Thumb1 overloads the functions below.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_LIB_TARGET_ARM_THUMB1REGISTERINFO_H
16 #define LLVM_LIB_TARGET_ARM_THUMB1REGISTERINFO_H
17 
18 #include "ARMBaseRegisterInfo.h"
19 #include "llvm/CodeGen/TargetRegisterInfo.h"
20 
21 namespace llvm {
22   class ARMSubtarget;
23   class ARMBaseInstrInfo;
24 
25 struct ThumbRegisterInfo : public ARMBaseRegisterInfo {
26 public:
27   ThumbRegisterInfo();
28 
29   const TargetRegisterClass *
30   getLargestLegalSuperClass(const TargetRegisterClass *RC,
31                             const MachineFunction &MF) const override;
32 
33   const TargetRegisterClass *
34   getPointerRegClass(const MachineFunction &MF,
35                      unsigned Kind = 0) const override;
36 
37   /// emitLoadConstPool - Emits a load from constpool to materialize the
38   /// specified immediate.
39   void
40   emitLoadConstPool(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
41                     const DebugLoc &dl, Register DestReg, unsigned SubIdx,
42                     int Val, ARMCC::CondCodes Pred = ARMCC::AL,
43                     Register PredReg = Register(),
44                     unsigned MIFlags = MachineInstr::NoFlags) const override;
45 
46   // rewrite MI to access 'Offset' bytes from the FP. Update Offset to be
47   // however much remains to be handled. Return 'true' if no further
48   // work is required.
49   bool rewriteFrameIndex(MachineBasicBlock::iterator II, unsigned FrameRegIdx,
50                          Register FrameReg, int &Offset,
51                          const ARMBaseInstrInfo &TII) const;
52   void resolveFrameIndex(MachineInstr &MI, Register BaseReg,
53                          int64_t Offset) const override;
54   bool eliminateFrameIndex(MachineBasicBlock::iterator II,
55                            int SPAdj, unsigned FIOperandNum,
56                            RegScavenger *RS = nullptr) const override;
57   bool useFPForScavengingIndex(const MachineFunction &MF) const override;
58 };
59 }
60 
61 #endif
62