10b57cec5SDimitry Andric//===-- AVR.td - Describe the AVR Target Machine ----------*- tablegen -*-===// 20b57cec5SDimitry Andric// 30b57cec5SDimitry Andric// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric// See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric// 70b57cec5SDimitry Andric//===---------------------------------------------------------------------===// 80b57cec5SDimitry Andric// This is the top level entry point for the AVR target. 90b57cec5SDimitry Andric//===---------------------------------------------------------------------===// 100b57cec5SDimitry Andric 110b57cec5SDimitry Andric//===---------------------------------------------------------------------===// 120b57cec5SDimitry Andric// Target-independent interfaces which we are implementing 130b57cec5SDimitry Andric//===---------------------------------------------------------------------===// 140b57cec5SDimitry Andric 150b57cec5SDimitry Andricinclude "llvm/Target/Target.td" 160b57cec5SDimitry Andric 170b57cec5SDimitry Andric//===---------------------------------------------------------------------===// 180b57cec5SDimitry Andric// AVR Device Definitions 190b57cec5SDimitry Andric//===---------------------------------------------------------------------===// 200b57cec5SDimitry Andric 210b57cec5SDimitry Andricinclude "AVRDevices.td" 220b57cec5SDimitry Andric 230b57cec5SDimitry Andric//===---------------------------------------------------------------------===// 240b57cec5SDimitry Andric// Register File Description 250b57cec5SDimitry Andric//===---------------------------------------------------------------------===// 260b57cec5SDimitry Andric 270b57cec5SDimitry Andricinclude "AVRRegisterInfo.td" 280b57cec5SDimitry Andric 290b57cec5SDimitry Andric//===---------------------------------------------------------------------===// 300b57cec5SDimitry Andric// Instruction Descriptions 310b57cec5SDimitry Andric//===---------------------------------------------------------------------===// 320b57cec5SDimitry Andric 330b57cec5SDimitry Andricinclude "AVRInstrInfo.td" 340b57cec5SDimitry Andric 350b57cec5SDimitry Andricdef AVRInstrInfo : InstrInfo; 360b57cec5SDimitry Andric 370b57cec5SDimitry Andric//===---------------------------------------------------------------------===// 380b57cec5SDimitry Andric// Calling Conventions 390b57cec5SDimitry Andric//===---------------------------------------------------------------------===// 400b57cec5SDimitry Andric 410b57cec5SDimitry Andricinclude "AVRCallingConv.td" 420b57cec5SDimitry Andric 430b57cec5SDimitry Andric//===---------------------------------------------------------------------===// 440b57cec5SDimitry Andric// Assembly Printers 450b57cec5SDimitry Andric//===---------------------------------------------------------------------===// 460b57cec5SDimitry Andric 470b57cec5SDimitry Andricdef AVRAsmWriter : AsmWriter { 480b57cec5SDimitry Andric string AsmWriterClassName = "InstPrinter"; 490b57cec5SDimitry Andric bit isMCAsmWriter = 1; 500b57cec5SDimitry Andric} 510b57cec5SDimitry Andric 520b57cec5SDimitry Andric//===---------------------------------------------------------------------===// 530b57cec5SDimitry Andric// Assembly Parsers 540b57cec5SDimitry Andric//===---------------------------------------------------------------------===// 550b57cec5SDimitry Andric 560b57cec5SDimitry Andricdef AVRAsmParser : AsmParser { 570b57cec5SDimitry Andric let ShouldEmitMatchRegisterName = 1; 580b57cec5SDimitry Andric let ShouldEmitMatchRegisterAltName = 1; 590b57cec5SDimitry Andric} 600b57cec5SDimitry Andric 610b57cec5SDimitry Andricdef AVRAsmParserVariant : AsmParserVariant { 620b57cec5SDimitry Andric int Variant = 0; 630b57cec5SDimitry Andric 640b57cec5SDimitry Andric // Recognize hard coded registers. 650b57cec5SDimitry Andric string RegisterPrefix = "$"; 660b57cec5SDimitry Andric string TokenizingCharacters = "+"; 670b57cec5SDimitry Andric} 680b57cec5SDimitry Andric 690b57cec5SDimitry Andric//===---------------------------------------------------------------------===// 700b57cec5SDimitry Andric// Target Declaration 710b57cec5SDimitry Andric//===---------------------------------------------------------------------===// 720b57cec5SDimitry Andric 730b57cec5SDimitry Andricdef AVR : Target { 740b57cec5SDimitry Andric let InstructionSet = AVRInstrInfo; 750b57cec5SDimitry Andric let AssemblyWriters = [AVRAsmWriter]; 760b57cec5SDimitry Andric 770b57cec5SDimitry Andric let AssemblyParsers = [AVRAsmParser]; 780b57cec5SDimitry Andric let AssemblyParserVariants = [AVRAsmParserVariant]; 790b57cec5SDimitry Andric} 80