1 //===-- AVRRegisterInfo.h - AVR Register Information Impl -------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the AVR implementation of the TargetRegisterInfo class.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_AVR_REGISTER_INFO_H
14 #define LLVM_AVR_REGISTER_INFO_H
15 
16 #include "llvm/CodeGen/TargetRegisterInfo.h"
17 
18 #define GET_REGINFO_HEADER
19 #include "AVRGenRegisterInfo.inc"
20 
21 namespace llvm {
22 
23 /// Utilities relating to AVR registers.
24 class AVRRegisterInfo : public AVRGenRegisterInfo {
25 public:
26   AVRRegisterInfo();
27 
28 public:
29   const uint16_t *
30   getCalleeSavedRegs(const MachineFunction *MF = 0) const override;
31   const uint32_t *getCallPreservedMask(const MachineFunction &MF,
32                                        CallingConv::ID CC) const override;
33   BitVector getReservedRegs(const MachineFunction &MF) const override;
34 
35   const TargetRegisterClass *
36   getLargestLegalSuperClass(const TargetRegisterClass *RC,
37                             const MachineFunction &MF) const override;
38 
39   /// Stack Frame Processing Methods
40   void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj,
41                            unsigned FIOperandNum,
42                            RegScavenger *RS = NULL) const override;
43 
44   Register getFrameRegister(const MachineFunction &MF) const override;
45 
46   const TargetRegisterClass *
47   getPointerRegClass(const MachineFunction &MF,
48                      unsigned Kind = 0) const override;
49 
50   /// Splits a 16-bit `DREGS` register into the lo/hi register pair.
51   /// \param Reg A 16-bit register to split.
52   void splitReg(Register Reg, Register &LoReg, Register &HiReg) const;
53 
54   bool shouldCoalesce(MachineInstr *MI,
55                       const TargetRegisterClass *SrcRC,
56                       unsigned SubReg,
57                       const TargetRegisterClass *DstRC,
58                       unsigned DstSubReg,
59                       const TargetRegisterClass *NewRC,
60                       LiveIntervals &LIS) const override;
61 };
62 
63 } // end namespace llvm
64 
65 #endif // LLVM_AVR_REGISTER_INFO_H
66