1 //===---- AVRAsmParser.cpp - Parse AVR assembly to MCInst instructions ----===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "AVR.h"
10 #include "AVRRegisterInfo.h"
11 #include "MCTargetDesc/AVRMCELFStreamer.h"
12 #include "MCTargetDesc/AVRMCExpr.h"
13 #include "MCTargetDesc/AVRMCTargetDesc.h"
14 #include "TargetInfo/AVRTargetInfo.h"
15 
16 #include "llvm/ADT/APInt.h"
17 #include "llvm/MC/MCContext.h"
18 #include "llvm/MC/MCExpr.h"
19 #include "llvm/MC/MCInst.h"
20 #include "llvm/MC/MCInstBuilder.h"
21 #include "llvm/MC/MCParser/MCAsmLexer.h"
22 #include "llvm/MC/MCParser/MCParsedAsmOperand.h"
23 #include "llvm/MC/MCParser/MCTargetAsmParser.h"
24 #include "llvm/MC/MCStreamer.h"
25 #include "llvm/MC/MCSubtargetInfo.h"
26 #include "llvm/MC/MCSymbol.h"
27 #include "llvm/MC/MCValue.h"
28 #include "llvm/MC/TargetRegistry.h"
29 #include "llvm/Support/Debug.h"
30 #include "llvm/Support/MathExtras.h"
31 
32 #include <array>
33 #include <sstream>
34 
35 #define DEBUG_TYPE "avr-asm-parser"
36 
37 using namespace llvm;
38 
39 namespace {
40 /// Parses AVR assembly from a stream.
41 class AVRAsmParser : public MCTargetAsmParser {
42   const MCSubtargetInfo &STI;
43   MCAsmParser &Parser;
44   const MCRegisterInfo *MRI;
45   const std::string GENERATE_STUBS = "gs";
46 
47   enum AVRMatchResultTy {
48     Match_InvalidRegisterOnTiny = FIRST_TARGET_MATCH_RESULT_TY + 1,
49   };
50 
51 #define GET_ASSEMBLER_HEADER
52 #include "AVRGenAsmMatcher.inc"
53 
54   bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
55                                OperandVector &Operands, MCStreamer &Out,
56                                uint64_t &ErrorInfo,
57                                bool MatchingInlineAsm) override;
58 
59   bool parseRegister(MCRegister &RegNo, SMLoc &StartLoc,
60                      SMLoc &EndLoc) override;
61   OperandMatchResultTy tryParseRegister(MCRegister &RegNo, SMLoc &StartLoc,
62                                         SMLoc &EndLoc) override;
63 
64   bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
65                         SMLoc NameLoc, OperandVector &Operands) override;
66 
67   ParseStatus parseDirective(AsmToken DirectiveID) override;
68 
69   OperandMatchResultTy parseMemriOperand(OperandVector &Operands);
70 
71   bool parseOperand(OperandVector &Operands, bool maybeReg);
72   int parseRegisterName(unsigned (*matchFn)(StringRef));
73   int parseRegisterName();
74   int parseRegister(bool RestoreOnFailure = false);
75   bool tryParseRegisterOperand(OperandVector &Operands);
76   bool tryParseExpression(OperandVector &Operands);
77   bool tryParseRelocExpression(OperandVector &Operands);
78   void eatComma();
79 
80   unsigned validateTargetOperandClass(MCParsedAsmOperand &Op,
81                                       unsigned Kind) override;
82 
83   unsigned toDREG(unsigned Reg, unsigned From = AVR::sub_lo) {
84     MCRegisterClass const *Class = &AVRMCRegisterClasses[AVR::DREGSRegClassID];
85     return MRI->getMatchingSuperReg(Reg, From, Class);
86   }
87 
88   bool emit(MCInst &Instruction, SMLoc const &Loc, MCStreamer &Out) const;
89   bool invalidOperand(SMLoc const &Loc, OperandVector const &Operands,
90                       uint64_t const &ErrorInfo);
91   bool missingFeature(SMLoc const &Loc, uint64_t const &ErrorInfo);
92 
93   ParseStatus parseLiteralValues(unsigned SizeInBytes, SMLoc L);
94 
95 public:
96   AVRAsmParser(const MCSubtargetInfo &STI, MCAsmParser &Parser,
97                const MCInstrInfo &MII, const MCTargetOptions &Options)
98       : MCTargetAsmParser(Options, STI, MII), STI(STI), Parser(Parser) {
99     MCAsmParserExtension::Initialize(Parser);
100     MRI = getContext().getRegisterInfo();
101 
102     setAvailableFeatures(ComputeAvailableFeatures(STI.getFeatureBits()));
103   }
104 
105   MCAsmParser &getParser() const { return Parser; }
106   MCAsmLexer &getLexer() const { return Parser.getLexer(); }
107 };
108 
109 /// An parsed AVR assembly operand.
110 class AVROperand : public MCParsedAsmOperand {
111   typedef MCParsedAsmOperand Base;
112   enum KindTy { k_Immediate, k_Register, k_Token, k_Memri } Kind;
113 
114 public:
115   AVROperand(StringRef Tok, SMLoc const &S)
116       : Kind(k_Token), Tok(Tok), Start(S), End(S) {}
117   AVROperand(unsigned Reg, SMLoc const &S, SMLoc const &E)
118       : Kind(k_Register), RegImm({Reg, nullptr}), Start(S), End(E) {}
119   AVROperand(MCExpr const *Imm, SMLoc const &S, SMLoc const &E)
120       : Kind(k_Immediate), RegImm({0, Imm}), Start(S), End(E) {}
121   AVROperand(unsigned Reg, MCExpr const *Imm, SMLoc const &S, SMLoc const &E)
122       : Kind(k_Memri), RegImm({Reg, Imm}), Start(S), End(E) {}
123 
124   struct RegisterImmediate {
125     unsigned Reg;
126     MCExpr const *Imm;
127   };
128   union {
129     StringRef Tok;
130     RegisterImmediate RegImm;
131   };
132 
133   SMLoc Start, End;
134 
135 public:
136   void addRegOperands(MCInst &Inst, unsigned N) const {
137     assert(Kind == k_Register && "Unexpected operand kind");
138     assert(N == 1 && "Invalid number of operands!");
139 
140     Inst.addOperand(MCOperand::createReg(getReg()));
141   }
142 
143   void addExpr(MCInst &Inst, const MCExpr *Expr) const {
144     // Add as immediate when possible
145     if (!Expr)
146       Inst.addOperand(MCOperand::createImm(0));
147     else if (const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(Expr))
148       Inst.addOperand(MCOperand::createImm(CE->getValue()));
149     else
150       Inst.addOperand(MCOperand::createExpr(Expr));
151   }
152 
153   void addImmOperands(MCInst &Inst, unsigned N) const {
154     assert(Kind == k_Immediate && "Unexpected operand kind");
155     assert(N == 1 && "Invalid number of operands!");
156 
157     const MCExpr *Expr = getImm();
158     addExpr(Inst, Expr);
159   }
160 
161   /// Adds the contained reg+imm operand to an instruction.
162   void addMemriOperands(MCInst &Inst, unsigned N) const {
163     assert(Kind == k_Memri && "Unexpected operand kind");
164     assert(N == 2 && "Invalid number of operands");
165 
166     Inst.addOperand(MCOperand::createReg(getReg()));
167     addExpr(Inst, getImm());
168   }
169 
170   void addImmCom8Operands(MCInst &Inst, unsigned N) const {
171     assert(N == 1 && "Invalid number of operands!");
172     // The operand is actually a imm8, but we have its bitwise
173     // negation in the assembly source, so twiddle it here.
174     const auto *CE = cast<MCConstantExpr>(getImm());
175     Inst.addOperand(MCOperand::createImm(~(uint8_t)CE->getValue()));
176   }
177 
178   bool isImmCom8() const {
179     if (!isImm())
180       return false;
181     const auto *CE = dyn_cast<MCConstantExpr>(getImm());
182     if (!CE)
183       return false;
184     int64_t Value = CE->getValue();
185     return isUInt<8>(Value);
186   }
187 
188   bool isReg() const override { return Kind == k_Register; }
189   bool isImm() const override { return Kind == k_Immediate; }
190   bool isToken() const override { return Kind == k_Token; }
191   bool isMem() const override { return Kind == k_Memri; }
192   bool isMemri() const { return Kind == k_Memri; }
193 
194   StringRef getToken() const {
195     assert(Kind == k_Token && "Invalid access!");
196     return Tok;
197   }
198 
199   unsigned getReg() const override {
200     assert((Kind == k_Register || Kind == k_Memri) && "Invalid access!");
201 
202     return RegImm.Reg;
203   }
204 
205   const MCExpr *getImm() const {
206     assert((Kind == k_Immediate || Kind == k_Memri) && "Invalid access!");
207     return RegImm.Imm;
208   }
209 
210   static std::unique_ptr<AVROperand> CreateToken(StringRef Str, SMLoc S) {
211     return std::make_unique<AVROperand>(Str, S);
212   }
213 
214   static std::unique_ptr<AVROperand> CreateReg(unsigned RegNum, SMLoc S,
215                                                SMLoc E) {
216     return std::make_unique<AVROperand>(RegNum, S, E);
217   }
218 
219   static std::unique_ptr<AVROperand> CreateImm(const MCExpr *Val, SMLoc S,
220                                                SMLoc E) {
221     return std::make_unique<AVROperand>(Val, S, E);
222   }
223 
224   static std::unique_ptr<AVROperand>
225   CreateMemri(unsigned RegNum, const MCExpr *Val, SMLoc S, SMLoc E) {
226     return std::make_unique<AVROperand>(RegNum, Val, S, E);
227   }
228 
229   void makeToken(StringRef Token) {
230     Kind = k_Token;
231     Tok = Token;
232   }
233 
234   void makeReg(unsigned RegNo) {
235     Kind = k_Register;
236     RegImm = {RegNo, nullptr};
237   }
238 
239   void makeImm(MCExpr const *Ex) {
240     Kind = k_Immediate;
241     RegImm = {0, Ex};
242   }
243 
244   void makeMemri(unsigned RegNo, MCExpr const *Imm) {
245     Kind = k_Memri;
246     RegImm = {RegNo, Imm};
247   }
248 
249   SMLoc getStartLoc() const override { return Start; }
250   SMLoc getEndLoc() const override { return End; }
251 
252   void print(raw_ostream &O) const override {
253     switch (Kind) {
254     case k_Token:
255       O << "Token: \"" << getToken() << "\"";
256       break;
257     case k_Register:
258       O << "Register: " << getReg();
259       break;
260     case k_Immediate:
261       O << "Immediate: \"" << *getImm() << "\"";
262       break;
263     case k_Memri: {
264       // only manually print the size for non-negative values,
265       // as the sign is inserted automatically.
266       O << "Memri: \"" << getReg() << '+' << *getImm() << "\"";
267       break;
268     }
269     }
270     O << "\n";
271   }
272 };
273 
274 } // end anonymous namespace.
275 
276 // Auto-generated Match Functions
277 
278 /// Maps from the set of all register names to a register number.
279 /// \note Generated by TableGen.
280 static unsigned MatchRegisterName(StringRef Name);
281 
282 /// Maps from the set of all alternative registernames to a register number.
283 /// \note Generated by TableGen.
284 static unsigned MatchRegisterAltName(StringRef Name);
285 
286 bool AVRAsmParser::invalidOperand(SMLoc const &Loc,
287                                   OperandVector const &Operands,
288                                   uint64_t const &ErrorInfo) {
289   SMLoc ErrorLoc = Loc;
290   char const *Diag = nullptr;
291 
292   if (ErrorInfo != ~0U) {
293     if (ErrorInfo >= Operands.size()) {
294       Diag = "too few operands for instruction.";
295     } else {
296       AVROperand const &Op = (AVROperand const &)*Operands[ErrorInfo];
297 
298       // TODO: See if we can do a better error than just "invalid ...".
299       if (Op.getStartLoc() != SMLoc()) {
300         ErrorLoc = Op.getStartLoc();
301       }
302     }
303   }
304 
305   if (!Diag) {
306     Diag = "invalid operand for instruction";
307   }
308 
309   return Error(ErrorLoc, Diag);
310 }
311 
312 bool AVRAsmParser::missingFeature(llvm::SMLoc const &Loc,
313                                   uint64_t const &ErrorInfo) {
314   return Error(Loc, "instruction requires a CPU feature not currently enabled");
315 }
316 
317 bool AVRAsmParser::emit(MCInst &Inst, SMLoc const &Loc, MCStreamer &Out) const {
318   Inst.setLoc(Loc);
319   Out.emitInstruction(Inst, STI);
320 
321   return false;
322 }
323 
324 bool AVRAsmParser::MatchAndEmitInstruction(SMLoc Loc, unsigned &Opcode,
325                                            OperandVector &Operands,
326                                            MCStreamer &Out, uint64_t &ErrorInfo,
327                                            bool MatchingInlineAsm) {
328   MCInst Inst;
329   unsigned MatchResult =
330       MatchInstructionImpl(Operands, Inst, ErrorInfo, MatchingInlineAsm);
331 
332   switch (MatchResult) {
333   case Match_Success:
334     return emit(Inst, Loc, Out);
335   case Match_MissingFeature:
336     return missingFeature(Loc, ErrorInfo);
337   case Match_InvalidOperand:
338     return invalidOperand(Loc, Operands, ErrorInfo);
339   case Match_MnemonicFail:
340     return Error(Loc, "invalid instruction");
341   case Match_InvalidRegisterOnTiny:
342     return Error(Loc, "invalid register on avrtiny");
343   default:
344     return true;
345   }
346 }
347 
348 /// Parses a register name using a given matching function.
349 /// Checks for lowercase or uppercase if necessary.
350 int AVRAsmParser::parseRegisterName(unsigned (*matchFn)(StringRef)) {
351   StringRef Name = Parser.getTok().getString();
352 
353   int RegNum = matchFn(Name);
354 
355   // GCC supports case insensitive register names. Some of the AVR registers
356   // are all lower case, some are all upper case but non are mixed. We prefer
357   // to use the original names in the register definitions. That is why we
358   // have to test both upper and lower case here.
359   if (RegNum == AVR::NoRegister) {
360     RegNum = matchFn(Name.lower());
361   }
362   if (RegNum == AVR::NoRegister) {
363     RegNum = matchFn(Name.upper());
364   }
365 
366   return RegNum;
367 }
368 
369 int AVRAsmParser::parseRegisterName() {
370   int RegNum = parseRegisterName(&MatchRegisterName);
371 
372   if (RegNum == AVR::NoRegister)
373     RegNum = parseRegisterName(&MatchRegisterAltName);
374 
375   return RegNum;
376 }
377 
378 int AVRAsmParser::parseRegister(bool RestoreOnFailure) {
379   int RegNum = AVR::NoRegister;
380 
381   if (Parser.getTok().is(AsmToken::Identifier)) {
382     // Check for register pair syntax
383     if (Parser.getLexer().peekTok().is(AsmToken::Colon)) {
384       AsmToken HighTok = Parser.getTok();
385       Parser.Lex();
386       AsmToken ColonTok = Parser.getTok();
387       Parser.Lex(); // Eat high (odd) register and colon
388 
389       if (Parser.getTok().is(AsmToken::Identifier)) {
390         // Convert lower (even) register to DREG
391         RegNum = toDREG(parseRegisterName());
392       }
393       if (RegNum == AVR::NoRegister && RestoreOnFailure) {
394         getLexer().UnLex(std::move(ColonTok));
395         getLexer().UnLex(std::move(HighTok));
396       }
397     } else {
398       RegNum = parseRegisterName();
399     }
400   }
401   return RegNum;
402 }
403 
404 bool AVRAsmParser::tryParseRegisterOperand(OperandVector &Operands) {
405   int RegNo = parseRegister();
406 
407   if (RegNo == AVR::NoRegister)
408     return true;
409 
410   // Reject R0~R15 on avrtiny.
411   if (AVR::R0 <= RegNo && RegNo <= AVR::R15 &&
412       STI.hasFeature(AVR::FeatureTinyEncoding))
413     return Error(Parser.getTok().getLoc(), "invalid register on avrtiny");
414 
415   AsmToken const &T = Parser.getTok();
416   Operands.push_back(AVROperand::CreateReg(RegNo, T.getLoc(), T.getEndLoc()));
417   Parser.Lex(); // Eat register token.
418 
419   return false;
420 }
421 
422 bool AVRAsmParser::tryParseExpression(OperandVector &Operands) {
423   SMLoc S = Parser.getTok().getLoc();
424 
425   if (!tryParseRelocExpression(Operands))
426     return false;
427 
428   if ((Parser.getTok().getKind() == AsmToken::Plus ||
429        Parser.getTok().getKind() == AsmToken::Minus) &&
430       Parser.getLexer().peekTok().getKind() == AsmToken::Identifier) {
431     // Don't handle this case - it should be split into two
432     // separate tokens.
433     return true;
434   }
435 
436   // Parse (potentially inner) expression
437   MCExpr const *Expression;
438   if (getParser().parseExpression(Expression))
439     return true;
440 
441   SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
442   Operands.push_back(AVROperand::CreateImm(Expression, S, E));
443   return false;
444 }
445 
446 bool AVRAsmParser::tryParseRelocExpression(OperandVector &Operands) {
447   bool isNegated = false;
448   AVRMCExpr::VariantKind ModifierKind = AVRMCExpr::VK_AVR_None;
449 
450   SMLoc S = Parser.getTok().getLoc();
451 
452   // Reject the form in which sign comes first. This behaviour is
453   // in accordance with avr-gcc.
454   AsmToken::TokenKind CurTok = Parser.getLexer().getKind();
455   if (CurTok == AsmToken::Minus || CurTok == AsmToken::Plus)
456     return true;
457 
458   // Check for sign.
459   AsmToken tokens[2];
460   if (Parser.getLexer().peekTokens(tokens) == 2)
461     if (tokens[0].getKind() == AsmToken::LParen &&
462         tokens[1].getKind() == AsmToken::Minus)
463       isNegated = true;
464 
465   // Check if we have a target specific modifier (lo8, hi8, &c)
466   if (CurTok != AsmToken::Identifier ||
467       Parser.getLexer().peekTok().getKind() != AsmToken::LParen) {
468     // Not a reloc expr
469     return true;
470   }
471   StringRef ModifierName = Parser.getTok().getString();
472   ModifierKind = AVRMCExpr::getKindByName(ModifierName);
473 
474   if (ModifierKind != AVRMCExpr::VK_AVR_None) {
475     Parser.Lex();
476     Parser.Lex(); // Eat modifier name and parenthesis
477     if (Parser.getTok().getString() == GENERATE_STUBS &&
478         Parser.getTok().getKind() == AsmToken::Identifier) {
479       std::string GSModName = ModifierName.str() + "_" + GENERATE_STUBS;
480       ModifierKind = AVRMCExpr::getKindByName(GSModName);
481       if (ModifierKind != AVRMCExpr::VK_AVR_None)
482         Parser.Lex(); // Eat gs modifier name
483     }
484   } else {
485     return Error(Parser.getTok().getLoc(), "unknown modifier");
486   }
487 
488   if (tokens[1].getKind() == AsmToken::Minus ||
489       tokens[1].getKind() == AsmToken::Plus) {
490     Parser.Lex();
491     assert(Parser.getTok().getKind() == AsmToken::LParen);
492     Parser.Lex(); // Eat the sign and parenthesis
493   }
494 
495   MCExpr const *InnerExpression;
496   if (getParser().parseExpression(InnerExpression))
497     return true;
498 
499   if (tokens[1].getKind() == AsmToken::Minus ||
500       tokens[1].getKind() == AsmToken::Plus) {
501     assert(Parser.getTok().getKind() == AsmToken::RParen);
502     Parser.Lex(); // Eat closing parenthesis
503   }
504 
505   // If we have a modifier wrap the inner expression
506   assert(Parser.getTok().getKind() == AsmToken::RParen);
507   Parser.Lex(); // Eat closing parenthesis
508 
509   MCExpr const *Expression =
510       AVRMCExpr::create(ModifierKind, InnerExpression, isNegated, getContext());
511 
512   SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
513   Operands.push_back(AVROperand::CreateImm(Expression, S, E));
514 
515   return false;
516 }
517 
518 bool AVRAsmParser::parseOperand(OperandVector &Operands, bool maybeReg) {
519   LLVM_DEBUG(dbgs() << "parseOperand\n");
520 
521   switch (getLexer().getKind()) {
522   default:
523     return Error(Parser.getTok().getLoc(), "unexpected token in operand");
524 
525   case AsmToken::Identifier:
526     // Try to parse a register, fall through to the next case if it fails.
527     if (maybeReg && !tryParseRegisterOperand(Operands)) {
528       return false;
529     }
530     [[fallthrough]];
531   case AsmToken::LParen:
532   case AsmToken::Integer:
533   case AsmToken::Dot:
534     return tryParseExpression(Operands);
535   case AsmToken::Plus:
536   case AsmToken::Minus: {
537     // If the sign preceeds a number, parse the number,
538     // otherwise treat the sign a an independent token.
539     switch (getLexer().peekTok().getKind()) {
540     case AsmToken::Integer:
541     case AsmToken::BigNum:
542     case AsmToken::Identifier:
543     case AsmToken::Real:
544       if (!tryParseExpression(Operands))
545         return false;
546       break;
547     default:
548       break;
549     }
550     // Treat the token as an independent token.
551     Operands.push_back(AVROperand::CreateToken(Parser.getTok().getString(),
552                                                Parser.getTok().getLoc()));
553     Parser.Lex(); // Eat the token.
554     return false;
555   }
556   }
557 
558   // Could not parse operand
559   return true;
560 }
561 
562 OperandMatchResultTy AVRAsmParser::parseMemriOperand(OperandVector &Operands) {
563   LLVM_DEBUG(dbgs() << "parseMemriOperand()\n");
564 
565   SMLoc E, S;
566   MCExpr const *Expression;
567   int RegNo;
568 
569   // Parse register.
570   {
571     RegNo = parseRegister();
572 
573     if (RegNo == AVR::NoRegister)
574       return MatchOperand_ParseFail;
575 
576     S = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
577     Parser.Lex(); // Eat register token.
578   }
579 
580   // Parse immediate;
581   {
582     if (getParser().parseExpression(Expression))
583       return MatchOperand_ParseFail;
584 
585     E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
586   }
587 
588   Operands.push_back(AVROperand::CreateMemri(RegNo, Expression, S, E));
589 
590   return MatchOperand_Success;
591 }
592 
593 bool AVRAsmParser::parseRegister(MCRegister &RegNo, SMLoc &StartLoc,
594                                  SMLoc &EndLoc) {
595   StartLoc = Parser.getTok().getLoc();
596   RegNo = parseRegister(/*RestoreOnFailure=*/false);
597   EndLoc = Parser.getTok().getLoc();
598 
599   return (RegNo == AVR::NoRegister);
600 }
601 
602 OperandMatchResultTy AVRAsmParser::tryParseRegister(MCRegister &RegNo,
603                                                     SMLoc &StartLoc,
604                                                     SMLoc &EndLoc) {
605   StartLoc = Parser.getTok().getLoc();
606   RegNo = parseRegister(/*RestoreOnFailure=*/true);
607   EndLoc = Parser.getTok().getLoc();
608 
609   if (RegNo == AVR::NoRegister)
610     return MatchOperand_NoMatch;
611   return MatchOperand_Success;
612 }
613 
614 void AVRAsmParser::eatComma() {
615   if (getLexer().is(AsmToken::Comma)) {
616     Parser.Lex();
617   } else {
618     // GCC allows commas to be omitted.
619   }
620 }
621 
622 bool AVRAsmParser::ParseInstruction(ParseInstructionInfo &Info,
623                                     StringRef Mnemonic, SMLoc NameLoc,
624                                     OperandVector &Operands) {
625   Operands.push_back(AVROperand::CreateToken(Mnemonic, NameLoc));
626 
627   int OperandNum = -1;
628   while (getLexer().isNot(AsmToken::EndOfStatement)) {
629     OperandNum++;
630     if (OperandNum > 0)
631       eatComma();
632 
633     auto MatchResult = MatchOperandParserImpl(Operands, Mnemonic);
634 
635     if (MatchResult == MatchOperand_Success) {
636       continue;
637     }
638 
639     if (MatchResult == MatchOperand_ParseFail) {
640       SMLoc Loc = getLexer().getLoc();
641       Parser.eatToEndOfStatement();
642 
643       return Error(Loc, "failed to parse register and immediate pair");
644     }
645 
646     // These specific operands should be treated as addresses/symbols/labels,
647     // other than registers.
648     bool maybeReg = true;
649     if (OperandNum == 1) {
650       std::array<StringRef, 8> Insts = {"lds", "adiw", "sbiw", "ldi"};
651       for (auto Inst : Insts) {
652         if (Inst == Mnemonic) {
653           maybeReg = false;
654           break;
655         }
656       }
657     } else if (OperandNum == 0) {
658       std::array<StringRef, 8> Insts = {"sts", "call", "rcall", "rjmp", "jmp"};
659       for (auto Inst : Insts) {
660         if (Inst == Mnemonic) {
661           maybeReg = false;
662           break;
663         }
664       }
665     }
666 
667     if (parseOperand(Operands, maybeReg)) {
668       SMLoc Loc = getLexer().getLoc();
669       Parser.eatToEndOfStatement();
670       return Error(Loc, "unexpected token in argument list");
671     }
672   }
673   Parser.Lex(); // Consume the EndOfStatement
674   return false;
675 }
676 
677 ParseStatus AVRAsmParser::parseDirective(llvm::AsmToken DirectiveID) {
678   StringRef IDVal = DirectiveID.getIdentifier();
679   if (IDVal.lower() == ".long")
680     return parseLiteralValues(SIZE_LONG, DirectiveID.getLoc());
681   if (IDVal.lower() == ".word" || IDVal.lower() == ".short")
682     return parseLiteralValues(SIZE_WORD, DirectiveID.getLoc());
683   if (IDVal.lower() == ".byte")
684     return parseLiteralValues(1, DirectiveID.getLoc());
685   return ParseStatus::NoMatch;
686 }
687 
688 ParseStatus AVRAsmParser::parseLiteralValues(unsigned SizeInBytes, SMLoc L) {
689   MCAsmParser &Parser = getParser();
690   AVRMCELFStreamer &AVRStreamer =
691       static_cast<AVRMCELFStreamer &>(Parser.getStreamer());
692   AsmToken Tokens[2];
693   size_t ReadCount = Parser.getLexer().peekTokens(Tokens);
694   if (ReadCount == 2 && Parser.getTok().getKind() == AsmToken::Identifier &&
695       Tokens[0].getKind() == AsmToken::Minus &&
696       Tokens[1].getKind() == AsmToken::Identifier) {
697     MCSymbol *Symbol = getContext().getOrCreateSymbol(".text");
698     AVRStreamer.emitValueForModiferKind(Symbol, SizeInBytes, L,
699                                         AVRMCExpr::VK_AVR_None);
700     return ParseStatus::NoMatch;
701   }
702 
703   if (Parser.getTok().getKind() == AsmToken::Identifier &&
704       Parser.getLexer().peekTok().getKind() == AsmToken::LParen) {
705     StringRef ModifierName = Parser.getTok().getString();
706     AVRMCExpr::VariantKind ModifierKind =
707         AVRMCExpr::getKindByName(ModifierName);
708     if (ModifierKind != AVRMCExpr::VK_AVR_None) {
709       Parser.Lex();
710       Parser.Lex(); // Eat the modifier and parenthesis
711     } else {
712       return Error(Parser.getTok().getLoc(), "unknown modifier");
713     }
714     MCSymbol *Symbol =
715         getContext().getOrCreateSymbol(Parser.getTok().getString());
716     AVRStreamer.emitValueForModiferKind(Symbol, SizeInBytes, L, ModifierKind);
717     Lex(); // Eat the symbol name.
718     if (parseToken(AsmToken::RParen))
719       return ParseStatus::Failure;
720     return parseEOL();
721   }
722 
723   auto parseOne = [&]() -> bool {
724     const MCExpr *Value;
725     if (Parser.parseExpression(Value))
726       return true;
727     Parser.getStreamer().emitValue(Value, SizeInBytes, L);
728     return false;
729   };
730   return (parseMany(parseOne));
731 }
732 
733 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAVRAsmParser() {
734   RegisterMCAsmParser<AVRAsmParser> X(getTheAVRTarget());
735 }
736 
737 #define GET_REGISTER_MATCHER
738 #define GET_MATCHER_IMPLEMENTATION
739 #include "AVRGenAsmMatcher.inc"
740 
741 // Uses enums defined in AVRGenAsmMatcher.inc
742 unsigned AVRAsmParser::validateTargetOperandClass(MCParsedAsmOperand &AsmOp,
743                                                   unsigned ExpectedKind) {
744   AVROperand &Op = static_cast<AVROperand &>(AsmOp);
745   MatchClassKind Expected = static_cast<MatchClassKind>(ExpectedKind);
746 
747   // If need be, GCC converts bare numbers to register names
748   // It's ugly, but GCC supports it.
749   if (Op.isImm()) {
750     if (MCConstantExpr const *Const = dyn_cast<MCConstantExpr>(Op.getImm())) {
751       int64_t RegNum = Const->getValue();
752 
753       // Reject R0~R15 on avrtiny.
754       if (0 <= RegNum && RegNum <= 15 &&
755           STI.hasFeature(AVR::FeatureTinyEncoding))
756         return Match_InvalidRegisterOnTiny;
757 
758       std::ostringstream RegName;
759       RegName << "r" << RegNum;
760       RegNum = MatchRegisterName(RegName.str());
761       if (RegNum != AVR::NoRegister) {
762         Op.makeReg(RegNum);
763         if (validateOperandClass(Op, Expected) == Match_Success) {
764           return Match_Success;
765         }
766       }
767       // Let the other quirks try their magic.
768     }
769   }
770 
771   if (Op.isReg()) {
772     // If the instruction uses a register pair but we got a single, lower
773     // register we perform a "class cast".
774     if (isSubclass(Expected, MCK_DREGS)) {
775       unsigned correspondingDREG = toDREG(Op.getReg());
776 
777       if (correspondingDREG != AVR::NoRegister) {
778         Op.makeReg(correspondingDREG);
779         return validateOperandClass(Op, Expected);
780       }
781     }
782   }
783   return Match_InvalidOperand;
784 }
785