1 //===- Bitcode/Writer/DXILBitcodeWriter.cpp - DXIL Bitcode Writer ---------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // Bitcode writer implementation.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "llvm/ADT/StringRef.h"
14 #include "llvm/IR/ModuleSummaryIndex.h"
15 #include "llvm/MC/StringTableBuilder.h"
16 #include "llvm/Support/Allocator.h"
17 #include "llvm/Support/MemoryBufferRef.h"
18 #include <map>
19 #include <memory>
20 #include <string>
21 #include <vector>
22 
23 namespace llvm {
24 
25 class BitstreamWriter;
26 class Module;
27 class raw_ostream;
28 
29 namespace dxil {
30 
31 class BitcodeWriter {
32   SmallVectorImpl<char> &Buffer;
33   std::unique_ptr<BitstreamWriter> Stream;
34 
35   StringTableBuilder StrtabBuilder{StringTableBuilder::RAW};
36 
37   // Owns any strings created by the irsymtab writer until we create the
38   // string table.
39   BumpPtrAllocator Alloc;
40 
41   void writeBlob(unsigned Block, unsigned Record, StringRef Blob);
42 
43   std::vector<Module *> Mods;
44 
45 public:
46   /// Create a BitcodeWriter that writes to Buffer.
47   BitcodeWriter(SmallVectorImpl<char> &Buffer, raw_fd_stream *FS = nullptr);
48 
49   ~BitcodeWriter();
50 
51   /// Write the specified module to the buffer specified at construction time.
52   void writeModule(const Module &M);
53 };
54 
55 /// Write the specified module to the specified raw output stream.
56 ///
57 /// For streams where it matters, the given stream should be in "binary"
58 /// mode.
59 void WriteDXILToFile(const Module &M, raw_ostream &Out);
60 
61 } // namespace dxil
62 
63 } // namespace llvm
64