1 //===- HexagonMachineScheduler.h - Custom Hexagon MI scheduler --*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // Custom Hexagon MI scheduler.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONMACHINESCHEDULER_H
14 #define LLVM_LIB_TARGET_HEXAGON_HEXAGONMACHINESCHEDULER_H
15 
16 #include "llvm/CodeGen/MachineScheduler.h"
17 #include "llvm/CodeGen/RegisterPressure.h"
18 #include "llvm/CodeGen/TargetSubtargetInfo.h"
19 #include "llvm/CodeGen/VLIWMachineScheduler.h"
20 
21 namespace llvm {
22 
23 class SUnit;
24 
25 class HexagonVLIWResourceModel : public VLIWResourceModel {
26 public:
27   using VLIWResourceModel::VLIWResourceModel;
28   bool hasDependence(const SUnit *SUd, const SUnit *SUu) override;
29 };
30 
31 class HexagonConvergingVLIWScheduler : public ConvergingVLIWScheduler {
32 protected:
33   VLIWResourceModel *
34   createVLIWResourceModel(const TargetSubtargetInfo &STI,
35                           const TargetSchedModel *SchedModel) const override;
36   int SchedulingCost(ReadyQueue &Q, SUnit *SU, SchedCandidate &Candidate,
37                      RegPressureDelta &Delta, bool verbose) override;
38 };
39 
40 } // end namespace llvm
41 
42 #endif // LLVM_LIB_TARGET_HEXAGON_HEXAGONMACHINESCHEDULER_H
43