1//==- HexagonPatternsV65.td -------------------------------*- tablegen -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9multiclass vgathermh<RegisterClass RC> {
10  let isCodeGenOnly = 1, isPseudo = 1, mayLoad = 1,
11  mayStore = 1, addrMode = BaseImmOffset, accessSize = HalfWordAccess in
12  def NAME : CVI_GATHER_TMP_LD_Resource_NoOpcode<(outs ),
13                           (ins IntRegs:$_dst_, s4_0Imm:$Ii,
14                                IntRegs:$Rt, ModRegs:$Mu, RC:$Vv),
15                           ".error \"should not emit\" ",
16                           []>;
17}
18
19multiclass vgathermw<RegisterClass RC> {
20  let isCodeGenOnly = 1, isPseudo = 1, mayLoad = 1,
21  mayStore = 1, addrMode = BaseImmOffset, accessSize = WordAccess in
22  def NAME : CVI_GATHER_TMP_LD_Resource_NoOpcode<(outs ),
23                           (ins IntRegs:$_dst_, s4_0Imm:$Ii,
24                                IntRegs:$Rt, ModRegs:$Mu, RC:$Vv),
25                           ".error \"should not emit\" ",
26                           []>;
27}
28
29multiclass vgathermhw<RegisterClass RC> {
30  let isCodeGenOnly = 1, isPseudo = 1, mayLoad = 1,
31   mayStore = 1, addrMode = BaseImmOffset, accessSize = HalfWordAccess in
32  def NAME : CVI_GATHER_TMP_LD_Resource_NoOpcode<(outs ),
33                           (ins IntRegs:$_dst_, s4_0Imm:$Ii,
34                                IntRegs:$Rt, ModRegs:$Mu, RC:$Vv),
35                           ".error \"should not emit\" ",
36                           []>;
37}
38
39defm V6_vgathermh_pseudo  : vgathermh<HvxVR>;
40defm V6_vgathermw_pseudo  : vgathermw<HvxVR>;
41defm V6_vgathermhw_pseudo  : vgathermhw<HvxWR>;
42
43multiclass vgathermhq<RegisterClass RC1, RegisterClass RC2> {
44  let isCodeGenOnly = 1, isPseudo = 1, mayLoad = 1,
45  mayStore = 1, addrMode = BaseImmOffset, accessSize = HalfWordAccess in
46  def NAME : CVI_GATHER_TMP_LD_Resource_NoOpcode<(outs ),
47                           (ins IntRegs:$_dst_, s4_0Imm:$Ii,
48                                RC2:$Vq, IntRegs:$Rt, ModRegs:$Mu,
49                                RC1:$Vv),
50                           ".error \"should not emit\" ",
51                           []>;
52}
53
54multiclass vgathermwq<RegisterClass RC1, RegisterClass RC2> {
55  let isCodeGenOnly = 1, isPseudo = 1, mayLoad = 1,
56  mayStore = 1, addrMode = BaseImmOffset, accessSize = WordAccess in
57  def NAME : CVI_GATHER_TMP_LD_Resource_NoOpcode<(outs ),
58                           (ins IntRegs:$_dst_, s4_0Imm:$Ii,
59                                RC2:$Vq, IntRegs:$Rt, ModRegs:$Mu,
60                                RC1:$Vv),
61                           ".error \"should not emit\" ",
62                           []>;
63}
64
65multiclass vgathermhwq<RegisterClass RC1, RegisterClass RC2> {
66  let isCodeGenOnly = 1, isPseudo = 1, mayLoad = 1,
67  mayStore = 1, addrMode = BaseImmOffset, accessSize = HalfWordAccess  in
68  def NAME : CVI_GATHER_TMP_LD_Resource_NoOpcode<(outs ),
69                           (ins IntRegs:$_dst_, s4_0Imm:$Ii,
70                              RC2:$Vq, IntRegs:$Rt, ModRegs:$Mu,
71                              RC1:$Vv),
72                           ".error \"should not emit\" ",
73                           []>;
74}
75
76defm V6_vgathermhq_pseudo  : vgathermhq<HvxVR, HvxQR>;
77defm V6_vgathermwq_pseudo  : vgathermwq<HvxVR, HvxQR>;
78defm V6_vgathermhwq_pseudo  : vgathermhwq<HvxWR, HvxQR>;
79