1 //==- HexagonTargetTransformInfo.cpp - Hexagon specific TTI pass -*- C++ -*-==//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 /// \file
8 /// This file implements a TargetTransformInfo analysis pass specific to the
9 /// Hexagon target machine. It uses the target's detailed information to provide
10 /// more precise answers to certain TTI queries, while letting the target
11 /// independent and default TTI implementations handle the rest.
12 ///
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONTARGETTRANSFORMINFO_H
16 #define LLVM_LIB_TARGET_HEXAGON_HEXAGONTARGETTRANSFORMINFO_H
17 
18 #include "Hexagon.h"
19 #include "HexagonSubtarget.h"
20 #include "HexagonTargetMachine.h"
21 #include "llvm/ADT/ArrayRef.h"
22 #include "llvm/Analysis/TargetTransformInfo.h"
23 #include "llvm/CodeGen/BasicTTIImpl.h"
24 #include "llvm/IR/Function.h"
25 
26 namespace llvm {
27 
28 class Loop;
29 class ScalarEvolution;
30 class User;
31 class Value;
32 
33 class HexagonTTIImpl : public BasicTTIImplBase<HexagonTTIImpl> {
34   using BaseT = BasicTTIImplBase<HexagonTTIImpl>;
35   using TTI = TargetTransformInfo;
36 
37   friend BaseT;
38 
39   const HexagonSubtarget &ST;
40   const HexagonTargetLowering &TLI;
41 
42   const HexagonSubtarget *getST() const { return &ST; }
43   const HexagonTargetLowering *getTLI() const { return &TLI; }
44 
45   bool useHVX() const;
46 
47   // Returns the number of vector elements of Ty, if Ty is a vector type,
48   // or 1 if Ty is a scalar type. It is incorrect to call this function
49   // with any other type.
50   unsigned getTypeNumElements(Type *Ty) const;
51 
52 public:
53   explicit HexagonTTIImpl(const HexagonTargetMachine *TM, const Function &F)
54       : BaseT(TM, F.getParent()->getDataLayout()),
55         ST(*TM->getSubtargetImpl(F)), TLI(*ST.getTargetLowering()) {}
56 
57   /// \name Scalar TTI Implementations
58   /// @{
59 
60   TTI::PopcntSupportKind getPopcntSupport(unsigned IntTyWidthInBit) const;
61 
62   // The Hexagon target can unroll loops with run-time trip counts.
63   void getUnrollingPreferences(Loop *L, ScalarEvolution &SE,
64                                TTI::UnrollingPreferences &UP,
65                                OptimizationRemarkEmitter *ORE);
66 
67   void getPeelingPreferences(Loop *L, ScalarEvolution &SE,
68                              TTI::PeelingPreferences &PP);
69 
70   /// Bias LSR towards creating post-increment opportunities.
71   TTI::AddressingModeKind
72     getPreferredAddressingMode(const Loop *L, ScalarEvolution *SE) const;
73 
74   // L1 cache prefetch.
75   unsigned getPrefetchDistance() const override;
76   unsigned getCacheLineSize() const override;
77 
78   /// @}
79 
80   /// \name Vector TTI Implementations
81   /// @{
82 
83   unsigned getNumberOfRegisters(bool vector) const;
84   unsigned getMaxInterleaveFactor(unsigned VF);
85   TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const;
86   unsigned getMinVectorRegisterBitWidth() const;
87   ElementCount getMinimumVF(unsigned ElemWidth, bool IsScalable) const;
88 
89   bool shouldMaximizeVectorBandwidth() const {
90     return true;
91   }
92   bool supportsEfficientVectorElementLoadStore() {
93     return false;
94   }
95   bool hasBranchDivergence() {
96     return false;
97   }
98   bool enableAggressiveInterleaving(bool LoopHasReductions) {
99     return false;
100   }
101   bool prefersVectorizedAddressing() {
102     return false;
103   }
104   bool enableInterleavedAccessVectorization() {
105     return true;
106   }
107 
108   InstructionCost getScalarizationOverhead(VectorType *Ty,
109                                            const APInt &DemandedElts,
110                                            bool Insert, bool Extract);
111   InstructionCost getOperandsScalarizationOverhead(ArrayRef<const Value *> Args,
112                                                    ArrayRef<Type *> Tys);
113   InstructionCost getCallInstrCost(Function *F, Type *RetTy,
114                                    ArrayRef<Type *> Tys,
115                                    TTI::TargetCostKind CostKind);
116   InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
117                                         TTI::TargetCostKind CostKind);
118   InstructionCost getAddressComputationCost(Type *Tp, ScalarEvolution *SE,
119                                             const SCEV *S);
120   InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src,
121                                   MaybeAlign Alignment, unsigned AddressSpace,
122                                   TTI::TargetCostKind CostKind,
123                                   const Instruction *I = nullptr);
124   InstructionCost getMaskedMemoryOpCost(unsigned Opcode, Type *Src,
125                                         Align Alignment, unsigned AddressSpace,
126                                         TTI::TargetCostKind CostKind);
127   InstructionCost getShuffleCost(TTI::ShuffleKind Kind, Type *Tp,
128                                  ArrayRef<int> Mask, int Index, Type *SubTp);
129   InstructionCost getGatherScatterOpCost(unsigned Opcode, Type *DataTy,
130                                          const Value *Ptr, bool VariableMask,
131                                          Align Alignment,
132                                          TTI::TargetCostKind CostKind,
133                                          const Instruction *I);
134   InstructionCost getInterleavedMemoryOpCost(
135       unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
136       Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
137       bool UseMaskForCond = false, bool UseMaskForGaps = false);
138   InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
139                                      CmpInst::Predicate VecPred,
140                                      TTI::TargetCostKind CostKind,
141                                      const Instruction *I = nullptr);
142   InstructionCost getArithmeticInstrCost(
143       unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
144       TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
145       TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
146       TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
147       TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None,
148       ArrayRef<const Value *> Args = ArrayRef<const Value *>(),
149       const Instruction *CxtI = nullptr);
150   InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
151                                    TTI::CastContextHint CCH,
152                                    TTI::TargetCostKind CostKind,
153                                    const Instruction *I = nullptr);
154   InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val,
155                                      unsigned Index);
156 
157   InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind,
158                                  const Instruction *I = nullptr) {
159     return 1;
160   }
161 
162   bool isLegalMaskedStore(Type *DataType, Align Alignment);
163   bool isLegalMaskedLoad(Type *DataType, Align Alignment);
164 
165   /// @}
166 
167   InstructionCost getUserCost(const User *U, ArrayRef<const Value *> Operands,
168                               TTI::TargetCostKind CostKind);
169 
170   // Hexagon specific decision to generate a lookup table.
171   bool shouldBuildLookupTables() const;
172 };
173 
174 } // end namespace llvm
175 #endif // LLVM_LIB_TARGET_HEXAGON_HEXAGONTARGETTRANSFORMINFO_H
176