1//=- LoongArchLASXInstrInfo.td - LoongArch LASX instructions -*- tablegen -*-=// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8// 9// This file describes the Advanced SIMD extension instructions. 10// 11//===----------------------------------------------------------------------===// 12 13def lasxsplati8 14 : PatFrag<(ops node:$e0), 15 (v32i8 (build_vector node:$e0, node:$e0, node:$e0, node:$e0, 16 node:$e0, node:$e0, node:$e0, node:$e0, 17 node:$e0, node:$e0, node:$e0, node:$e0, 18 node:$e0, node:$e0, node:$e0, node:$e0, 19 node:$e0, node:$e0, node:$e0, node:$e0, 20 node:$e0, node:$e0, node:$e0, node:$e0, 21 node:$e0, node:$e0, node:$e0, node:$e0, 22 node:$e0, node:$e0, node:$e0, node:$e0))>; 23def lasxsplati16 24 : PatFrag<(ops node:$e0), 25 (v16i16 (build_vector node:$e0, node:$e0, node:$e0, node:$e0, 26 node:$e0, node:$e0, node:$e0, node:$e0, 27 node:$e0, node:$e0, node:$e0, node:$e0, 28 node:$e0, node:$e0, node:$e0, node:$e0))>; 29def lasxsplati32 30 : PatFrag<(ops node:$e0), 31 (v8i32 (build_vector node:$e0, node:$e0, node:$e0, node:$e0, 32 node:$e0, node:$e0, node:$e0, node:$e0))>; 33def lasxsplati64 34 : PatFrag<(ops node:$e0), 35 (v4i64 (build_vector node:$e0, node:$e0, node:$e0, node:$e0))>; 36def lasxsplatf32 37 : PatFrag<(ops node:$e0), 38 (v8f32 (build_vector node:$e0, node:$e0, node:$e0, node:$e0, 39 node:$e0, node:$e0, node:$e0, node:$e0))>; 40def lasxsplatf64 41 : PatFrag<(ops node:$e0), 42 (v4f64 (build_vector node:$e0, node:$e0, node:$e0, node:$e0))>; 43 44//===----------------------------------------------------------------------===// 45// Instruction class templates 46//===----------------------------------------------------------------------===// 47 48class LASX1RI13_XI<bits<32> op, Operand ImmOpnd = simm13> 49 : Fmt1RI13_XI<op, (outs LASX256:$xd), (ins ImmOpnd:$imm13), "$xd, $imm13">; 50 51class LASX2R_XX<bits<32> op> 52 : Fmt2R_XX<op, (outs LASX256:$xd), (ins LASX256:$xj), "$xd, $xj">; 53 54class LASX2R_XR<bits<32> op> 55 : Fmt2R_XR<op, (outs LASX256:$xd), (ins GPR:$rj), "$xd, $rj">; 56 57class LASX2R_CX<bits<32> op> 58 : Fmt2R_CX<op, (outs CFR:$cd), (ins LASX256:$xj), "$cd, $xj">; 59 60class LASX2RI1_XXI<bits<32> op, Operand ImmOpnd = uimm1> 61 : Fmt2RI1_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm1), 62 "$xd, $xj, $imm1">; 63 64class LASX2RI2_XXI<bits<32> op, Operand ImmOpnd = uimm2> 65 : Fmt2RI2_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm2), 66 "$xd, $xj, $imm2">; 67 68class LASX2RI2_RXI<bits<32> op, Operand ImmOpnd = uimm2> 69 : Fmt2RI2_RXI<op, (outs GPR:$rd), (ins LASX256:$xj, ImmOpnd:$imm2), 70 "$rd, $xj, $imm2">; 71 72class LASX2RI3_XXI<bits<32> op, Operand ImmOpnd = uimm3> 73 : Fmt2RI3_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm3), 74 "$xd, $xj, $imm3">; 75 76class LASX2RI3_RXI<bits<32> op, Operand ImmOpnd = uimm3> 77 : Fmt2RI3_RXI<op, (outs GPR:$rd), (ins LASX256:$xj, ImmOpnd:$imm3), 78 "$rd, $xj, $imm3">; 79 80class LASX2RI4_XXI<bits<32> op, Operand ImmOpnd = uimm4> 81 : Fmt2RI4_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm4), 82 "$xd, $xj, $imm4">; 83 84class LASX2RI4_XRI<bits<32> op, Operand ImmOpnd = uimm4> 85 : Fmt2RI4_XRI<op, (outs LASX256:$xd), (ins GPR:$rj, ImmOpnd:$imm4), 86 "$xd, $rj, $imm4">; 87 88class LASX2RI4_RXI<bits<32> op, Operand ImmOpnd = uimm4> 89 : Fmt2RI4_RXI<op, (outs GPR:$rd), (ins LASX256:$xj, ImmOpnd:$imm4), 90 "$rd, $xj, $imm4">; 91 92class LASX2RI5_XXI<bits<32> op, Operand ImmOpnd = uimm5> 93 : Fmt2RI5_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm5), 94 "$xd, $xj, $imm5">; 95 96class LASX2RI6_XXI<bits<32> op, Operand ImmOpnd = uimm6> 97 : Fmt2RI6_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm6), 98 "$xd, $xj, $imm6">; 99 100class LASX2RI8_XXI<bits<32> op, Operand ImmOpnd = uimm8> 101 : Fmt2RI8_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm8), 102 "$xd, $xj, $imm8">; 103 104class LASX2RI8I2_XRII<bits<32> op, Operand ImmOpnd = simm8, 105 Operand IdxOpnd = uimm2> 106 : Fmt2RI8I2_XRII<op, (outs), 107 (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm2), 108 "$xd, $rj, $imm8, $imm2">; 109class LASX2RI8I3_XRII<bits<32> op, Operand ImmOpnd = simm8, 110 Operand IdxOpnd = uimm3> 111 : Fmt2RI8I3_XRII<op, (outs), 112 (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm3), 113 "$xd, $rj, $imm8, $imm3">; 114class LASX2RI8I4_XRII<bits<32> op, Operand ImmOpnd = simm8, 115 Operand IdxOpnd = uimm4> 116 : Fmt2RI8I4_XRII<op, (outs), 117 (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm4), 118 "$xd, $rj, $imm8, $imm4">; 119class LASX2RI8I5_XRII<bits<32> op, Operand ImmOpnd = simm8, 120 Operand IdxOpnd = uimm5> 121 : Fmt2RI8I5_XRII<op, (outs), 122 (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm5), 123 "$xd, $rj, $imm8, $imm5">; 124 125class LASX3R_XXX<bits<32> op> 126 : Fmt3R_XXX<op, (outs LASX256:$xd), (ins LASX256:$xj, LASX256:$xk), 127 "$xd, $xj, $xk">; 128 129class LASX3R_XXR<bits<32> op> 130 : Fmt3R_XXR<op, (outs LASX256:$xd), (ins LASX256:$xj, GPR:$rk), 131 "$xd, $xj, $rk">; 132 133class LASX4R_XXXX<bits<32> op> 134 : Fmt4R_XXXX<op, (outs LASX256:$xd), 135 (ins LASX256:$xj, LASX256:$xk, LASX256:$xa), 136 "$xd, $xj, $xk, $xa">; 137 138let Constraints = "$xd = $dst" in { 139 140class LASX2RI2_XXXI<bits<32> op, Operand ImmOpnd = uimm2> 141 : Fmt2RI2_XXI<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, ImmOpnd:$imm2), 142 "$xd, $xj, $imm2">; 143class LASX2RI3_XXXI<bits<32> op, Operand ImmOpnd = uimm3> 144 : Fmt2RI3_XXI<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, ImmOpnd:$imm3), 145 "$xd, $xj, $imm3">; 146 147class LASX2RI2_XXRI<bits<32> op, Operand ImmOpnd = uimm2> 148 : Fmt2RI2_XRI<op, (outs LASX256:$dst), (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm2), 149 "$xd, $rj, $imm2">; 150class LASX2RI3_XXRI<bits<32> op, Operand ImmOpnd = uimm3> 151 : Fmt2RI3_XRI<op, (outs LASX256:$dst), (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm3), 152 "$xd, $rj, $imm3">; 153 154class LASX2RI4_XXXI<bits<32> op, Operand ImmOpnd = uimm4> 155 : Fmt2RI4_XXI<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, ImmOpnd:$imm4), 156 "$xd, $xj, $imm4">; 157class LASX2RI5_XXXI<bits<32> op, Operand ImmOpnd = uimm5> 158 : Fmt2RI5_XXI<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, ImmOpnd:$imm5), 159 "$xd, $xj, $imm5">; 160class LASX2RI6_XXXI<bits<32> op, Operand ImmOpnd = uimm6> 161 : Fmt2RI6_XXI<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, ImmOpnd:$imm6), 162 "$xd, $xj, $imm6">; 163class LASX2RI7_XXXI<bits<32> op, Operand ImmOpnd = uimm7> 164 : Fmt2RI7_XXI<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, ImmOpnd:$imm7), 165 "$xd, $xj, $imm7">; 166 167class LASX2RI8_XXXI<bits<32> op, Operand ImmOpnd = uimm8> 168 : Fmt2RI8_XXI<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, ImmOpnd:$imm8), 169 "$xd, $xj, $imm8">; 170 171class LASX3R_XXXX<bits<32> op> 172 : Fmt3R_XXX<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, LASX256:$xk), 173 "$xd, $xj, $xk">; 174 175} // Constraints = "$xd = $dst" 176 177class LASX2RI9_Load<bits<32> op, Operand ImmOpnd = simm9_lsl3> 178 : Fmt2RI9_XRI<op, (outs LASX256:$xd), (ins GPR:$rj, ImmOpnd:$imm9), 179 "$xd, $rj, $imm9">; 180class LASX2RI10_Load<bits<32> op, Operand ImmOpnd = simm10_lsl2> 181 : Fmt2RI10_XRI<op, (outs LASX256:$xd), (ins GPR:$rj, ImmOpnd:$imm10), 182 "$xd, $rj, $imm10">; 183class LASX2RI11_Load<bits<32> op, Operand ImmOpnd = simm11_lsl1> 184 : Fmt2RI11_XRI<op, (outs LASX256:$xd), (ins GPR:$rj, ImmOpnd:$imm11), 185 "$xd, $rj, $imm11">; 186class LASX2RI12_Load<bits<32> op, Operand ImmOpnd = simm12> 187 : Fmt2RI12_XRI<op, (outs LASX256:$xd), (ins GPR:$rj, ImmOpnd:$imm12), 188 "$xd, $rj, $imm12">; 189class LASX2RI12_Store<bits<32> op, Operand ImmOpnd = simm12> 190 : Fmt2RI12_XRI<op, (outs), (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm12), 191 "$xd, $rj, $imm12">; 192 193class LASX3R_Load<bits<32> op> 194 : Fmt3R_XRR<op, (outs LASX256:$xd), (ins GPR:$rj, GPR:$rk), 195 "$xd, $rj, $rk">; 196class LASX3R_Store<bits<32> op> 197 : Fmt3R_XRR<op, (outs), (ins LASX256:$xd, GPR:$rj, GPR:$rk), 198 "$xd, $rj, $rk">; 199 200//===----------------------------------------------------------------------===// 201// Instructions 202//===----------------------------------------------------------------------===// 203 204let hasSideEffects = 0, Predicates = [HasExtLASX] in { 205 206let mayLoad = 0, mayStore = 0 in { 207def XVADD_B : LASX3R_XXX<0x740a0000>; 208def XVADD_H : LASX3R_XXX<0x740a8000>; 209def XVADD_W : LASX3R_XXX<0x740b0000>; 210def XVADD_D : LASX3R_XXX<0x740b8000>; 211def XVADD_Q : LASX3R_XXX<0x752d0000>; 212 213def XVSUB_B : LASX3R_XXX<0x740c0000>; 214def XVSUB_H : LASX3R_XXX<0x740c8000>; 215def XVSUB_W : LASX3R_XXX<0x740d0000>; 216def XVSUB_D : LASX3R_XXX<0x740d8000>; 217def XVSUB_Q : LASX3R_XXX<0x752d8000>; 218 219def XVADDI_BU : LASX2RI5_XXI<0x768a0000>; 220def XVADDI_HU : LASX2RI5_XXI<0x768a8000>; 221def XVADDI_WU : LASX2RI5_XXI<0x768b0000>; 222def XVADDI_DU : LASX2RI5_XXI<0x768b8000>; 223 224def XVSUBI_BU : LASX2RI5_XXI<0x768c0000>; 225def XVSUBI_HU : LASX2RI5_XXI<0x768c8000>; 226def XVSUBI_WU : LASX2RI5_XXI<0x768d0000>; 227def XVSUBI_DU : LASX2RI5_XXI<0x768d8000>; 228 229def XVNEG_B : LASX2R_XX<0x769c3000>; 230def XVNEG_H : LASX2R_XX<0x769c3400>; 231def XVNEG_W : LASX2R_XX<0x769c3800>; 232def XVNEG_D : LASX2R_XX<0x769c3c00>; 233 234def XVSADD_B : LASX3R_XXX<0x74460000>; 235def XVSADD_H : LASX3R_XXX<0x74468000>; 236def XVSADD_W : LASX3R_XXX<0x74470000>; 237def XVSADD_D : LASX3R_XXX<0x74478000>; 238def XVSADD_BU : LASX3R_XXX<0x744a0000>; 239def XVSADD_HU : LASX3R_XXX<0x744a8000>; 240def XVSADD_WU : LASX3R_XXX<0x744b0000>; 241def XVSADD_DU : LASX3R_XXX<0x744b8000>; 242 243def XVSSUB_B : LASX3R_XXX<0x74480000>; 244def XVSSUB_H : LASX3R_XXX<0x74488000>; 245def XVSSUB_W : LASX3R_XXX<0x74490000>; 246def XVSSUB_D : LASX3R_XXX<0x74498000>; 247def XVSSUB_BU : LASX3R_XXX<0x744c0000>; 248def XVSSUB_HU : LASX3R_XXX<0x744c8000>; 249def XVSSUB_WU : LASX3R_XXX<0x744d0000>; 250def XVSSUB_DU : LASX3R_XXX<0x744d8000>; 251 252def XVHADDW_H_B : LASX3R_XXX<0x74540000>; 253def XVHADDW_W_H : LASX3R_XXX<0x74548000>; 254def XVHADDW_D_W : LASX3R_XXX<0x74550000>; 255def XVHADDW_Q_D : LASX3R_XXX<0x74558000>; 256def XVHADDW_HU_BU : LASX3R_XXX<0x74580000>; 257def XVHADDW_WU_HU : LASX3R_XXX<0x74588000>; 258def XVHADDW_DU_WU : LASX3R_XXX<0x74590000>; 259def XVHADDW_QU_DU : LASX3R_XXX<0x74598000>; 260 261def XVHSUBW_H_B : LASX3R_XXX<0x74560000>; 262def XVHSUBW_W_H : LASX3R_XXX<0x74568000>; 263def XVHSUBW_D_W : LASX3R_XXX<0x74570000>; 264def XVHSUBW_Q_D : LASX3R_XXX<0x74578000>; 265def XVHSUBW_HU_BU : LASX3R_XXX<0x745a0000>; 266def XVHSUBW_WU_HU : LASX3R_XXX<0x745a8000>; 267def XVHSUBW_DU_WU : LASX3R_XXX<0x745b0000>; 268def XVHSUBW_QU_DU : LASX3R_XXX<0x745b8000>; 269 270def XVADDWEV_H_B : LASX3R_XXX<0x741e0000>; 271def XVADDWEV_W_H : LASX3R_XXX<0x741e8000>; 272def XVADDWEV_D_W : LASX3R_XXX<0x741f0000>; 273def XVADDWEV_Q_D : LASX3R_XXX<0x741f8000>; 274def XVADDWOD_H_B : LASX3R_XXX<0x74220000>; 275def XVADDWOD_W_H : LASX3R_XXX<0x74228000>; 276def XVADDWOD_D_W : LASX3R_XXX<0x74230000>; 277def XVADDWOD_Q_D : LASX3R_XXX<0x74238000>; 278 279def XVSUBWEV_H_B : LASX3R_XXX<0x74200000>; 280def XVSUBWEV_W_H : LASX3R_XXX<0x74208000>; 281def XVSUBWEV_D_W : LASX3R_XXX<0x74210000>; 282def XVSUBWEV_Q_D : LASX3R_XXX<0x74218000>; 283def XVSUBWOD_H_B : LASX3R_XXX<0x74240000>; 284def XVSUBWOD_W_H : LASX3R_XXX<0x74248000>; 285def XVSUBWOD_D_W : LASX3R_XXX<0x74250000>; 286def XVSUBWOD_Q_D : LASX3R_XXX<0x74258000>; 287 288def XVADDWEV_H_BU : LASX3R_XXX<0x742e0000>; 289def XVADDWEV_W_HU : LASX3R_XXX<0x742e8000>; 290def XVADDWEV_D_WU : LASX3R_XXX<0x742f0000>; 291def XVADDWEV_Q_DU : LASX3R_XXX<0x742f8000>; 292def XVADDWOD_H_BU : LASX3R_XXX<0x74320000>; 293def XVADDWOD_W_HU : LASX3R_XXX<0x74328000>; 294def XVADDWOD_D_WU : LASX3R_XXX<0x74330000>; 295def XVADDWOD_Q_DU : LASX3R_XXX<0x74338000>; 296 297def XVSUBWEV_H_BU : LASX3R_XXX<0x74300000>; 298def XVSUBWEV_W_HU : LASX3R_XXX<0x74308000>; 299def XVSUBWEV_D_WU : LASX3R_XXX<0x74310000>; 300def XVSUBWEV_Q_DU : LASX3R_XXX<0x74318000>; 301def XVSUBWOD_H_BU : LASX3R_XXX<0x74340000>; 302def XVSUBWOD_W_HU : LASX3R_XXX<0x74348000>; 303def XVSUBWOD_D_WU : LASX3R_XXX<0x74350000>; 304def XVSUBWOD_Q_DU : LASX3R_XXX<0x74358000>; 305 306def XVADDWEV_H_BU_B : LASX3R_XXX<0x743e0000>; 307def XVADDWEV_W_HU_H : LASX3R_XXX<0x743e8000>; 308def XVADDWEV_D_WU_W : LASX3R_XXX<0x743f0000>; 309def XVADDWEV_Q_DU_D : LASX3R_XXX<0x743f8000>; 310def XVADDWOD_H_BU_B : LASX3R_XXX<0x74400000>; 311def XVADDWOD_W_HU_H : LASX3R_XXX<0x74408000>; 312def XVADDWOD_D_WU_W : LASX3R_XXX<0x74410000>; 313def XVADDWOD_Q_DU_D : LASX3R_XXX<0x74418000>; 314 315def XVAVG_B : LASX3R_XXX<0x74640000>; 316def XVAVG_H : LASX3R_XXX<0x74648000>; 317def XVAVG_W : LASX3R_XXX<0x74650000>; 318def XVAVG_D : LASX3R_XXX<0x74658000>; 319def XVAVG_BU : LASX3R_XXX<0x74660000>; 320def XVAVG_HU : LASX3R_XXX<0x74668000>; 321def XVAVG_WU : LASX3R_XXX<0x74670000>; 322def XVAVG_DU : LASX3R_XXX<0x74678000>; 323def XVAVGR_B : LASX3R_XXX<0x74680000>; 324def XVAVGR_H : LASX3R_XXX<0x74688000>; 325def XVAVGR_W : LASX3R_XXX<0x74690000>; 326def XVAVGR_D : LASX3R_XXX<0x74698000>; 327def XVAVGR_BU : LASX3R_XXX<0x746a0000>; 328def XVAVGR_HU : LASX3R_XXX<0x746a8000>; 329def XVAVGR_WU : LASX3R_XXX<0x746b0000>; 330def XVAVGR_DU : LASX3R_XXX<0x746b8000>; 331 332def XVABSD_B : LASX3R_XXX<0x74600000>; 333def XVABSD_H : LASX3R_XXX<0x74608000>; 334def XVABSD_W : LASX3R_XXX<0x74610000>; 335def XVABSD_D : LASX3R_XXX<0x74618000>; 336def XVABSD_BU : LASX3R_XXX<0x74620000>; 337def XVABSD_HU : LASX3R_XXX<0x74628000>; 338def XVABSD_WU : LASX3R_XXX<0x74630000>; 339def XVABSD_DU : LASX3R_XXX<0x74638000>; 340 341def XVADDA_B : LASX3R_XXX<0x745c0000>; 342def XVADDA_H : LASX3R_XXX<0x745c8000>; 343def XVADDA_W : LASX3R_XXX<0x745d0000>; 344def XVADDA_D : LASX3R_XXX<0x745d8000>; 345 346def XVMAX_B : LASX3R_XXX<0x74700000>; 347def XVMAX_H : LASX3R_XXX<0x74708000>; 348def XVMAX_W : LASX3R_XXX<0x74710000>; 349def XVMAX_D : LASX3R_XXX<0x74718000>; 350def XVMAXI_B : LASX2RI5_XXI<0x76900000, simm5>; 351def XVMAXI_H : LASX2RI5_XXI<0x76908000, simm5>; 352def XVMAXI_W : LASX2RI5_XXI<0x76910000, simm5>; 353def XVMAXI_D : LASX2RI5_XXI<0x76918000, simm5>; 354def XVMAX_BU : LASX3R_XXX<0x74740000>; 355def XVMAX_HU : LASX3R_XXX<0x74748000>; 356def XVMAX_WU : LASX3R_XXX<0x74750000>; 357def XVMAX_DU : LASX3R_XXX<0x74758000>; 358def XVMAXI_BU : LASX2RI5_XXI<0x76940000>; 359def XVMAXI_HU : LASX2RI5_XXI<0x76948000>; 360def XVMAXI_WU : LASX2RI5_XXI<0x76950000>; 361def XVMAXI_DU : LASX2RI5_XXI<0x76958000>; 362 363def XVMIN_B : LASX3R_XXX<0x74720000>; 364def XVMIN_H : LASX3R_XXX<0x74728000>; 365def XVMIN_W : LASX3R_XXX<0x74730000>; 366def XVMIN_D : LASX3R_XXX<0x74738000>; 367def XVMINI_B : LASX2RI5_XXI<0x76920000, simm5>; 368def XVMINI_H : LASX2RI5_XXI<0x76928000, simm5>; 369def XVMINI_W : LASX2RI5_XXI<0x76930000, simm5>; 370def XVMINI_D : LASX2RI5_XXI<0x76938000, simm5>; 371def XVMIN_BU : LASX3R_XXX<0x74760000>; 372def XVMIN_HU : LASX3R_XXX<0x74768000>; 373def XVMIN_WU : LASX3R_XXX<0x74770000>; 374def XVMIN_DU : LASX3R_XXX<0x74778000>; 375def XVMINI_BU : LASX2RI5_XXI<0x76960000>; 376def XVMINI_HU : LASX2RI5_XXI<0x76968000>; 377def XVMINI_WU : LASX2RI5_XXI<0x76970000>; 378def XVMINI_DU : LASX2RI5_XXI<0x76978000>; 379 380def XVMUL_B : LASX3R_XXX<0x74840000>; 381def XVMUL_H : LASX3R_XXX<0x74848000>; 382def XVMUL_W : LASX3R_XXX<0x74850000>; 383def XVMUL_D : LASX3R_XXX<0x74858000>; 384 385def XVMUH_B : LASX3R_XXX<0x74860000>; 386def XVMUH_H : LASX3R_XXX<0x74868000>; 387def XVMUH_W : LASX3R_XXX<0x74870000>; 388def XVMUH_D : LASX3R_XXX<0x74878000>; 389def XVMUH_BU : LASX3R_XXX<0x74880000>; 390def XVMUH_HU : LASX3R_XXX<0x74888000>; 391def XVMUH_WU : LASX3R_XXX<0x74890000>; 392def XVMUH_DU : LASX3R_XXX<0x74898000>; 393 394def XVMULWEV_H_B : LASX3R_XXX<0x74900000>; 395def XVMULWEV_W_H : LASX3R_XXX<0x74908000>; 396def XVMULWEV_D_W : LASX3R_XXX<0x74910000>; 397def XVMULWEV_Q_D : LASX3R_XXX<0x74918000>; 398def XVMULWOD_H_B : LASX3R_XXX<0x74920000>; 399def XVMULWOD_W_H : LASX3R_XXX<0x74928000>; 400def XVMULWOD_D_W : LASX3R_XXX<0x74930000>; 401def XVMULWOD_Q_D : LASX3R_XXX<0x74938000>; 402def XVMULWEV_H_BU : LASX3R_XXX<0x74980000>; 403def XVMULWEV_W_HU : LASX3R_XXX<0x74988000>; 404def XVMULWEV_D_WU : LASX3R_XXX<0x74990000>; 405def XVMULWEV_Q_DU : LASX3R_XXX<0x74998000>; 406def XVMULWOD_H_BU : LASX3R_XXX<0x749a0000>; 407def XVMULWOD_W_HU : LASX3R_XXX<0x749a8000>; 408def XVMULWOD_D_WU : LASX3R_XXX<0x749b0000>; 409def XVMULWOD_Q_DU : LASX3R_XXX<0x749b8000>; 410def XVMULWEV_H_BU_B : LASX3R_XXX<0x74a00000>; 411def XVMULWEV_W_HU_H : LASX3R_XXX<0x74a08000>; 412def XVMULWEV_D_WU_W : LASX3R_XXX<0x74a10000>; 413def XVMULWEV_Q_DU_D : LASX3R_XXX<0x74a18000>; 414def XVMULWOD_H_BU_B : LASX3R_XXX<0x74a20000>; 415def XVMULWOD_W_HU_H : LASX3R_XXX<0x74a28000>; 416def XVMULWOD_D_WU_W : LASX3R_XXX<0x74a30000>; 417def XVMULWOD_Q_DU_D : LASX3R_XXX<0x74a38000>; 418 419def XVMADD_B : LASX3R_XXXX<0x74a80000>; 420def XVMADD_H : LASX3R_XXXX<0x74a88000>; 421def XVMADD_W : LASX3R_XXXX<0x74a90000>; 422def XVMADD_D : LASX3R_XXXX<0x74a98000>; 423 424def XVMSUB_B : LASX3R_XXXX<0x74aa0000>; 425def XVMSUB_H : LASX3R_XXXX<0x74aa8000>; 426def XVMSUB_W : LASX3R_XXXX<0x74ab0000>; 427def XVMSUB_D : LASX3R_XXXX<0x74ab8000>; 428 429def XVMADDWEV_H_B : LASX3R_XXXX<0x74ac0000>; 430def XVMADDWEV_W_H : LASX3R_XXXX<0x74ac8000>; 431def XVMADDWEV_D_W : LASX3R_XXXX<0x74ad0000>; 432def XVMADDWEV_Q_D : LASX3R_XXXX<0x74ad8000>; 433def XVMADDWOD_H_B : LASX3R_XXXX<0x74ae0000>; 434def XVMADDWOD_W_H : LASX3R_XXXX<0x74ae8000>; 435def XVMADDWOD_D_W : LASX3R_XXXX<0x74af0000>; 436def XVMADDWOD_Q_D : LASX3R_XXXX<0x74af8000>; 437def XVMADDWEV_H_BU : LASX3R_XXXX<0x74b40000>; 438def XVMADDWEV_W_HU : LASX3R_XXXX<0x74b48000>; 439def XVMADDWEV_D_WU : LASX3R_XXXX<0x74b50000>; 440def XVMADDWEV_Q_DU : LASX3R_XXXX<0x74b58000>; 441def XVMADDWOD_H_BU : LASX3R_XXXX<0x74b60000>; 442def XVMADDWOD_W_HU : LASX3R_XXXX<0x74b68000>; 443def XVMADDWOD_D_WU : LASX3R_XXXX<0x74b70000>; 444def XVMADDWOD_Q_DU : LASX3R_XXXX<0x74b78000>; 445def XVMADDWEV_H_BU_B : LASX3R_XXXX<0x74bc0000>; 446def XVMADDWEV_W_HU_H : LASX3R_XXXX<0x74bc8000>; 447def XVMADDWEV_D_WU_W : LASX3R_XXXX<0x74bd0000>; 448def XVMADDWEV_Q_DU_D : LASX3R_XXXX<0x74bd8000>; 449def XVMADDWOD_H_BU_B : LASX3R_XXXX<0x74be0000>; 450def XVMADDWOD_W_HU_H : LASX3R_XXXX<0x74be8000>; 451def XVMADDWOD_D_WU_W : LASX3R_XXXX<0x74bf0000>; 452def XVMADDWOD_Q_DU_D : LASX3R_XXXX<0x74bf8000>; 453 454def XVDIV_B : LASX3R_XXX<0x74e00000>; 455def XVDIV_H : LASX3R_XXX<0x74e08000>; 456def XVDIV_W : LASX3R_XXX<0x74e10000>; 457def XVDIV_D : LASX3R_XXX<0x74e18000>; 458def XVDIV_BU : LASX3R_XXX<0x74e40000>; 459def XVDIV_HU : LASX3R_XXX<0x74e48000>; 460def XVDIV_WU : LASX3R_XXX<0x74e50000>; 461def XVDIV_DU : LASX3R_XXX<0x74e58000>; 462 463def XVMOD_B : LASX3R_XXX<0x74e20000>; 464def XVMOD_H : LASX3R_XXX<0x74e28000>; 465def XVMOD_W : LASX3R_XXX<0x74e30000>; 466def XVMOD_D : LASX3R_XXX<0x74e38000>; 467def XVMOD_BU : LASX3R_XXX<0x74e60000>; 468def XVMOD_HU : LASX3R_XXX<0x74e68000>; 469def XVMOD_WU : LASX3R_XXX<0x74e70000>; 470def XVMOD_DU : LASX3R_XXX<0x74e78000>; 471 472def XVSAT_B : LASX2RI3_XXI<0x77242000>; 473def XVSAT_H : LASX2RI4_XXI<0x77244000>; 474def XVSAT_W : LASX2RI5_XXI<0x77248000>; 475def XVSAT_D : LASX2RI6_XXI<0x77250000>; 476def XVSAT_BU : LASX2RI3_XXI<0x77282000>; 477def XVSAT_HU : LASX2RI4_XXI<0x77284000>; 478def XVSAT_WU : LASX2RI5_XXI<0x77288000>; 479def XVSAT_DU : LASX2RI6_XXI<0x77290000>; 480 481def XVEXTH_H_B : LASX2R_XX<0x769ee000>; 482def XVEXTH_W_H : LASX2R_XX<0x769ee400>; 483def XVEXTH_D_W : LASX2R_XX<0x769ee800>; 484def XVEXTH_Q_D : LASX2R_XX<0x769eec00>; 485def XVEXTH_HU_BU : LASX2R_XX<0x769ef000>; 486def XVEXTH_WU_HU : LASX2R_XX<0x769ef400>; 487def XVEXTH_DU_WU : LASX2R_XX<0x769ef800>; 488def XVEXTH_QU_DU : LASX2R_XX<0x769efc00>; 489 490def VEXT2XV_H_B : LASX2R_XX<0x769f1000>; 491def VEXT2XV_W_B : LASX2R_XX<0x769f1400>; 492def VEXT2XV_D_B : LASX2R_XX<0x769f1800>; 493def VEXT2XV_W_H : LASX2R_XX<0x769f1c00>; 494def VEXT2XV_D_H : LASX2R_XX<0x769f2000>; 495def VEXT2XV_D_W : LASX2R_XX<0x769f2400>; 496def VEXT2XV_HU_BU : LASX2R_XX<0x769f2800>; 497def VEXT2XV_WU_BU : LASX2R_XX<0x769f2c00>; 498def VEXT2XV_DU_BU : LASX2R_XX<0x769f3000>; 499def VEXT2XV_WU_HU : LASX2R_XX<0x769f3400>; 500def VEXT2XV_DU_HU : LASX2R_XX<0x769f3800>; 501def VEXT2XV_DU_WU : LASX2R_XX<0x769f3c00>; 502 503def XVHSELI_D : LASX2RI5_XXI<0x769f8000>; 504 505def XVSIGNCOV_B : LASX3R_XXX<0x752e0000>; 506def XVSIGNCOV_H : LASX3R_XXX<0x752e8000>; 507def XVSIGNCOV_W : LASX3R_XXX<0x752f0000>; 508def XVSIGNCOV_D : LASX3R_XXX<0x752f8000>; 509 510def XVMSKLTZ_B : LASX2R_XX<0x769c4000>; 511def XVMSKLTZ_H : LASX2R_XX<0x769c4400>; 512def XVMSKLTZ_W : LASX2R_XX<0x769c4800>; 513def XVMSKLTZ_D : LASX2R_XX<0x769c4c00>; 514 515def XVMSKGEZ_B : LASX2R_XX<0x769c5000>; 516 517def XVMSKNZ_B : LASX2R_XX<0x769c6000>; 518 519def XVLDI : LASX1RI13_XI<0x77e00000>; 520 521def XVAND_V : LASX3R_XXX<0x75260000>; 522def XVOR_V : LASX3R_XXX<0x75268000>; 523def XVXOR_V : LASX3R_XXX<0x75270000>; 524def XVNOR_V : LASX3R_XXX<0x75278000>; 525def XVANDN_V : LASX3R_XXX<0x75280000>; 526def XVORN_V : LASX3R_XXX<0x75288000>; 527 528def XVANDI_B : LASX2RI8_XXI<0x77d00000>; 529def XVORI_B : LASX2RI8_XXI<0x77d40000>; 530def XVXORI_B : LASX2RI8_XXI<0x77d80000>; 531def XVNORI_B : LASX2RI8_XXI<0x77dc0000>; 532 533def XVSLL_B : LASX3R_XXX<0x74e80000>; 534def XVSLL_H : LASX3R_XXX<0x74e88000>; 535def XVSLL_W : LASX3R_XXX<0x74e90000>; 536def XVSLL_D : LASX3R_XXX<0x74e98000>; 537def XVSLLI_B : LASX2RI3_XXI<0x772c2000>; 538def XVSLLI_H : LASX2RI4_XXI<0x772c4000>; 539def XVSLLI_W : LASX2RI5_XXI<0x772c8000>; 540def XVSLLI_D : LASX2RI6_XXI<0x772d0000>; 541 542def XVSRL_B : LASX3R_XXX<0x74ea0000>; 543def XVSRL_H : LASX3R_XXX<0x74ea8000>; 544def XVSRL_W : LASX3R_XXX<0x74eb0000>; 545def XVSRL_D : LASX3R_XXX<0x74eb8000>; 546def XVSRLI_B : LASX2RI3_XXI<0x77302000>; 547def XVSRLI_H : LASX2RI4_XXI<0x77304000>; 548def XVSRLI_W : LASX2RI5_XXI<0x77308000>; 549def XVSRLI_D : LASX2RI6_XXI<0x77310000>; 550 551def XVSRA_B : LASX3R_XXX<0x74ec0000>; 552def XVSRA_H : LASX3R_XXX<0x74ec8000>; 553def XVSRA_W : LASX3R_XXX<0x74ed0000>; 554def XVSRA_D : LASX3R_XXX<0x74ed8000>; 555def XVSRAI_B : LASX2RI3_XXI<0x77342000>; 556def XVSRAI_H : LASX2RI4_XXI<0x77344000>; 557def XVSRAI_W : LASX2RI5_XXI<0x77348000>; 558def XVSRAI_D : LASX2RI6_XXI<0x77350000>; 559 560def XVROTR_B : LASX3R_XXX<0x74ee0000>; 561def XVROTR_H : LASX3R_XXX<0x74ee8000>; 562def XVROTR_W : LASX3R_XXX<0x74ef0000>; 563def XVROTR_D : LASX3R_XXX<0x74ef8000>; 564def XVROTRI_B : LASX2RI3_XXI<0x76a02000>; 565def XVROTRI_H : LASX2RI4_XXI<0x76a04000>; 566def XVROTRI_W : LASX2RI5_XXI<0x76a08000>; 567def XVROTRI_D : LASX2RI6_XXI<0x76a10000>; 568 569def XVSLLWIL_H_B : LASX2RI3_XXI<0x77082000>; 570def XVSLLWIL_W_H : LASX2RI4_XXI<0x77084000>; 571def XVSLLWIL_D_W : LASX2RI5_XXI<0x77088000>; 572def XVEXTL_Q_D : LASX2R_XX<0x77090000>; 573def XVSLLWIL_HU_BU : LASX2RI3_XXI<0x770c2000>; 574def XVSLLWIL_WU_HU : LASX2RI4_XXI<0x770c4000>; 575def XVSLLWIL_DU_WU : LASX2RI5_XXI<0x770c8000>; 576def XVEXTL_QU_DU : LASX2R_XX<0x770d0000>; 577 578def XVSRLR_B : LASX3R_XXX<0x74f00000>; 579def XVSRLR_H : LASX3R_XXX<0x74f08000>; 580def XVSRLR_W : LASX3R_XXX<0x74f10000>; 581def XVSRLR_D : LASX3R_XXX<0x74f18000>; 582def XVSRLRI_B : LASX2RI3_XXI<0x76a42000>; 583def XVSRLRI_H : LASX2RI4_XXI<0x76a44000>; 584def XVSRLRI_W : LASX2RI5_XXI<0x76a48000>; 585def XVSRLRI_D : LASX2RI6_XXI<0x76a50000>; 586 587def XVSRAR_B : LASX3R_XXX<0x74f20000>; 588def XVSRAR_H : LASX3R_XXX<0x74f28000>; 589def XVSRAR_W : LASX3R_XXX<0x74f30000>; 590def XVSRAR_D : LASX3R_XXX<0x74f38000>; 591def XVSRARI_B : LASX2RI3_XXI<0x76a82000>; 592def XVSRARI_H : LASX2RI4_XXI<0x76a84000>; 593def XVSRARI_W : LASX2RI5_XXI<0x76a88000>; 594def XVSRARI_D : LASX2RI6_XXI<0x76a90000>; 595 596def XVSRLN_B_H : LASX3R_XXX<0x74f48000>; 597def XVSRLN_H_W : LASX3R_XXX<0x74f50000>; 598def XVSRLN_W_D : LASX3R_XXX<0x74f58000>; 599def XVSRAN_B_H : LASX3R_XXX<0x74f68000>; 600def XVSRAN_H_W : LASX3R_XXX<0x74f70000>; 601def XVSRAN_W_D : LASX3R_XXX<0x74f78000>; 602 603def XVSRLNI_B_H : LASX2RI4_XXXI<0x77404000>; 604def XVSRLNI_H_W : LASX2RI5_XXXI<0x77408000>; 605def XVSRLNI_W_D : LASX2RI6_XXXI<0x77410000>; 606def XVSRLNI_D_Q : LASX2RI7_XXXI<0x77420000>; 607def XVSRANI_B_H : LASX2RI4_XXXI<0x77584000>; 608def XVSRANI_H_W : LASX2RI5_XXXI<0x77588000>; 609def XVSRANI_W_D : LASX2RI6_XXXI<0x77590000>; 610def XVSRANI_D_Q : LASX2RI7_XXXI<0x775a0000>; 611 612def XVSRLRN_B_H : LASX3R_XXX<0x74f88000>; 613def XVSRLRN_H_W : LASX3R_XXX<0x74f90000>; 614def XVSRLRN_W_D : LASX3R_XXX<0x74f98000>; 615def XVSRARN_B_H : LASX3R_XXX<0x74fa8000>; 616def XVSRARN_H_W : LASX3R_XXX<0x74fb0000>; 617def XVSRARN_W_D : LASX3R_XXX<0x74fb8000>; 618 619def XVSRLRNI_B_H : LASX2RI4_XXXI<0x77444000>; 620def XVSRLRNI_H_W : LASX2RI5_XXXI<0x77448000>; 621def XVSRLRNI_W_D : LASX2RI6_XXXI<0x77450000>; 622def XVSRLRNI_D_Q : LASX2RI7_XXXI<0x77460000>; 623def XVSRARNI_B_H : LASX2RI4_XXXI<0x775c4000>; 624def XVSRARNI_H_W : LASX2RI5_XXXI<0x775c8000>; 625def XVSRARNI_W_D : LASX2RI6_XXXI<0x775d0000>; 626def XVSRARNI_D_Q : LASX2RI7_XXXI<0x775e0000>; 627 628def XVSSRLN_B_H : LASX3R_XXX<0x74fc8000>; 629def XVSSRLN_H_W : LASX3R_XXX<0x74fd0000>; 630def XVSSRLN_W_D : LASX3R_XXX<0x74fd8000>; 631def XVSSRAN_B_H : LASX3R_XXX<0x74fe8000>; 632def XVSSRAN_H_W : LASX3R_XXX<0x74ff0000>; 633def XVSSRAN_W_D : LASX3R_XXX<0x74ff8000>; 634def XVSSRLN_BU_H : LASX3R_XXX<0x75048000>; 635def XVSSRLN_HU_W : LASX3R_XXX<0x75050000>; 636def XVSSRLN_WU_D : LASX3R_XXX<0x75058000>; 637def XVSSRAN_BU_H : LASX3R_XXX<0x75068000>; 638def XVSSRAN_HU_W : LASX3R_XXX<0x75070000>; 639def XVSSRAN_WU_D : LASX3R_XXX<0x75078000>; 640 641def XVSSRLNI_B_H : LASX2RI4_XXXI<0x77484000>; 642def XVSSRLNI_H_W : LASX2RI5_XXXI<0x77488000>; 643def XVSSRLNI_W_D : LASX2RI6_XXXI<0x77490000>; 644def XVSSRLNI_D_Q : LASX2RI7_XXXI<0x774a0000>; 645def XVSSRANI_B_H : LASX2RI4_XXXI<0x77604000>; 646def XVSSRANI_H_W : LASX2RI5_XXXI<0x77608000>; 647def XVSSRANI_W_D : LASX2RI6_XXXI<0x77610000>; 648def XVSSRANI_D_Q : LASX2RI7_XXXI<0x77620000>; 649def XVSSRLNI_BU_H : LASX2RI4_XXXI<0x774c4000>; 650def XVSSRLNI_HU_W : LASX2RI5_XXXI<0x774c8000>; 651def XVSSRLNI_WU_D : LASX2RI6_XXXI<0x774d0000>; 652def XVSSRLNI_DU_Q : LASX2RI7_XXXI<0x774e0000>; 653def XVSSRANI_BU_H : LASX2RI4_XXXI<0x77644000>; 654def XVSSRANI_HU_W : LASX2RI5_XXXI<0x77648000>; 655def XVSSRANI_WU_D : LASX2RI6_XXXI<0x77650000>; 656def XVSSRANI_DU_Q : LASX2RI7_XXXI<0x77660000>; 657 658def XVSSRLRN_B_H : LASX3R_XXX<0x75008000>; 659def XVSSRLRN_H_W : LASX3R_XXX<0x75010000>; 660def XVSSRLRN_W_D : LASX3R_XXX<0x75018000>; 661def XVSSRARN_B_H : LASX3R_XXX<0x75028000>; 662def XVSSRARN_H_W : LASX3R_XXX<0x75030000>; 663def XVSSRARN_W_D : LASX3R_XXX<0x75038000>; 664def XVSSRLRN_BU_H : LASX3R_XXX<0x75088000>; 665def XVSSRLRN_HU_W : LASX3R_XXX<0x75090000>; 666def XVSSRLRN_WU_D : LASX3R_XXX<0x75098000>; 667def XVSSRARN_BU_H : LASX3R_XXX<0x750a8000>; 668def XVSSRARN_HU_W : LASX3R_XXX<0x750b0000>; 669def XVSSRARN_WU_D : LASX3R_XXX<0x750b8000>; 670 671def XVSSRLRNI_B_H : LASX2RI4_XXXI<0x77504000>; 672def XVSSRLRNI_H_W : LASX2RI5_XXXI<0x77508000>; 673def XVSSRLRNI_W_D : LASX2RI6_XXXI<0x77510000>; 674def XVSSRLRNI_D_Q : LASX2RI7_XXXI<0x77520000>; 675def XVSSRARNI_B_H : LASX2RI4_XXXI<0x77684000>; 676def XVSSRARNI_H_W : LASX2RI5_XXXI<0x77688000>; 677def XVSSRARNI_W_D : LASX2RI6_XXXI<0x77690000>; 678def XVSSRARNI_D_Q : LASX2RI7_XXXI<0x776a0000>; 679def XVSSRLRNI_BU_H : LASX2RI4_XXXI<0x77544000>; 680def XVSSRLRNI_HU_W : LASX2RI5_XXXI<0x77548000>; 681def XVSSRLRNI_WU_D : LASX2RI6_XXXI<0x77550000>; 682def XVSSRLRNI_DU_Q : LASX2RI7_XXXI<0x77560000>; 683def XVSSRARNI_BU_H : LASX2RI4_XXXI<0x776c4000>; 684def XVSSRARNI_HU_W : LASX2RI5_XXXI<0x776c8000>; 685def XVSSRARNI_WU_D : LASX2RI6_XXXI<0x776d0000>; 686def XVSSRARNI_DU_Q : LASX2RI7_XXXI<0x776e0000>; 687 688def XVCLO_B : LASX2R_XX<0x769c0000>; 689def XVCLO_H : LASX2R_XX<0x769c0400>; 690def XVCLO_W : LASX2R_XX<0x769c0800>; 691def XVCLO_D : LASX2R_XX<0x769c0c00>; 692def XVCLZ_B : LASX2R_XX<0x769c1000>; 693def XVCLZ_H : LASX2R_XX<0x769c1400>; 694def XVCLZ_W : LASX2R_XX<0x769c1800>; 695def XVCLZ_D : LASX2R_XX<0x769c1c00>; 696 697def XVPCNT_B : LASX2R_XX<0x769c2000>; 698def XVPCNT_H : LASX2R_XX<0x769c2400>; 699def XVPCNT_W : LASX2R_XX<0x769c2800>; 700def XVPCNT_D : LASX2R_XX<0x769c2c00>; 701 702def XVBITCLR_B : LASX3R_XXX<0x750c0000>; 703def XVBITCLR_H : LASX3R_XXX<0x750c8000>; 704def XVBITCLR_W : LASX3R_XXX<0x750d0000>; 705def XVBITCLR_D : LASX3R_XXX<0x750d8000>; 706def XVBITCLRI_B : LASX2RI3_XXI<0x77102000>; 707def XVBITCLRI_H : LASX2RI4_XXI<0x77104000>; 708def XVBITCLRI_W : LASX2RI5_XXI<0x77108000>; 709def XVBITCLRI_D : LASX2RI6_XXI<0x77110000>; 710 711def XVBITSET_B : LASX3R_XXX<0x750e0000>; 712def XVBITSET_H : LASX3R_XXX<0x750e8000>; 713def XVBITSET_W : LASX3R_XXX<0x750f0000>; 714def XVBITSET_D : LASX3R_XXX<0x750f8000>; 715def XVBITSETI_B : LASX2RI3_XXI<0x77142000>; 716def XVBITSETI_H : LASX2RI4_XXI<0x77144000>; 717def XVBITSETI_W : LASX2RI5_XXI<0x77148000>; 718def XVBITSETI_D : LASX2RI6_XXI<0x77150000>; 719 720def XVBITREV_B : LASX3R_XXX<0x75100000>; 721def XVBITREV_H : LASX3R_XXX<0x75108000>; 722def XVBITREV_W : LASX3R_XXX<0x75110000>; 723def XVBITREV_D : LASX3R_XXX<0x75118000>; 724def XVBITREVI_B : LASX2RI3_XXI<0x77182000>; 725def XVBITREVI_H : LASX2RI4_XXI<0x77184000>; 726def XVBITREVI_W : LASX2RI5_XXI<0x77188000>; 727def XVBITREVI_D : LASX2RI6_XXI<0x77190000>; 728 729def XVFRSTP_B : LASX3R_XXXX<0x752b0000>; 730def XVFRSTP_H : LASX3R_XXXX<0x752b8000>; 731def XVFRSTPI_B : LASX2RI5_XXXI<0x769a0000>; 732def XVFRSTPI_H : LASX2RI5_XXXI<0x769a8000>; 733 734def XVFADD_S : LASX3R_XXX<0x75308000>; 735def XVFADD_D : LASX3R_XXX<0x75310000>; 736def XVFSUB_S : LASX3R_XXX<0x75328000>; 737def XVFSUB_D : LASX3R_XXX<0x75330000>; 738def XVFMUL_S : LASX3R_XXX<0x75388000>; 739def XVFMUL_D : LASX3R_XXX<0x75390000>; 740def XVFDIV_S : LASX3R_XXX<0x753a8000>; 741def XVFDIV_D : LASX3R_XXX<0x753b0000>; 742 743def XVFMADD_S : LASX4R_XXXX<0x0a100000>; 744def XVFMADD_D : LASX4R_XXXX<0x0a200000>; 745def XVFMSUB_S : LASX4R_XXXX<0x0a500000>; 746def XVFMSUB_D : LASX4R_XXXX<0x0a600000>; 747def XVFNMADD_S : LASX4R_XXXX<0x0a900000>; 748def XVFNMADD_D : LASX4R_XXXX<0x0aa00000>; 749def XVFNMSUB_S : LASX4R_XXXX<0x0ad00000>; 750def XVFNMSUB_D : LASX4R_XXXX<0x0ae00000>; 751 752def XVFMAX_S : LASX3R_XXX<0x753c8000>; 753def XVFMAX_D : LASX3R_XXX<0x753d0000>; 754def XVFMIN_S : LASX3R_XXX<0x753e8000>; 755def XVFMIN_D : LASX3R_XXX<0x753f0000>; 756 757def XVFMAXA_S : LASX3R_XXX<0x75408000>; 758def XVFMAXA_D : LASX3R_XXX<0x75410000>; 759def XVFMINA_S : LASX3R_XXX<0x75428000>; 760def XVFMINA_D : LASX3R_XXX<0x75430000>; 761 762def XVFLOGB_S : LASX2R_XX<0x769cc400>; 763def XVFLOGB_D : LASX2R_XX<0x769cc800>; 764 765def XVFCLASS_S : LASX2R_XX<0x769cd400>; 766def XVFCLASS_D : LASX2R_XX<0x769cd800>; 767 768def XVFSQRT_S : LASX2R_XX<0x769ce400>; 769def XVFSQRT_D : LASX2R_XX<0x769ce800>; 770def XVFRECIP_S : LASX2R_XX<0x769cf400>; 771def XVFRECIP_D : LASX2R_XX<0x769cf800>; 772def XVFRSQRT_S : LASX2R_XX<0x769d0400>; 773def XVFRSQRT_D : LASX2R_XX<0x769d0800>; 774def XVFRECIPE_S : LASX2R_XX<0x769d1400>; 775def XVFRECIPE_D : LASX2R_XX<0x769d1800>; 776def XVFRSQRTE_S : LASX2R_XX<0x769d2400>; 777def XVFRSQRTE_D : LASX2R_XX<0x769d2800>; 778 779def XVFCVTL_S_H : LASX2R_XX<0x769de800>; 780def XVFCVTH_S_H : LASX2R_XX<0x769dec00>; 781def XVFCVTL_D_S : LASX2R_XX<0x769df000>; 782def XVFCVTH_D_S : LASX2R_XX<0x769df400>; 783def XVFCVT_H_S : LASX3R_XXX<0x75460000>; 784def XVFCVT_S_D : LASX3R_XXX<0x75468000>; 785 786def XVFRINTRNE_S : LASX2R_XX<0x769d7400>; 787def XVFRINTRNE_D : LASX2R_XX<0x769d7800>; 788def XVFRINTRZ_S : LASX2R_XX<0x769d6400>; 789def XVFRINTRZ_D : LASX2R_XX<0x769d6800>; 790def XVFRINTRP_S : LASX2R_XX<0x769d5400>; 791def XVFRINTRP_D : LASX2R_XX<0x769d5800>; 792def XVFRINTRM_S : LASX2R_XX<0x769d4400>; 793def XVFRINTRM_D : LASX2R_XX<0x769d4800>; 794def XVFRINT_S : LASX2R_XX<0x769d3400>; 795def XVFRINT_D : LASX2R_XX<0x769d3800>; 796 797def XVFTINTRNE_W_S : LASX2R_XX<0x769e5000>; 798def XVFTINTRNE_L_D : LASX2R_XX<0x769e5400>; 799def XVFTINTRZ_W_S : LASX2R_XX<0x769e4800>; 800def XVFTINTRZ_L_D : LASX2R_XX<0x769e4c00>; 801def XVFTINTRP_W_S : LASX2R_XX<0x769e4000>; 802def XVFTINTRP_L_D : LASX2R_XX<0x769e4400>; 803def XVFTINTRM_W_S : LASX2R_XX<0x769e3800>; 804def XVFTINTRM_L_D : LASX2R_XX<0x769e3c00>; 805def XVFTINT_W_S : LASX2R_XX<0x769e3000>; 806def XVFTINT_L_D : LASX2R_XX<0x769e3400>; 807def XVFTINTRZ_WU_S : LASX2R_XX<0x769e7000>; 808def XVFTINTRZ_LU_D : LASX2R_XX<0x769e7400>; 809def XVFTINT_WU_S : LASX2R_XX<0x769e5800>; 810def XVFTINT_LU_D : LASX2R_XX<0x769e5c00>; 811 812def XVFTINTRNE_W_D : LASX3R_XXX<0x754b8000>; 813def XVFTINTRZ_W_D : LASX3R_XXX<0x754b0000>; 814def XVFTINTRP_W_D : LASX3R_XXX<0x754a8000>; 815def XVFTINTRM_W_D : LASX3R_XXX<0x754a0000>; 816def XVFTINT_W_D : LASX3R_XXX<0x75498000>; 817 818def XVFTINTRNEL_L_S : LASX2R_XX<0x769ea000>; 819def XVFTINTRNEH_L_S : LASX2R_XX<0x769ea400>; 820def XVFTINTRZL_L_S : LASX2R_XX<0x769e9800>; 821def XVFTINTRZH_L_S : LASX2R_XX<0x769e9c00>; 822def XVFTINTRPL_L_S : LASX2R_XX<0x769e9000>; 823def XVFTINTRPH_L_S : LASX2R_XX<0x769e9400>; 824def XVFTINTRML_L_S : LASX2R_XX<0x769e8800>; 825def XVFTINTRMH_L_S : LASX2R_XX<0x769e8c00>; 826def XVFTINTL_L_S : LASX2R_XX<0x769e8000>; 827def XVFTINTH_L_S : LASX2R_XX<0x769e8400>; 828 829def XVFFINT_S_W : LASX2R_XX<0x769e0000>; 830def XVFFINT_D_L : LASX2R_XX<0x769e0800>; 831def XVFFINT_S_WU : LASX2R_XX<0x769e0400>; 832def XVFFINT_D_LU : LASX2R_XX<0x769e0c00>; 833def XVFFINTL_D_W : LASX2R_XX<0x769e1000>; 834def XVFFINTH_D_W : LASX2R_XX<0x769e1400>; 835def XVFFINT_S_L : LASX3R_XXX<0x75480000>; 836 837def XVSEQ_B : LASX3R_XXX<0x74000000>; 838def XVSEQ_H : LASX3R_XXX<0x74008000>; 839def XVSEQ_W : LASX3R_XXX<0x74010000>; 840def XVSEQ_D : LASX3R_XXX<0x74018000>; 841def XVSEQI_B : LASX2RI5_XXI<0x76800000, simm5>; 842def XVSEQI_H : LASX2RI5_XXI<0x76808000, simm5>; 843def XVSEQI_W : LASX2RI5_XXI<0x76810000, simm5>; 844def XVSEQI_D : LASX2RI5_XXI<0x76818000, simm5>; 845 846def XVSLE_B : LASX3R_XXX<0x74020000>; 847def XVSLE_H : LASX3R_XXX<0x74028000>; 848def XVSLE_W : LASX3R_XXX<0x74030000>; 849def XVSLE_D : LASX3R_XXX<0x74038000>; 850def XVSLEI_B : LASX2RI5_XXI<0x76820000, simm5>; 851def XVSLEI_H : LASX2RI5_XXI<0x76828000, simm5>; 852def XVSLEI_W : LASX2RI5_XXI<0x76830000, simm5>; 853def XVSLEI_D : LASX2RI5_XXI<0x76838000, simm5>; 854 855def XVSLE_BU : LASX3R_XXX<0x74040000>; 856def XVSLE_HU : LASX3R_XXX<0x74048000>; 857def XVSLE_WU : LASX3R_XXX<0x74050000>; 858def XVSLE_DU : LASX3R_XXX<0x74058000>; 859def XVSLEI_BU : LASX2RI5_XXI<0x76840000>; 860def XVSLEI_HU : LASX2RI5_XXI<0x76848000>; 861def XVSLEI_WU : LASX2RI5_XXI<0x76850000>; 862def XVSLEI_DU : LASX2RI5_XXI<0x76858000>; 863 864def XVSLT_B : LASX3R_XXX<0x74060000>; 865def XVSLT_H : LASX3R_XXX<0x74068000>; 866def XVSLT_W : LASX3R_XXX<0x74070000>; 867def XVSLT_D : LASX3R_XXX<0x74078000>; 868def XVSLTI_B : LASX2RI5_XXI<0x76860000, simm5>; 869def XVSLTI_H : LASX2RI5_XXI<0x76868000, simm5>; 870def XVSLTI_W : LASX2RI5_XXI<0x76870000, simm5>; 871def XVSLTI_D : LASX2RI5_XXI<0x76878000, simm5>; 872 873def XVSLT_BU : LASX3R_XXX<0x74080000>; 874def XVSLT_HU : LASX3R_XXX<0x74088000>; 875def XVSLT_WU : LASX3R_XXX<0x74090000>; 876def XVSLT_DU : LASX3R_XXX<0x74098000>; 877def XVSLTI_BU : LASX2RI5_XXI<0x76880000>; 878def XVSLTI_HU : LASX2RI5_XXI<0x76888000>; 879def XVSLTI_WU : LASX2RI5_XXI<0x76890000>; 880def XVSLTI_DU : LASX2RI5_XXI<0x76898000>; 881 882def XVFCMP_CAF_S : LASX3R_XXX<0x0c900000>; 883def XVFCMP_SAF_S : LASX3R_XXX<0x0c908000>; 884def XVFCMP_CLT_S : LASX3R_XXX<0x0c910000>; 885def XVFCMP_SLT_S : LASX3R_XXX<0x0c918000>; 886def XVFCMP_CEQ_S : LASX3R_XXX<0x0c920000>; 887def XVFCMP_SEQ_S : LASX3R_XXX<0x0c928000>; 888def XVFCMP_CLE_S : LASX3R_XXX<0x0c930000>; 889def XVFCMP_SLE_S : LASX3R_XXX<0x0c938000>; 890def XVFCMP_CUN_S : LASX3R_XXX<0x0c940000>; 891def XVFCMP_SUN_S : LASX3R_XXX<0x0c948000>; 892def XVFCMP_CULT_S : LASX3R_XXX<0x0c950000>; 893def XVFCMP_SULT_S : LASX3R_XXX<0x0c958000>; 894def XVFCMP_CUEQ_S : LASX3R_XXX<0x0c960000>; 895def XVFCMP_SUEQ_S : LASX3R_XXX<0x0c968000>; 896def XVFCMP_CULE_S : LASX3R_XXX<0x0c970000>; 897def XVFCMP_SULE_S : LASX3R_XXX<0x0c978000>; 898def XVFCMP_CNE_S : LASX3R_XXX<0x0c980000>; 899def XVFCMP_SNE_S : LASX3R_XXX<0x0c988000>; 900def XVFCMP_COR_S : LASX3R_XXX<0x0c9a0000>; 901def XVFCMP_SOR_S : LASX3R_XXX<0x0c9a8000>; 902def XVFCMP_CUNE_S : LASX3R_XXX<0x0c9c0000>; 903def XVFCMP_SUNE_S : LASX3R_XXX<0x0c9c8000>; 904 905def XVFCMP_CAF_D : LASX3R_XXX<0x0ca00000>; 906def XVFCMP_SAF_D : LASX3R_XXX<0x0ca08000>; 907def XVFCMP_CLT_D : LASX3R_XXX<0x0ca10000>; 908def XVFCMP_SLT_D : LASX3R_XXX<0x0ca18000>; 909def XVFCMP_CEQ_D : LASX3R_XXX<0x0ca20000>; 910def XVFCMP_SEQ_D : LASX3R_XXX<0x0ca28000>; 911def XVFCMP_CLE_D : LASX3R_XXX<0x0ca30000>; 912def XVFCMP_SLE_D : LASX3R_XXX<0x0ca38000>; 913def XVFCMP_CUN_D : LASX3R_XXX<0x0ca40000>; 914def XVFCMP_SUN_D : LASX3R_XXX<0x0ca48000>; 915def XVFCMP_CULT_D : LASX3R_XXX<0x0ca50000>; 916def XVFCMP_SULT_D : LASX3R_XXX<0x0ca58000>; 917def XVFCMP_CUEQ_D : LASX3R_XXX<0x0ca60000>; 918def XVFCMP_SUEQ_D : LASX3R_XXX<0x0ca68000>; 919def XVFCMP_CULE_D : LASX3R_XXX<0x0ca70000>; 920def XVFCMP_SULE_D : LASX3R_XXX<0x0ca78000>; 921def XVFCMP_CNE_D : LASX3R_XXX<0x0ca80000>; 922def XVFCMP_SNE_D : LASX3R_XXX<0x0ca88000>; 923def XVFCMP_COR_D : LASX3R_XXX<0x0caa0000>; 924def XVFCMP_SOR_D : LASX3R_XXX<0x0caa8000>; 925def XVFCMP_CUNE_D : LASX3R_XXX<0x0cac0000>; 926def XVFCMP_SUNE_D : LASX3R_XXX<0x0cac8000>; 927 928def XVBITSEL_V : LASX4R_XXXX<0x0d200000>; 929 930def XVBITSELI_B : LASX2RI8_XXXI<0x77c40000>; 931 932def XVSETEQZ_V : LASX2R_CX<0x769c9800>; 933def XVSETNEZ_V : LASX2R_CX<0x769c9c00>; 934def XVSETANYEQZ_B : LASX2R_CX<0x769ca000>; 935def XVSETANYEQZ_H : LASX2R_CX<0x769ca400>; 936def XVSETANYEQZ_W : LASX2R_CX<0x769ca800>; 937def XVSETANYEQZ_D : LASX2R_CX<0x769cac00>; 938def XVSETALLNEZ_B : LASX2R_CX<0x769cb000>; 939def XVSETALLNEZ_H : LASX2R_CX<0x769cb400>; 940def XVSETALLNEZ_W : LASX2R_CX<0x769cb800>; 941def XVSETALLNEZ_D : LASX2R_CX<0x769cbc00>; 942 943def XVINSGR2VR_W : LASX2RI3_XXRI<0x76ebc000>; 944def XVINSGR2VR_D : LASX2RI2_XXRI<0x76ebe000>; 945def XVPICKVE2GR_W : LASX2RI3_RXI<0x76efc000>; 946def XVPICKVE2GR_D : LASX2RI2_RXI<0x76efe000>; 947def XVPICKVE2GR_WU : LASX2RI3_RXI<0x76f3c000>; 948def XVPICKVE2GR_DU : LASX2RI2_RXI<0x76f3e000>; 949 950def XVREPLGR2VR_B : LASX2R_XR<0x769f0000>; 951def XVREPLGR2VR_H : LASX2R_XR<0x769f0400>; 952def XVREPLGR2VR_W : LASX2R_XR<0x769f0800>; 953def XVREPLGR2VR_D : LASX2R_XR<0x769f0c00>; 954 955def XVREPLVE_B : LASX3R_XXR<0x75220000>; 956def XVREPLVE_H : LASX3R_XXR<0x75228000>; 957def XVREPLVE_W : LASX3R_XXR<0x75230000>; 958def XVREPLVE_D : LASX3R_XXR<0x75238000>; 959def XVREPL128VEI_B : LASX2RI4_XXI<0x76f78000>; 960def XVREPL128VEI_H : LASX2RI3_XXI<0x76f7c000>; 961def XVREPL128VEI_W : LASX2RI2_XXI<0x76f7e000>; 962def XVREPL128VEI_D : LASX2RI1_XXI<0x76f7f000>; 963 964def XVREPLVE0_B : LASX2R_XX<0x77070000>; 965def XVREPLVE0_H : LASX2R_XX<0x77078000>; 966def XVREPLVE0_W : LASX2R_XX<0x7707c000>; 967def XVREPLVE0_D : LASX2R_XX<0x7707e000>; 968def XVREPLVE0_Q : LASX2R_XX<0x7707f000>; 969 970def XVINSVE0_W : LASX2RI3_XXXI<0x76ffc000>; 971def XVINSVE0_D : LASX2RI2_XXXI<0x76ffe000>; 972 973def XVPICKVE_W : LASX2RI3_XXI<0x7703c000>; 974def XVPICKVE_D : LASX2RI2_XXI<0x7703e000>; 975 976def XVBSLL_V : LASX2RI5_XXI<0x768e0000>; 977def XVBSRL_V : LASX2RI5_XXI<0x768e8000>; 978 979def XVPACKEV_B : LASX3R_XXX<0x75160000>; 980def XVPACKEV_H : LASX3R_XXX<0x75168000>; 981def XVPACKEV_W : LASX3R_XXX<0x75170000>; 982def XVPACKEV_D : LASX3R_XXX<0x75178000>; 983def XVPACKOD_B : LASX3R_XXX<0x75180000>; 984def XVPACKOD_H : LASX3R_XXX<0x75188000>; 985def XVPACKOD_W : LASX3R_XXX<0x75190000>; 986def XVPACKOD_D : LASX3R_XXX<0x75198000>; 987 988def XVPICKEV_B : LASX3R_XXX<0x751e0000>; 989def XVPICKEV_H : LASX3R_XXX<0x751e8000>; 990def XVPICKEV_W : LASX3R_XXX<0x751f0000>; 991def XVPICKEV_D : LASX3R_XXX<0x751f8000>; 992def XVPICKOD_B : LASX3R_XXX<0x75200000>; 993def XVPICKOD_H : LASX3R_XXX<0x75208000>; 994def XVPICKOD_W : LASX3R_XXX<0x75210000>; 995def XVPICKOD_D : LASX3R_XXX<0x75218000>; 996 997def XVILVL_B : LASX3R_XXX<0x751a0000>; 998def XVILVL_H : LASX3R_XXX<0x751a8000>; 999def XVILVL_W : LASX3R_XXX<0x751b0000>; 1000def XVILVL_D : LASX3R_XXX<0x751b8000>; 1001def XVILVH_B : LASX3R_XXX<0x751c0000>; 1002def XVILVH_H : LASX3R_XXX<0x751c8000>; 1003def XVILVH_W : LASX3R_XXX<0x751d0000>; 1004def XVILVH_D : LASX3R_XXX<0x751d8000>; 1005 1006def XVSHUF_B : LASX4R_XXXX<0x0d600000>; 1007 1008def XVSHUF_H : LASX3R_XXXX<0x757a8000>; 1009def XVSHUF_W : LASX3R_XXXX<0x757b0000>; 1010def XVSHUF_D : LASX3R_XXXX<0x757b8000>; 1011 1012def XVPERM_W : LASX3R_XXX<0x757d0000>; 1013 1014def XVSHUF4I_B : LASX2RI8_XXI<0x77900000>; 1015def XVSHUF4I_H : LASX2RI8_XXI<0x77940000>; 1016def XVSHUF4I_W : LASX2RI8_XXI<0x77980000>; 1017def XVSHUF4I_D : LASX2RI8_XXXI<0x779c0000>; 1018 1019def XVPERMI_W : LASX2RI8_XXXI<0x77e40000>; 1020def XVPERMI_D : LASX2RI8_XXI<0x77e80000>; 1021def XVPERMI_Q : LASX2RI8_XXXI<0x77ec0000>; 1022 1023def XVEXTRINS_D : LASX2RI8_XXXI<0x77800000>; 1024def XVEXTRINS_W : LASX2RI8_XXXI<0x77840000>; 1025def XVEXTRINS_H : LASX2RI8_XXXI<0x77880000>; 1026def XVEXTRINS_B : LASX2RI8_XXXI<0x778c0000>; 1027} // mayLoad = 0, mayStore = 0 1028 1029let mayLoad = 1, mayStore = 0 in { 1030def XVLD : LASX2RI12_Load<0x2c800000>; 1031def XVLDX : LASX3R_Load<0x38480000>; 1032 1033def XVLDREPL_B : LASX2RI12_Load<0x32800000>; 1034def XVLDREPL_H : LASX2RI11_Load<0x32400000>; 1035def XVLDREPL_W : LASX2RI10_Load<0x32200000>; 1036def XVLDREPL_D : LASX2RI9_Load<0x32100000>; 1037} // mayLoad = 1, mayStore = 0 1038 1039let mayLoad = 0, mayStore = 1 in { 1040def XVST : LASX2RI12_Store<0x2cc00000>; 1041def XVSTX : LASX3R_Store<0x384c0000>; 1042 1043def XVSTELM_B : LASX2RI8I5_XRII<0x33800000>; 1044def XVSTELM_H : LASX2RI8I4_XRII<0x33400000, simm8_lsl1>; 1045def XVSTELM_W : LASX2RI8I3_XRII<0x33200000, simm8_lsl2>; 1046def XVSTELM_D : LASX2RI8I2_XRII<0x33100000, simm8_lsl3>; 1047} // mayLoad = 0, mayStore = 1 1048 1049} // hasSideEffects = 0, Predicates = [HasExtLASX] 1050 1051/// Pseudo-instructions 1052 1053let Predicates = [HasExtLASX] in { 1054 1055let hasSideEffects = 0, mayLoad = 0, mayStore = 0, isCodeGenOnly = 0, 1056 isAsmParserOnly = 1 in { 1057def PseudoXVREPLI_B : Pseudo<(outs LASX256:$xd), (ins simm10:$imm), [], 1058 "xvrepli.b", "$xd, $imm">; 1059def PseudoXVREPLI_H : Pseudo<(outs LASX256:$xd), (ins simm10:$imm), [], 1060 "xvrepli.h", "$xd, $imm">; 1061def PseudoXVREPLI_W : Pseudo<(outs LASX256:$xd), (ins simm10:$imm), [], 1062 "xvrepli.w", "$xd, $imm">; 1063def PseudoXVREPLI_D : Pseudo<(outs LASX256:$xd), (ins simm10:$imm), [], 1064 "xvrepli.d", "$xd, $imm">; 1065} 1066 1067def PseudoXVBNZ_B : VecCond<loongarch_vall_nonzero, v32i8, LASX256>; 1068def PseudoXVBNZ_H : VecCond<loongarch_vall_nonzero, v16i16, LASX256>; 1069def PseudoXVBNZ_W : VecCond<loongarch_vall_nonzero, v8i32, LASX256>; 1070def PseudoXVBNZ_D : VecCond<loongarch_vall_nonzero, v4i64, LASX256>; 1071def PseudoXVBNZ : VecCond<loongarch_vany_nonzero, v32i8, LASX256>; 1072 1073def PseudoXVBZ_B : VecCond<loongarch_vall_zero, v32i8, LASX256>; 1074def PseudoXVBZ_H : VecCond<loongarch_vall_zero, v16i16, LASX256>; 1075def PseudoXVBZ_W : VecCond<loongarch_vall_zero, v8i32, LASX256>; 1076def PseudoXVBZ_D : VecCond<loongarch_vall_zero, v4i64, LASX256>; 1077def PseudoXVBZ : VecCond<loongarch_vany_zero, v32i8, LASX256>; 1078 1079let usesCustomInserter = 1, Constraints = "$xd = $dst" in { 1080def PseudoXVINSGR2VR_B 1081 : Pseudo<(outs LASX256:$dst), (ins LASX256:$xd, GPR:$rj, uimm5:$imm)>; 1082def PseudoXVINSGR2VR_H 1083 : Pseudo<(outs LASX256:$dst), (ins LASX256:$xd, GPR:$rj, uimm4:$imm)>; 1084} // usesCustomInserter = 1, Constraints = "$xd = $dst" 1085 1086} // Predicates = [HasExtLASX] 1087 1088multiclass PatXr<SDPatternOperator OpNode, string Inst> { 1089 def : Pat<(v32i8 (OpNode (v32i8 LASX256:$xj))), 1090 (!cast<LAInst>(Inst#"_B") LASX256:$xj)>; 1091 def : Pat<(v16i16 (OpNode (v16i16 LASX256:$xj))), 1092 (!cast<LAInst>(Inst#"_H") LASX256:$xj)>; 1093 def : Pat<(v8i32 (OpNode (v8i32 LASX256:$xj))), 1094 (!cast<LAInst>(Inst#"_W") LASX256:$xj)>; 1095 def : Pat<(v4i64 (OpNode (v4i64 LASX256:$xj))), 1096 (!cast<LAInst>(Inst#"_D") LASX256:$xj)>; 1097} 1098 1099multiclass PatXrF<SDPatternOperator OpNode, string Inst> { 1100 def : Pat<(v8f32 (OpNode (v8f32 LASX256:$xj))), 1101 (!cast<LAInst>(Inst#"_S") LASX256:$xj)>; 1102 def : Pat<(v4f64 (OpNode (v4f64 LASX256:$xj))), 1103 (!cast<LAInst>(Inst#"_D") LASX256:$xj)>; 1104} 1105 1106multiclass PatXrXr<SDPatternOperator OpNode, string Inst> { 1107 def : Pat<(OpNode (v32i8 LASX256:$xj), (v32i8 LASX256:$xk)), 1108 (!cast<LAInst>(Inst#"_B") LASX256:$xj, LASX256:$xk)>; 1109 def : Pat<(OpNode (v16i16 LASX256:$xj), (v16i16 LASX256:$xk)), 1110 (!cast<LAInst>(Inst#"_H") LASX256:$xj, LASX256:$xk)>; 1111 def : Pat<(OpNode (v8i32 LASX256:$xj), (v8i32 LASX256:$xk)), 1112 (!cast<LAInst>(Inst#"_W") LASX256:$xj, LASX256:$xk)>; 1113 def : Pat<(OpNode (v4i64 LASX256:$xj), (v4i64 LASX256:$xk)), 1114 (!cast<LAInst>(Inst#"_D") LASX256:$xj, LASX256:$xk)>; 1115} 1116 1117multiclass PatXrXrF<SDPatternOperator OpNode, string Inst> { 1118 def : Pat<(OpNode (v8f32 LASX256:$xj), (v8f32 LASX256:$xk)), 1119 (!cast<LAInst>(Inst#"_S") LASX256:$xj, LASX256:$xk)>; 1120 def : Pat<(OpNode (v4f64 LASX256:$xj), (v4f64 LASX256:$xk)), 1121 (!cast<LAInst>(Inst#"_D") LASX256:$xj, LASX256:$xk)>; 1122} 1123 1124multiclass PatXrXrU<SDPatternOperator OpNode, string Inst> { 1125 def : Pat<(OpNode (v32i8 LASX256:$xj), (v32i8 LASX256:$xk)), 1126 (!cast<LAInst>(Inst#"_BU") LASX256:$xj, LASX256:$xk)>; 1127 def : Pat<(OpNode (v16i16 LASX256:$xj), (v16i16 LASX256:$xk)), 1128 (!cast<LAInst>(Inst#"_HU") LASX256:$xj, LASX256:$xk)>; 1129 def : Pat<(OpNode (v8i32 LASX256:$xj), (v8i32 LASX256:$xk)), 1130 (!cast<LAInst>(Inst#"_WU") LASX256:$xj, LASX256:$xk)>; 1131 def : Pat<(OpNode (v4i64 LASX256:$xj), (v4i64 LASX256:$xk)), 1132 (!cast<LAInst>(Inst#"_DU") LASX256:$xj, LASX256:$xk)>; 1133} 1134 1135multiclass PatXrSimm5<SDPatternOperator OpNode, string Inst> { 1136 def : Pat<(OpNode (v32i8 LASX256:$xj), (v32i8 (SplatPat_simm5 simm5:$imm))), 1137 (!cast<LAInst>(Inst#"_B") LASX256:$xj, simm5:$imm)>; 1138 def : Pat<(OpNode (v16i16 LASX256:$xj), (v16i16 (SplatPat_simm5 simm5:$imm))), 1139 (!cast<LAInst>(Inst#"_H") LASX256:$xj, simm5:$imm)>; 1140 def : Pat<(OpNode (v8i32 LASX256:$xj), (v8i32 (SplatPat_simm5 simm5:$imm))), 1141 (!cast<LAInst>(Inst#"_W") LASX256:$xj, simm5:$imm)>; 1142 def : Pat<(OpNode (v4i64 LASX256:$xj), (v4i64 (SplatPat_simm5 simm5:$imm))), 1143 (!cast<LAInst>(Inst#"_D") LASX256:$xj, simm5:$imm)>; 1144} 1145 1146multiclass PatXrUimm5<SDPatternOperator OpNode, string Inst> { 1147 def : Pat<(OpNode (v32i8 LASX256:$xj), (v32i8 (SplatPat_uimm5 uimm5:$imm))), 1148 (!cast<LAInst>(Inst#"_BU") LASX256:$xj, uimm5:$imm)>; 1149 def : Pat<(OpNode (v16i16 LASX256:$xj), (v16i16 (SplatPat_uimm5 uimm5:$imm))), 1150 (!cast<LAInst>(Inst#"_HU") LASX256:$xj, uimm5:$imm)>; 1151 def : Pat<(OpNode (v8i32 LASX256:$xj), (v8i32 (SplatPat_uimm5 uimm5:$imm))), 1152 (!cast<LAInst>(Inst#"_WU") LASX256:$xj, uimm5:$imm)>; 1153 def : Pat<(OpNode (v4i64 LASX256:$xj), (v4i64 (SplatPat_uimm5 uimm5:$imm))), 1154 (!cast<LAInst>(Inst#"_DU") LASX256:$xj, uimm5:$imm)>; 1155} 1156 1157multiclass PatXrXrXr<SDPatternOperator OpNode, string Inst> { 1158 def : Pat<(OpNode (v32i8 LASX256:$xd), (v32i8 LASX256:$xj), 1159 (v32i8 LASX256:$xk)), 1160 (!cast<LAInst>(Inst#"_B") LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 1161 def : Pat<(OpNode (v16i16 LASX256:$xd), (v16i16 LASX256:$xj), 1162 (v16i16 LASX256:$xk)), 1163 (!cast<LAInst>(Inst#"_H") LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 1164 def : Pat<(OpNode (v8i32 LASX256:$xd), (v8i32 LASX256:$xj), 1165 (v8i32 LASX256:$xk)), 1166 (!cast<LAInst>(Inst#"_W") LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 1167 def : Pat<(OpNode (v4i64 LASX256:$xd), (v4i64 LASX256:$xj), 1168 (v4i64 LASX256:$xk)), 1169 (!cast<LAInst>(Inst#"_D") LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 1170} 1171 1172multiclass PatShiftXrXr<SDPatternOperator OpNode, string Inst> { 1173 def : Pat<(OpNode (v32i8 LASX256:$xj), (and vsplati8_imm_eq_7, 1174 (v32i8 LASX256:$xk))), 1175 (!cast<LAInst>(Inst#"_B") LASX256:$xj, LASX256:$xk)>; 1176 def : Pat<(OpNode (v16i16 LASX256:$xj), (and vsplati16_imm_eq_15, 1177 (v16i16 LASX256:$xk))), 1178 (!cast<LAInst>(Inst#"_H") LASX256:$xj, LASX256:$xk)>; 1179 def : Pat<(OpNode (v8i32 LASX256:$xj), (and vsplati32_imm_eq_31, 1180 (v8i32 LASX256:$xk))), 1181 (!cast<LAInst>(Inst#"_W") LASX256:$xj, LASX256:$xk)>; 1182 def : Pat<(OpNode (v4i64 LASX256:$xj), (and vsplati64_imm_eq_63, 1183 (v4i64 LASX256:$xk))), 1184 (!cast<LAInst>(Inst#"_D") LASX256:$xj, LASX256:$xk)>; 1185} 1186 1187multiclass PatShiftXrUimm<SDPatternOperator OpNode, string Inst> { 1188 def : Pat<(OpNode (v32i8 LASX256:$xj), (v32i8 (SplatPat_uimm3 uimm3:$imm))), 1189 (!cast<LAInst>(Inst#"_B") LASX256:$xj, uimm3:$imm)>; 1190 def : Pat<(OpNode (v16i16 LASX256:$xj), (v16i16 (SplatPat_uimm4 uimm4:$imm))), 1191 (!cast<LAInst>(Inst#"_H") LASX256:$xj, uimm4:$imm)>; 1192 def : Pat<(OpNode (v8i32 LASX256:$xj), (v8i32 (SplatPat_uimm5 uimm5:$imm))), 1193 (!cast<LAInst>(Inst#"_W") LASX256:$xj, uimm5:$imm)>; 1194 def : Pat<(OpNode (v4i64 LASX256:$xj), (v4i64 (SplatPat_uimm6 uimm6:$imm))), 1195 (!cast<LAInst>(Inst#"_D") LASX256:$xj, uimm6:$imm)>; 1196} 1197 1198multiclass PatCCXrSimm5<CondCode CC, string Inst> { 1199 def : Pat<(v32i8 (setcc (v32i8 LASX256:$xj), 1200 (v32i8 (SplatPat_simm5 simm5:$imm)), CC)), 1201 (!cast<LAInst>(Inst#"_B") LASX256:$xj, simm5:$imm)>; 1202 def : Pat<(v16i16 (setcc (v16i16 LASX256:$xj), 1203 (v16i16 (SplatPat_simm5 simm5:$imm)), CC)), 1204 (!cast<LAInst>(Inst#"_H") LASX256:$xj, simm5:$imm)>; 1205 def : Pat<(v8i32 (setcc (v8i32 LASX256:$xj), 1206 (v8i32 (SplatPat_simm5 simm5:$imm)), CC)), 1207 (!cast<LAInst>(Inst#"_W") LASX256:$xj, simm5:$imm)>; 1208 def : Pat<(v4i64 (setcc (v4i64 LASX256:$xj), 1209 (v4i64 (SplatPat_simm5 simm5:$imm)), CC)), 1210 (!cast<LAInst>(Inst#"_D") LASX256:$xj, simm5:$imm)>; 1211} 1212 1213multiclass PatCCXrUimm5<CondCode CC, string Inst> { 1214 def : Pat<(v32i8 (setcc (v32i8 LASX256:$xj), 1215 (v32i8 (SplatPat_uimm5 uimm5:$imm)), CC)), 1216 (!cast<LAInst>(Inst#"_BU") LASX256:$xj, uimm5:$imm)>; 1217 def : Pat<(v16i16 (setcc (v16i16 LASX256:$xj), 1218 (v16i16 (SplatPat_uimm5 uimm5:$imm)), CC)), 1219 (!cast<LAInst>(Inst#"_HU") LASX256:$xj, uimm5:$imm)>; 1220 def : Pat<(v8i32 (setcc (v8i32 LASX256:$xj), 1221 (v8i32 (SplatPat_uimm5 uimm5:$imm)), CC)), 1222 (!cast<LAInst>(Inst#"_WU") LASX256:$xj, uimm5:$imm)>; 1223 def : Pat<(v4i64 (setcc (v4i64 LASX256:$xj), 1224 (v4i64 (SplatPat_uimm5 uimm5:$imm)), CC)), 1225 (!cast<LAInst>(Inst#"_DU") LASX256:$xj, uimm5:$imm)>; 1226} 1227 1228multiclass PatCCXrXr<CondCode CC, string Inst> { 1229 def : Pat<(v32i8 (setcc (v32i8 LASX256:$xj), (v32i8 LASX256:$xk), CC)), 1230 (!cast<LAInst>(Inst#"_B") LASX256:$xj, LASX256:$xk)>; 1231 def : Pat<(v16i16 (setcc (v16i16 LASX256:$xj), (v16i16 LASX256:$xk), CC)), 1232 (!cast<LAInst>(Inst#"_H") LASX256:$xj, LASX256:$xk)>; 1233 def : Pat<(v8i32 (setcc (v8i32 LASX256:$xj), (v8i32 LASX256:$xk), CC)), 1234 (!cast<LAInst>(Inst#"_W") LASX256:$xj, LASX256:$xk)>; 1235 def : Pat<(v4i64 (setcc (v4i64 LASX256:$xj), (v4i64 LASX256:$xk), CC)), 1236 (!cast<LAInst>(Inst#"_D") LASX256:$xj, LASX256:$xk)>; 1237} 1238 1239multiclass PatCCXrXrU<CondCode CC, string Inst> { 1240 def : Pat<(v32i8 (setcc (v32i8 LASX256:$xj), (v32i8 LASX256:$xk), CC)), 1241 (!cast<LAInst>(Inst#"_BU") LASX256:$xj, LASX256:$xk)>; 1242 def : Pat<(v16i16 (setcc (v16i16 LASX256:$xj), (v16i16 LASX256:$xk), CC)), 1243 (!cast<LAInst>(Inst#"_HU") LASX256:$xj, LASX256:$xk)>; 1244 def : Pat<(v8i32 (setcc (v8i32 LASX256:$xj), (v8i32 LASX256:$xk), CC)), 1245 (!cast<LAInst>(Inst#"_WU") LASX256:$xj, LASX256:$xk)>; 1246 def : Pat<(v4i64 (setcc (v4i64 LASX256:$xj), (v4i64 LASX256:$xk), CC)), 1247 (!cast<LAInst>(Inst#"_DU") LASX256:$xj, LASX256:$xk)>; 1248} 1249 1250multiclass PatCCXrXrF<CondCode CC, string Inst> { 1251 def : Pat<(v8i32 (setcc (v8f32 LASX256:$xj), (v8f32 LASX256:$xk), CC)), 1252 (!cast<LAInst>(Inst#"_S") LASX256:$xj, LASX256:$xk)>; 1253 def : Pat<(v4i64 (setcc (v4f64 LASX256:$xj), (v4f64 LASX256:$xk), CC)), 1254 (!cast<LAInst>(Inst#"_D") LASX256:$xj, LASX256:$xk)>; 1255} 1256 1257let Predicates = [HasExtLASX] in { 1258 1259// XVADD_{B/H/W/D} 1260defm : PatXrXr<add, "XVADD">; 1261// XVSUB_{B/H/W/D} 1262defm : PatXrXr<sub, "XVSUB">; 1263 1264// XVADDI_{B/H/W/D}U 1265defm : PatXrUimm5<add, "XVADDI">; 1266// XVSUBI_{B/H/W/D}U 1267defm : PatXrUimm5<sub, "XVSUBI">; 1268 1269// XVNEG_{B/H/W/D} 1270def : Pat<(sub immAllZerosV, (v32i8 LASX256:$xj)), (XVNEG_B LASX256:$xj)>; 1271def : Pat<(sub immAllZerosV, (v16i16 LASX256:$xj)), (XVNEG_H LASX256:$xj)>; 1272def : Pat<(sub immAllZerosV, (v8i32 LASX256:$xj)), (XVNEG_W LASX256:$xj)>; 1273def : Pat<(sub immAllZerosV, (v4i64 LASX256:$xj)), (XVNEG_D LASX256:$xj)>; 1274 1275// XVMAX[I]_{B/H/W/D}[U] 1276defm : PatXrXr<smax, "XVMAX">; 1277defm : PatXrXrU<umax, "XVMAX">; 1278defm : PatXrSimm5<smax, "XVMAXI">; 1279defm : PatXrUimm5<umax, "XVMAXI">; 1280 1281// XVMIN[I]_{B/H/W/D}[U] 1282defm : PatXrXr<smin, "XVMIN">; 1283defm : PatXrXrU<umin, "XVMIN">; 1284defm : PatXrSimm5<smin, "XVMINI">; 1285defm : PatXrUimm5<umin, "XVMINI">; 1286 1287// XVMUL_{B/H/W/D} 1288defm : PatXrXr<mul, "XVMUL">; 1289 1290// XVMUH_{B/H/W/D}[U] 1291defm : PatXrXr<mulhs, "XVMUH">; 1292defm : PatXrXrU<mulhu, "XVMUH">; 1293 1294// XVMADD_{B/H/W/D} 1295defm : PatXrXrXr<muladd, "XVMADD">; 1296// XVMSUB_{B/H/W/D} 1297defm : PatXrXrXr<mulsub, "XVMSUB">; 1298 1299// XVDIV_{B/H/W/D}[U] 1300defm : PatXrXr<sdiv, "XVDIV">; 1301defm : PatXrXrU<udiv, "XVDIV">; 1302 1303// XVMOD_{B/H/W/D}[U] 1304defm : PatXrXr<srem, "XVMOD">; 1305defm : PatXrXrU<urem, "XVMOD">; 1306 1307// XVAND_V 1308foreach vt = [v32i8, v16i16, v8i32, v4i64] in 1309def : Pat<(and (vt LASX256:$xj), (vt LASX256:$xk)), 1310 (XVAND_V LASX256:$xj, LASX256:$xk)>; 1311// XVOR_V 1312foreach vt = [v32i8, v16i16, v8i32, v4i64] in 1313def : Pat<(or (vt LASX256:$xj), (vt LASX256:$xk)), 1314 (XVOR_V LASX256:$xj, LASX256:$xk)>; 1315// XVXOR_V 1316foreach vt = [v32i8, v16i16, v8i32, v4i64] in 1317def : Pat<(xor (vt LASX256:$xj), (vt LASX256:$xk)), 1318 (XVXOR_V LASX256:$xj, LASX256:$xk)>; 1319// XVNOR_V 1320foreach vt = [v32i8, v16i16, v8i32, v4i64] in 1321def : Pat<(vnot (or (vt LASX256:$xj), (vt LASX256:$xk))), 1322 (XVNOR_V LASX256:$xj, LASX256:$xk)>; 1323 1324// XVANDI_B 1325def : Pat<(and (v32i8 LASX256:$xj), (v32i8 (SplatPat_uimm8 uimm8:$imm))), 1326 (XVANDI_B LASX256:$xj, uimm8:$imm)>; 1327// XVORI_B 1328def : Pat<(or (v32i8 LASX256:$xj), (v32i8 (SplatPat_uimm8 uimm8:$imm))), 1329 (XVORI_B LASX256:$xj, uimm8:$imm)>; 1330 1331// XVXORI_B 1332def : Pat<(xor (v32i8 LASX256:$xj), (v32i8 (SplatPat_uimm8 uimm8:$imm))), 1333 (XVXORI_B LASX256:$xj, uimm8:$imm)>; 1334 1335// XVSLL[I]_{B/H/W/D} 1336defm : PatXrXr<shl, "XVSLL">; 1337defm : PatShiftXrXr<shl, "XVSLL">; 1338defm : PatShiftXrUimm<shl, "XVSLLI">; 1339 1340// XVSRL[I]_{B/H/W/D} 1341defm : PatXrXr<srl, "XVSRL">; 1342defm : PatShiftXrXr<srl, "XVSRL">; 1343defm : PatShiftXrUimm<srl, "XVSRLI">; 1344 1345// XVSRA[I]_{B/H/W/D} 1346defm : PatXrXr<sra, "XVSRA">; 1347defm : PatShiftXrXr<sra, "XVSRA">; 1348defm : PatShiftXrUimm<sra, "XVSRAI">; 1349 1350// XVCLZ_{B/H/W/D} 1351defm : PatXr<ctlz, "XVCLZ">; 1352 1353// XVPCNT_{B/H/W/D} 1354defm : PatXr<ctpop, "XVPCNT">; 1355 1356// XVBITCLR_{B/H/W/D} 1357def : Pat<(and v32i8:$xj, (vnot (shl vsplat_imm_eq_1, v32i8:$xk))), 1358 (v32i8 (XVBITCLR_B v32i8:$xj, v32i8:$xk))>; 1359def : Pat<(and v16i16:$xj, (vnot (shl vsplat_imm_eq_1, v16i16:$xk))), 1360 (v16i16 (XVBITCLR_H v16i16:$xj, v16i16:$xk))>; 1361def : Pat<(and v8i32:$xj, (vnot (shl vsplat_imm_eq_1, v8i32:$xk))), 1362 (v8i32 (XVBITCLR_W v8i32:$xj, v8i32:$xk))>; 1363def : Pat<(and v4i64:$xj, (vnot (shl vsplat_imm_eq_1, v4i64:$xk))), 1364 (v4i64 (XVBITCLR_D v4i64:$xj, v4i64:$xk))>; 1365def : Pat<(and v32i8:$xj, (vnot (shl vsplat_imm_eq_1, 1366 (vsplati8imm7 v32i8:$xk)))), 1367 (v32i8 (XVBITCLR_B v32i8:$xj, v32i8:$xk))>; 1368def : Pat<(and v16i16:$xj, (vnot (shl vsplat_imm_eq_1, 1369 (vsplati16imm15 v16i16:$xk)))), 1370 (v16i16 (XVBITCLR_H v16i16:$xj, v16i16:$xk))>; 1371def : Pat<(and v8i32:$xj, (vnot (shl vsplat_imm_eq_1, 1372 (vsplati32imm31 v8i32:$xk)))), 1373 (v8i32 (XVBITCLR_W v8i32:$xj, v8i32:$xk))>; 1374def : Pat<(and v4i64:$xj, (vnot (shl vsplat_imm_eq_1, 1375 (vsplati64imm63 v4i64:$xk)))), 1376 (v4i64 (XVBITCLR_D v4i64:$xj, v4i64:$xk))>; 1377 1378// XVBITCLRI_{B/H/W/D} 1379def : Pat<(and (v32i8 LASX256:$xj), (v32i8 (vsplat_uimm_inv_pow2 uimm3:$imm))), 1380 (XVBITCLRI_B LASX256:$xj, uimm3:$imm)>; 1381def : Pat<(and (v16i16 LASX256:$xj), (v16i16 (vsplat_uimm_inv_pow2 uimm4:$imm))), 1382 (XVBITCLRI_H LASX256:$xj, uimm4:$imm)>; 1383def : Pat<(and (v8i32 LASX256:$xj), (v8i32 (vsplat_uimm_inv_pow2 uimm5:$imm))), 1384 (XVBITCLRI_W LASX256:$xj, uimm5:$imm)>; 1385def : Pat<(and (v4i64 LASX256:$xj), (v4i64 (vsplat_uimm_inv_pow2 uimm6:$imm))), 1386 (XVBITCLRI_D LASX256:$xj, uimm6:$imm)>; 1387 1388// XVBITSET_{B/H/W/D} 1389def : Pat<(or v32i8:$xj, (shl vsplat_imm_eq_1, v32i8:$xk)), 1390 (v32i8 (XVBITSET_B v32i8:$xj, v32i8:$xk))>; 1391def : Pat<(or v16i16:$xj, (shl vsplat_imm_eq_1, v16i16:$xk)), 1392 (v16i16 (XVBITSET_H v16i16:$xj, v16i16:$xk))>; 1393def : Pat<(or v8i32:$xj, (shl vsplat_imm_eq_1, v8i32:$xk)), 1394 (v8i32 (XVBITSET_W v8i32:$xj, v8i32:$xk))>; 1395def : Pat<(or v4i64:$xj, (shl vsplat_imm_eq_1, v4i64:$xk)), 1396 (v4i64 (XVBITSET_D v4i64:$xj, v4i64:$xk))>; 1397def : Pat<(or v32i8:$xj, (shl vsplat_imm_eq_1, (vsplati8imm7 v32i8:$xk))), 1398 (v32i8 (XVBITSET_B v32i8:$xj, v32i8:$xk))>; 1399def : Pat<(or v16i16:$xj, (shl vsplat_imm_eq_1, (vsplati16imm15 v16i16:$xk))), 1400 (v16i16 (XVBITSET_H v16i16:$xj, v16i16:$xk))>; 1401def : Pat<(or v8i32:$xj, (shl vsplat_imm_eq_1, (vsplati32imm31 v8i32:$xk))), 1402 (v8i32 (XVBITSET_W v8i32:$xj, v8i32:$xk))>; 1403def : Pat<(or v4i64:$xj, (shl vsplat_imm_eq_1, (vsplati64imm63 v4i64:$xk))), 1404 (v4i64 (XVBITSET_D v4i64:$xj, v4i64:$xk))>; 1405 1406// XVBITSETI_{B/H/W/D} 1407def : Pat<(or (v32i8 LASX256:$xj), (v32i8 (vsplat_uimm_pow2 uimm3:$imm))), 1408 (XVBITSETI_B LASX256:$xj, uimm3:$imm)>; 1409def : Pat<(or (v16i16 LASX256:$xj), (v16i16 (vsplat_uimm_pow2 uimm4:$imm))), 1410 (XVBITSETI_H LASX256:$xj, uimm4:$imm)>; 1411def : Pat<(or (v8i32 LASX256:$xj), (v8i32 (vsplat_uimm_pow2 uimm5:$imm))), 1412 (XVBITSETI_W LASX256:$xj, uimm5:$imm)>; 1413def : Pat<(or (v4i64 LASX256:$xj), (v4i64 (vsplat_uimm_pow2 uimm6:$imm))), 1414 (XVBITSETI_D LASX256:$xj, uimm6:$imm)>; 1415 1416// XVBITREV_{B/H/W/D} 1417def : Pat<(xor v32i8:$xj, (shl vsplat_imm_eq_1, v32i8:$xk)), 1418 (v32i8 (XVBITREV_B v32i8:$xj, v32i8:$xk))>; 1419def : Pat<(xor v16i16:$xj, (shl vsplat_imm_eq_1, v16i16:$xk)), 1420 (v16i16 (XVBITREV_H v16i16:$xj, v16i16:$xk))>; 1421def : Pat<(xor v8i32:$xj, (shl vsplat_imm_eq_1, v8i32:$xk)), 1422 (v8i32 (XVBITREV_W v8i32:$xj, v8i32:$xk))>; 1423def : Pat<(xor v4i64:$xj, (shl vsplat_imm_eq_1, v4i64:$xk)), 1424 (v4i64 (XVBITREV_D v4i64:$xj, v4i64:$xk))>; 1425def : Pat<(xor v32i8:$xj, (shl vsplat_imm_eq_1, (vsplati8imm7 v32i8:$xk))), 1426 (v32i8 (XVBITREV_B v32i8:$xj, v32i8:$xk))>; 1427def : Pat<(xor v16i16:$xj, (shl vsplat_imm_eq_1, (vsplati16imm15 v16i16:$xk))), 1428 (v16i16 (XVBITREV_H v16i16:$xj, v16i16:$xk))>; 1429def : Pat<(xor v8i32:$xj, (shl vsplat_imm_eq_1, (vsplati32imm31 v8i32:$xk))), 1430 (v8i32 (XVBITREV_W v8i32:$xj, v8i32:$xk))>; 1431def : Pat<(xor v4i64:$xj, (shl vsplat_imm_eq_1, (vsplati64imm63 v4i64:$xk))), 1432 (v4i64 (XVBITREV_D v4i64:$xj, v4i64:$xk))>; 1433 1434// XVBITREVI_{B/H/W/D} 1435def : Pat<(xor (v32i8 LASX256:$xj), (v32i8 (vsplat_uimm_pow2 uimm3:$imm))), 1436 (XVBITREVI_B LASX256:$xj, uimm3:$imm)>; 1437def : Pat<(xor (v16i16 LASX256:$xj), (v16i16 (vsplat_uimm_pow2 uimm4:$imm))), 1438 (XVBITREVI_H LASX256:$xj, uimm4:$imm)>; 1439def : Pat<(xor (v8i32 LASX256:$xj), (v8i32 (vsplat_uimm_pow2 uimm5:$imm))), 1440 (XVBITREVI_W LASX256:$xj, uimm5:$imm)>; 1441def : Pat<(xor (v4i64 LASX256:$xj), (v4i64 (vsplat_uimm_pow2 uimm6:$imm))), 1442 (XVBITREVI_D LASX256:$xj, uimm6:$imm)>; 1443 1444// XVFADD_{S/D} 1445defm : PatXrXrF<fadd, "XVFADD">; 1446 1447// XVFSUB_{S/D} 1448defm : PatXrXrF<fsub, "XVFSUB">; 1449 1450// XVFMUL_{S/D} 1451defm : PatXrXrF<fmul, "XVFMUL">; 1452 1453// XVFDIV_{S/D} 1454defm : PatXrXrF<fdiv, "XVFDIV">; 1455 1456// XVFMADD_{S/D} 1457def : Pat<(fma v8f32:$xj, v8f32:$xk, v8f32:$xa), 1458 (XVFMADD_S v8f32:$xj, v8f32:$xk, v8f32:$xa)>; 1459def : Pat<(fma v4f64:$xj, v4f64:$xk, v4f64:$xa), 1460 (XVFMADD_D v4f64:$xj, v4f64:$xk, v4f64:$xa)>; 1461 1462// XVFMSUB_{S/D} 1463def : Pat<(fma v8f32:$xj, v8f32:$xk, (fneg v8f32:$xa)), 1464 (XVFMSUB_S v8f32:$xj, v8f32:$xk, v8f32:$xa)>; 1465def : Pat<(fma v4f64:$xj, v4f64:$xk, (fneg v4f64:$xa)), 1466 (XVFMSUB_D v4f64:$xj, v4f64:$xk, v4f64:$xa)>; 1467 1468// XVFNMADD_{S/D} 1469def : Pat<(fneg (fma v8f32:$xj, v8f32:$xk, v8f32:$xa)), 1470 (XVFNMADD_S v8f32:$xj, v8f32:$xk, v8f32:$xa)>; 1471def : Pat<(fneg (fma v4f64:$xj, v4f64:$xk, v4f64:$xa)), 1472 (XVFNMADD_D v4f64:$xj, v4f64:$xk, v4f64:$xa)>; 1473def : Pat<(fma_nsz (fneg v8f32:$xj), v8f32:$xk, (fneg v8f32:$xa)), 1474 (XVFNMADD_S v8f32:$xj, v8f32:$xk, v8f32:$xa)>; 1475def : Pat<(fma_nsz (fneg v4f64:$xj), v4f64:$xk, (fneg v4f64:$xa)), 1476 (XVFNMADD_D v4f64:$xj, v4f64:$xk, v4f64:$xa)>; 1477 1478// XVFNMSUB_{S/D} 1479def : Pat<(fneg (fma v8f32:$xj, v8f32:$xk, (fneg v8f32:$xa))), 1480 (XVFNMSUB_S v8f32:$xj, v8f32:$xk, v8f32:$xa)>; 1481def : Pat<(fneg (fma v4f64:$xj, v4f64:$xk, (fneg v4f64:$xa))), 1482 (XVFNMSUB_D v4f64:$xj, v4f64:$xk, v4f64:$xa)>; 1483def : Pat<(fma_nsz (fneg v8f32:$xj), v8f32:$xk, v8f32:$xa), 1484 (XVFNMSUB_S v8f32:$xj, v8f32:$xk, v8f32:$xa)>; 1485def : Pat<(fma_nsz (fneg v4f64:$xj), v4f64:$xk, v4f64:$xa), 1486 (XVFNMSUB_D v4f64:$xj, v4f64:$xk, v4f64:$xa)>; 1487 1488// XVFSQRT_{S/D} 1489defm : PatXrF<fsqrt, "XVFSQRT">; 1490 1491// XVRECIP_{S/D} 1492def : Pat<(fdiv vsplatf32_fpimm_eq_1, v8f32:$xj), 1493 (XVFRECIP_S v8f32:$xj)>; 1494def : Pat<(fdiv vsplatf64_fpimm_eq_1, v4f64:$xj), 1495 (XVFRECIP_D v4f64:$xj)>; 1496 1497// XVFRSQRT_{S/D} 1498def : Pat<(fdiv vsplatf32_fpimm_eq_1, (fsqrt v8f32:$xj)), 1499 (XVFRSQRT_S v8f32:$xj)>; 1500def : Pat<(fdiv vsplatf64_fpimm_eq_1, (fsqrt v4f64:$xj)), 1501 (XVFRSQRT_D v4f64:$xj)>; 1502 1503// XVSEQ[I]_{B/H/W/D} 1504defm : PatCCXrSimm5<SETEQ, "XVSEQI">; 1505defm : PatCCXrXr<SETEQ, "XVSEQ">; 1506 1507// XVSLE[I]_{B/H/W/D}[U] 1508defm : PatCCXrSimm5<SETLE, "XVSLEI">; 1509defm : PatCCXrUimm5<SETULE, "XVSLEI">; 1510defm : PatCCXrXr<SETLE, "XVSLE">; 1511defm : PatCCXrXrU<SETULE, "XVSLE">; 1512 1513// XVSLT[I]_{B/H/W/D}[U] 1514defm : PatCCXrSimm5<SETLT, "XVSLTI">; 1515defm : PatCCXrUimm5<SETULT, "XVSLTI">; 1516defm : PatCCXrXr<SETLT, "XVSLT">; 1517defm : PatCCXrXrU<SETULT, "XVSLT">; 1518 1519// XVFCMP.cond.{S/D} 1520defm : PatCCXrXrF<SETEQ, "XVFCMP_CEQ">; 1521defm : PatCCXrXrF<SETOEQ, "XVFCMP_CEQ">; 1522defm : PatCCXrXrF<SETUEQ, "XVFCMP_CUEQ">; 1523 1524defm : PatCCXrXrF<SETLE, "XVFCMP_CLE">; 1525defm : PatCCXrXrF<SETOLE, "XVFCMP_CLE">; 1526defm : PatCCXrXrF<SETULE, "XVFCMP_CULE">; 1527 1528defm : PatCCXrXrF<SETLT, "XVFCMP_CLT">; 1529defm : PatCCXrXrF<SETOLT, "XVFCMP_CLT">; 1530defm : PatCCXrXrF<SETULT, "XVFCMP_CULT">; 1531 1532defm : PatCCXrXrF<SETNE, "XVFCMP_CNE">; 1533defm : PatCCXrXrF<SETONE, "XVFCMP_CNE">; 1534defm : PatCCXrXrF<SETUNE, "XVFCMP_CUNE">; 1535 1536defm : PatCCXrXrF<SETO, "XVFCMP_COR">; 1537defm : PatCCXrXrF<SETUO, "XVFCMP_CUN">; 1538 1539// PseudoXVINSGR2VR_{B/H} 1540def : Pat<(vector_insert v32i8:$xd, GRLenVT:$rj, uimm5:$imm), 1541 (PseudoXVINSGR2VR_B v32i8:$xd, GRLenVT:$rj, uimm5:$imm)>; 1542def : Pat<(vector_insert v16i16:$xd, GRLenVT:$rj, uimm4:$imm), 1543 (PseudoXVINSGR2VR_H v16i16:$xd, GRLenVT:$rj, uimm4:$imm)>; 1544 1545// XVINSGR2VR_{W/D} 1546def : Pat<(vector_insert v8i32:$xd, GRLenVT:$rj, uimm3:$imm), 1547 (XVINSGR2VR_W v8i32:$xd, GRLenVT:$rj, uimm3:$imm)>; 1548def : Pat<(vector_insert v4i64:$xd, GRLenVT:$rj, uimm2:$imm), 1549 (XVINSGR2VR_D v4i64:$xd, GRLenVT:$rj, uimm2:$imm)>; 1550 1551def : Pat<(vector_insert v8f32:$vd, FPR32:$fj, uimm3:$imm), 1552 (XVINSGR2VR_W $vd, (COPY_TO_REGCLASS FPR32:$fj, GPR), uimm3:$imm)>; 1553def : Pat<(vector_insert v4f64:$vd, FPR64:$fj, uimm2:$imm), 1554 (XVINSGR2VR_D $vd, (COPY_TO_REGCLASS FPR64:$fj, GPR), uimm2:$imm)>; 1555 1556// XVPICKVE2GR_W[U] 1557def : Pat<(loongarch_vpick_sext_elt v8i32:$xd, uimm3:$imm, i32), 1558 (XVPICKVE2GR_W v8i32:$xd, uimm3:$imm)>; 1559def : Pat<(loongarch_vpick_zext_elt v8i32:$xd, uimm3:$imm, i32), 1560 (XVPICKVE2GR_WU v8i32:$xd, uimm3:$imm)>; 1561 1562// XVREPLGR2VR_{B/H/W/D} 1563def : Pat<(lasxsplati8 GPR:$rj), (XVREPLGR2VR_B GPR:$rj)>; 1564def : Pat<(lasxsplati16 GPR:$rj), (XVREPLGR2VR_H GPR:$rj)>; 1565def : Pat<(lasxsplati32 GPR:$rj), (XVREPLGR2VR_W GPR:$rj)>; 1566def : Pat<(lasxsplati64 GPR:$rj), (XVREPLGR2VR_D GPR:$rj)>; 1567 1568// XVREPLVE_{B/H/W/D} 1569def : Pat<(loongarch_vreplve v32i8:$xj, GRLenVT:$rk), 1570 (XVREPLVE_B v32i8:$xj, GRLenVT:$rk)>; 1571def : Pat<(loongarch_vreplve v16i16:$xj, GRLenVT:$rk), 1572 (XVREPLVE_H v16i16:$xj, GRLenVT:$rk)>; 1573def : Pat<(loongarch_vreplve v8i32:$xj, GRLenVT:$rk), 1574 (XVREPLVE_W v8i32:$xj, GRLenVT:$rk)>; 1575def : Pat<(loongarch_vreplve v4i64:$xj, GRLenVT:$rk), 1576 (XVREPLVE_D v4i64:$xj, GRLenVT:$rk)>; 1577 1578// XVREPLVE0_{W/D} 1579def : Pat<(lasxsplatf32 FPR32:$fj), 1580 (XVREPLVE0_W (SUBREG_TO_REG (i64 0), FPR32:$fj, sub_32))>; 1581def : Pat<(lasxsplatf64 FPR64:$fj), 1582 (XVREPLVE0_D (SUBREG_TO_REG (i64 0), FPR64:$fj, sub_64))>; 1583 1584// Loads/Stores 1585foreach vt = [v32i8, v16i16, v8i32, v4i64, v8f32, v4f64] in { 1586 defm : LdPat<load, XVLD, vt>; 1587 def : RegRegLdPat<load, XVLDX, vt>; 1588 defm : StPat<store, XVST, LASX256, vt>; 1589 def : RegRegStPat<store, XVSTX, LASX256, vt>; 1590} 1591 1592// Vector extraction with constant index. 1593def : Pat<(i64 (vector_extract v32i8:$xj, uimm4:$imm)), 1594 (VPICKVE2GR_B (EXTRACT_SUBREG v32i8:$xj, sub_128), uimm4:$imm)>; 1595def : Pat<(i64 (vector_extract v16i16:$xj, uimm3:$imm)), 1596 (VPICKVE2GR_H (EXTRACT_SUBREG v16i16:$xj, sub_128), uimm3:$imm)>; 1597def : Pat<(i64 (vector_extract v8i32:$xj, uimm3:$imm)), 1598 (XVPICKVE2GR_W v8i32:$xj, uimm3:$imm)>; 1599def : Pat<(i64 (vector_extract v4i64:$xj, uimm2:$imm)), 1600 (XVPICKVE2GR_D v4i64:$xj, uimm2:$imm)>; 1601def : Pat<(f32 (vector_extract v8f32:$xj, uimm3:$imm)), 1602 (MOVGR2FR_W (XVPICKVE2GR_W v8f32:$xj, uimm3:$imm))>; 1603def : Pat<(f64 (vector_extract v4f64:$xj, uimm2:$imm)), 1604 (MOVGR2FR_D (XVPICKVE2GR_D v4f64:$xj, uimm2:$imm))>; 1605 1606// vselect 1607def : Pat<(v32i8 (vselect LASX256:$xd, (v32i8 (SplatPat_uimm8 uimm8:$imm)), 1608 LASX256:$xj)), 1609 (XVBITSELI_B LASX256:$xd, LASX256:$xj, uimm8:$imm)>; 1610foreach vt = [v32i8, v16i16, v8i32, v4i64, v8f32, v4f64] in 1611 def : Pat<(vt (vselect LASX256:$xa, LASX256:$xk, LASX256:$xj)), 1612 (XVBITSEL_V LASX256:$xj, LASX256:$xk, LASX256:$xa)>; 1613 1614// fneg 1615def : Pat<(fneg (v8f32 LASX256:$xj)), (XVBITREVI_W LASX256:$xj, 31)>; 1616def : Pat<(fneg (v4f64 LASX256:$xj)), (XVBITREVI_D LASX256:$xj, 63)>; 1617 1618// XVFFINT_{S_W/D_L} 1619def : Pat<(v8f32 (sint_to_fp v8i32:$vj)), (XVFFINT_S_W v8i32:$vj)>; 1620def : Pat<(v4f64 (sint_to_fp v4i64:$vj)), (XVFFINT_D_L v4i64:$vj)>; 1621def : Pat<(v4f64 (sint_to_fp v4i32:$vj)), 1622 (XVFFINT_D_L (VEXT2XV_D_W (SUBREG_TO_REG (i64 0), v4i32:$vj, 1623 sub_128)))>; 1624def : Pat<(v4f32 (sint_to_fp v4i64:$vj)), 1625 (EXTRACT_SUBREG (XVFCVT_S_D (XVPERMI_D (XVFFINT_D_L v4i64:$vj), 238), 1626 (XVFFINT_D_L v4i64:$vj)), 1627 sub_128)>; 1628 1629// XVFFINT_{S_WU/D_LU} 1630def : Pat<(v8f32 (uint_to_fp v8i32:$vj)), (XVFFINT_S_WU v8i32:$vj)>; 1631def : Pat<(v4f64 (uint_to_fp v4i64:$vj)), (XVFFINT_D_LU v4i64:$vj)>; 1632def : Pat<(v4f64 (uint_to_fp v4i32:$vj)), 1633 (XVFFINT_D_LU (VEXT2XV_DU_WU (SUBREG_TO_REG (i64 0), v4i32:$vj, 1634 sub_128)))>; 1635def : Pat<(v4f32 (uint_to_fp v4i64:$vj)), 1636 (EXTRACT_SUBREG (XVFCVT_S_D (XVPERMI_D (XVFFINT_D_LU v4i64:$vj), 238), 1637 (XVFFINT_D_LU v4i64:$vj)), 1638 sub_128)>; 1639 1640// XVFTINTRZ_{W_S/L_D} 1641def : Pat<(v8i32 (fp_to_sint v8f32:$vj)), (XVFTINTRZ_W_S v8f32:$vj)>; 1642def : Pat<(v4i64 (fp_to_sint v4f64:$vj)), (XVFTINTRZ_L_D v4f64:$vj)>; 1643def : Pat<(v4i64 (fp_to_sint v4f32:$vj)), 1644 (VEXT2XV_D_W (SUBREG_TO_REG (i64 0), (VFTINTRZ_W_S v4f32:$vj), 1645 sub_128))>; 1646def : Pat<(v4i32 (fp_to_sint (v4f64 LASX256:$vj))), 1647 (EXTRACT_SUBREG (XVFTINTRZ_W_S (XVFCVT_S_D (XVPERMI_D v4f64:$vj, 238), 1648 v4f64:$vj)), 1649 sub_128)>; 1650 1651// XVFTINTRZ_{W_SU/L_DU} 1652def : Pat<(v8i32 (fp_to_uint v8f32:$vj)), (XVFTINTRZ_WU_S v8f32:$vj)>; 1653def : Pat<(v4i64 (fp_to_uint v4f64:$vj)), (XVFTINTRZ_LU_D v4f64:$vj)>; 1654def : Pat<(v4i64 (fp_to_uint v4f32:$vj)), 1655 (VEXT2XV_DU_WU (SUBREG_TO_REG (i64 0), (VFTINTRZ_WU_S v4f32:$vj), 1656 sub_128))>; 1657def : Pat<(v4i32 (fp_to_uint (v4f64 LASX256:$vj))), 1658 (EXTRACT_SUBREG (XVFTINTRZ_W_S (XVFCVT_S_D (XVPERMI_D v4f64:$vj, 238), 1659 v4f64:$vj)), 1660 sub_128)>; 1661 1662} // Predicates = [HasExtLASX] 1663 1664/// Intrinsic pattern 1665 1666class deriveLASXIntrinsic<string Inst> { 1667 Intrinsic ret = !cast<Intrinsic>(!tolower("int_loongarch_lasx_"#Inst)); 1668} 1669 1670let Predicates = [HasExtLASX] in { 1671 1672// vty: v32i8/v16i16/v8i32/v4i64 1673// Pat<(Intrinsic vty:$xj, vty:$xk), 1674// (LAInst vty:$xj, vty:$xk)>; 1675foreach Inst = ["XVSADD_B", "XVSADD_BU", "XVSSUB_B", "XVSSUB_BU", 1676 "XVHADDW_H_B", "XVHADDW_HU_BU", "XVHSUBW_H_B", "XVHSUBW_HU_BU", 1677 "XVADDWEV_H_B", "XVADDWOD_H_B", "XVSUBWEV_H_B", "XVSUBWOD_H_B", 1678 "XVADDWEV_H_BU", "XVADDWOD_H_BU", "XVSUBWEV_H_BU", "XVSUBWOD_H_BU", 1679 "XVADDWEV_H_BU_B", "XVADDWOD_H_BU_B", 1680 "XVAVG_B", "XVAVG_BU", "XVAVGR_B", "XVAVGR_BU", 1681 "XVABSD_B", "XVABSD_BU", "XVADDA_B", "XVMUH_B", "XVMUH_BU", 1682 "XVMULWEV_H_B", "XVMULWOD_H_B", "XVMULWEV_H_BU", "XVMULWOD_H_BU", 1683 "XVMULWEV_H_BU_B", "XVMULWOD_H_BU_B", "XVSIGNCOV_B", 1684 "XVANDN_V", "XVORN_V", "XVROTR_B", "XVSRLR_B", "XVSRAR_B", 1685 "XVSEQ_B", "XVSLE_B", "XVSLE_BU", "XVSLT_B", "XVSLT_BU", 1686 "XVPACKEV_B", "XVPACKOD_B", "XVPICKEV_B", "XVPICKOD_B", 1687 "XVILVL_B", "XVILVH_B"] in 1688 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1689 (v32i8 LASX256:$xj), (v32i8 LASX256:$xk)), 1690 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk)>; 1691foreach Inst = ["XVSADD_H", "XVSADD_HU", "XVSSUB_H", "XVSSUB_HU", 1692 "XVHADDW_W_H", "XVHADDW_WU_HU", "XVHSUBW_W_H", "XVHSUBW_WU_HU", 1693 "XVADDWEV_W_H", "XVADDWOD_W_H", "XVSUBWEV_W_H", "XVSUBWOD_W_H", 1694 "XVADDWEV_W_HU", "XVADDWOD_W_HU", "XVSUBWEV_W_HU", "XVSUBWOD_W_HU", 1695 "XVADDWEV_W_HU_H", "XVADDWOD_W_HU_H", 1696 "XVAVG_H", "XVAVG_HU", "XVAVGR_H", "XVAVGR_HU", 1697 "XVABSD_H", "XVABSD_HU", "XVADDA_H", "XVMUH_H", "XVMUH_HU", 1698 "XVMULWEV_W_H", "XVMULWOD_W_H", "XVMULWEV_W_HU", "XVMULWOD_W_HU", 1699 "XVMULWEV_W_HU_H", "XVMULWOD_W_HU_H", "XVSIGNCOV_H", "XVROTR_H", 1700 "XVSRLR_H", "XVSRAR_H", "XVSRLN_B_H", "XVSRAN_B_H", "XVSRLRN_B_H", 1701 "XVSRARN_B_H", "XVSSRLN_B_H", "XVSSRAN_B_H", "XVSSRLN_BU_H", 1702 "XVSSRAN_BU_H", "XVSSRLRN_B_H", "XVSSRARN_B_H", "XVSSRLRN_BU_H", 1703 "XVSSRARN_BU_H", 1704 "XVSEQ_H", "XVSLE_H", "XVSLE_HU", "XVSLT_H", "XVSLT_HU", 1705 "XVPACKEV_H", "XVPACKOD_H", "XVPICKEV_H", "XVPICKOD_H", 1706 "XVILVL_H", "XVILVH_H"] in 1707 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1708 (v16i16 LASX256:$xj), (v16i16 LASX256:$xk)), 1709 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk)>; 1710foreach Inst = ["XVSADD_W", "XVSADD_WU", "XVSSUB_W", "XVSSUB_WU", 1711 "XVHADDW_D_W", "XVHADDW_DU_WU", "XVHSUBW_D_W", "XVHSUBW_DU_WU", 1712 "XVADDWEV_D_W", "XVADDWOD_D_W", "XVSUBWEV_D_W", "XVSUBWOD_D_W", 1713 "XVADDWEV_D_WU", "XVADDWOD_D_WU", "XVSUBWEV_D_WU", "XVSUBWOD_D_WU", 1714 "XVADDWEV_D_WU_W", "XVADDWOD_D_WU_W", 1715 "XVAVG_W", "XVAVG_WU", "XVAVGR_W", "XVAVGR_WU", 1716 "XVABSD_W", "XVABSD_WU", "XVADDA_W", "XVMUH_W", "XVMUH_WU", 1717 "XVMULWEV_D_W", "XVMULWOD_D_W", "XVMULWEV_D_WU", "XVMULWOD_D_WU", 1718 "XVMULWEV_D_WU_W", "XVMULWOD_D_WU_W", "XVSIGNCOV_W", "XVROTR_W", 1719 "XVSRLR_W", "XVSRAR_W", "XVSRLN_H_W", "XVSRAN_H_W", "XVSRLRN_H_W", 1720 "XVSRARN_H_W", "XVSSRLN_H_W", "XVSSRAN_H_W", "XVSSRLN_HU_W", 1721 "XVSSRAN_HU_W", "XVSSRLRN_H_W", "XVSSRARN_H_W", "XVSSRLRN_HU_W", 1722 "XVSSRARN_HU_W", 1723 "XVSEQ_W", "XVSLE_W", "XVSLE_WU", "XVSLT_W", "XVSLT_WU", 1724 "XVPACKEV_W", "XVPACKOD_W", "XVPICKEV_W", "XVPICKOD_W", 1725 "XVILVL_W", "XVILVH_W", "XVPERM_W"] in 1726 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1727 (v8i32 LASX256:$xj), (v8i32 LASX256:$xk)), 1728 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk)>; 1729foreach Inst = ["XVADD_Q", "XVSUB_Q", 1730 "XVSADD_D", "XVSADD_DU", "XVSSUB_D", "XVSSUB_DU", 1731 "XVHADDW_Q_D", "XVHADDW_QU_DU", "XVHSUBW_Q_D", "XVHSUBW_QU_DU", 1732 "XVADDWEV_Q_D", "XVADDWOD_Q_D", "XVSUBWEV_Q_D", "XVSUBWOD_Q_D", 1733 "XVADDWEV_Q_DU", "XVADDWOD_Q_DU", "XVSUBWEV_Q_DU", "XVSUBWOD_Q_DU", 1734 "XVADDWEV_Q_DU_D", "XVADDWOD_Q_DU_D", 1735 "XVAVG_D", "XVAVG_DU", "XVAVGR_D", "XVAVGR_DU", 1736 "XVABSD_D", "XVABSD_DU", "XVADDA_D", "XVMUH_D", "XVMUH_DU", 1737 "XVMULWEV_Q_D", "XVMULWOD_Q_D", "XVMULWEV_Q_DU", "XVMULWOD_Q_DU", 1738 "XVMULWEV_Q_DU_D", "XVMULWOD_Q_DU_D", "XVSIGNCOV_D", "XVROTR_D", 1739 "XVSRLR_D", "XVSRAR_D", "XVSRLN_W_D", "XVSRAN_W_D", "XVSRLRN_W_D", 1740 "XVSRARN_W_D", "XVSSRLN_W_D", "XVSSRAN_W_D", "XVSSRLN_WU_D", 1741 "XVSSRAN_WU_D", "XVSSRLRN_W_D", "XVSSRARN_W_D", "XVSSRLRN_WU_D", 1742 "XVSSRARN_WU_D", "XVFFINT_S_L", 1743 "XVSEQ_D", "XVSLE_D", "XVSLE_DU", "XVSLT_D", "XVSLT_DU", 1744 "XVPACKEV_D", "XVPACKOD_D", "XVPICKEV_D", "XVPICKOD_D", 1745 "XVILVL_D", "XVILVH_D"] in 1746 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1747 (v4i64 LASX256:$xj), (v4i64 LASX256:$xk)), 1748 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk)>; 1749 1750// vty: v32i8/v16i16/v8i32/v4i64 1751// Pat<(Intrinsic vty:$xd, vty:$xj, vty:$xk), 1752// (LAInst vty:$xd, vty:$xj, vty:$xk)>; 1753foreach Inst = ["XVMADDWEV_H_B", "XVMADDWOD_H_B", "XVMADDWEV_H_BU", 1754 "XVMADDWOD_H_BU", "XVMADDWEV_H_BU_B", "XVMADDWOD_H_BU_B"] in 1755 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1756 (v16i16 LASX256:$xd), (v32i8 LASX256:$xj), (v32i8 LASX256:$xk)), 1757 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 1758foreach Inst = ["XVMADDWEV_W_H", "XVMADDWOD_W_H", "XVMADDWEV_W_HU", 1759 "XVMADDWOD_W_HU", "XVMADDWEV_W_HU_H", "XVMADDWOD_W_HU_H"] in 1760 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1761 (v8i32 LASX256:$xd), (v16i16 LASX256:$xj), (v16i16 LASX256:$xk)), 1762 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 1763foreach Inst = ["XVMADDWEV_D_W", "XVMADDWOD_D_W", "XVMADDWEV_D_WU", 1764 "XVMADDWOD_D_WU", "XVMADDWEV_D_WU_W", "XVMADDWOD_D_WU_W"] in 1765 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1766 (v4i64 LASX256:$xd), (v8i32 LASX256:$xj), (v8i32 LASX256:$xk)), 1767 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 1768foreach Inst = ["XVMADDWEV_Q_D", "XVMADDWOD_Q_D", "XVMADDWEV_Q_DU", 1769 "XVMADDWOD_Q_DU", "XVMADDWEV_Q_DU_D", "XVMADDWOD_Q_DU_D"] in 1770 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1771 (v4i64 LASX256:$xd), (v4i64 LASX256:$xj), (v4i64 LASX256:$xk)), 1772 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 1773 1774// vty: v32i8/v16i16/v8i32/v4i64 1775// Pat<(Intrinsic vty:$xj), 1776// (LAInst vty:$xj)>; 1777foreach Inst = ["XVEXTH_H_B", "XVEXTH_HU_BU", 1778 "XVMSKLTZ_B", "XVMSKGEZ_B", "XVMSKNZ_B", 1779 "XVCLO_B", "VEXT2XV_H_B", "VEXT2XV_HU_BU", 1780 "VEXT2XV_W_B", "VEXT2XV_WU_BU", "VEXT2XV_D_B", 1781 "VEXT2XV_DU_BU", "XVREPLVE0_B", "XVREPLVE0_Q"] in 1782 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v32i8 LASX256:$xj)), 1783 (!cast<LAInst>(Inst) LASX256:$xj)>; 1784foreach Inst = ["XVEXTH_W_H", "XVEXTH_WU_HU", "XVMSKLTZ_H", 1785 "XVCLO_H", "XVFCVTL_S_H", "XVFCVTH_S_H", 1786 "VEXT2XV_W_H", "VEXT2XV_WU_HU", "VEXT2XV_D_H", 1787 "VEXT2XV_DU_HU", "XVREPLVE0_H"] in 1788 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v16i16 LASX256:$xj)), 1789 (!cast<LAInst>(Inst) LASX256:$xj)>; 1790foreach Inst = ["XVEXTH_D_W", "XVEXTH_DU_WU", "XVMSKLTZ_W", 1791 "XVCLO_W", "XVFFINT_S_W", "XVFFINT_S_WU", 1792 "XVFFINTL_D_W", "XVFFINTH_D_W", 1793 "VEXT2XV_D_W", "VEXT2XV_DU_WU", "XVREPLVE0_W"] in 1794 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v8i32 LASX256:$xj)), 1795 (!cast<LAInst>(Inst) LASX256:$xj)>; 1796foreach Inst = ["XVEXTH_Q_D", "XVEXTH_QU_DU", "XVMSKLTZ_D", 1797 "XVEXTL_Q_D", "XVEXTL_QU_DU", 1798 "XVCLO_D", "XVFFINT_D_L", "XVFFINT_D_LU", 1799 "XVREPLVE0_D"] in 1800 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v4i64 LASX256:$xj)), 1801 (!cast<LAInst>(Inst) LASX256:$xj)>; 1802 1803// Pat<(Intrinsic timm:$imm) 1804// (LAInst timm:$imm)>; 1805def : Pat<(int_loongarch_lasx_xvldi timm:$imm), 1806 (XVLDI (to_valid_timm timm:$imm))>; 1807foreach Inst = ["XVREPLI_B", "XVREPLI_H", "XVREPLI_W", "XVREPLI_D"] in 1808 def : Pat<(deriveLASXIntrinsic<Inst>.ret timm:$imm), 1809 (!cast<LAInst>("Pseudo"#Inst) (to_valid_timm timm:$imm))>; 1810 1811// vty: v32i8/v16i16/v8i32/v4i64 1812// Pat<(Intrinsic vty:$xj, timm:$imm) 1813// (LAInst vty:$xj, timm:$imm)>; 1814foreach Inst = ["XVSAT_B", "XVSAT_BU", "XVNORI_B", "XVROTRI_B", "XVSLLWIL_H_B", 1815 "XVSLLWIL_HU_BU", "XVSRLRI_B", "XVSRARI_B", 1816 "XVSEQI_B", "XVSLEI_B", "XVSLEI_BU", "XVSLTI_B", "XVSLTI_BU", 1817 "XVREPL128VEI_B", "XVBSLL_V", "XVBSRL_V", "XVSHUF4I_B"] in 1818 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v32i8 LASX256:$xj), timm:$imm), 1819 (!cast<LAInst>(Inst) LASX256:$xj, (to_valid_timm timm:$imm))>; 1820foreach Inst = ["XVSAT_H", "XVSAT_HU", "XVROTRI_H", "XVSLLWIL_W_H", 1821 "XVSLLWIL_WU_HU", "XVSRLRI_H", "XVSRARI_H", 1822 "XVSEQI_H", "XVSLEI_H", "XVSLEI_HU", "XVSLTI_H", "XVSLTI_HU", 1823 "XVREPL128VEI_H", "XVSHUF4I_H"] in 1824 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v16i16 LASX256:$xj), timm:$imm), 1825 (!cast<LAInst>(Inst) LASX256:$xj, (to_valid_timm timm:$imm))>; 1826foreach Inst = ["XVSAT_W", "XVSAT_WU", "XVROTRI_W", "XVSLLWIL_D_W", 1827 "XVSLLWIL_DU_WU", "XVSRLRI_W", "XVSRARI_W", 1828 "XVSEQI_W", "XVSLEI_W", "XVSLEI_WU", "XVSLTI_W", "XVSLTI_WU", 1829 "XVREPL128VEI_W", "XVSHUF4I_W", "XVPICKVE_W"] in 1830 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v8i32 LASX256:$xj), timm:$imm), 1831 (!cast<LAInst>(Inst) LASX256:$xj, (to_valid_timm timm:$imm))>; 1832foreach Inst = ["XVSAT_D", "XVSAT_DU", "XVROTRI_D", "XVSRLRI_D", "XVSRARI_D", 1833 "XVSEQI_D", "XVSLEI_D", "XVSLEI_DU", "XVSLTI_D", "XVSLTI_DU", 1834 "XVPICKVE2GR_D", "XVPICKVE2GR_DU", 1835 "XVREPL128VEI_D", "XVPERMI_D", "XVPICKVE_D"] in 1836 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v4i64 LASX256:$xj), timm:$imm), 1837 (!cast<LAInst>(Inst) LASX256:$xj, (to_valid_timm timm:$imm))>; 1838 1839// vty: v32i8/v16i16/v8i32/v4i64 1840// Pat<(Intrinsic vty:$xd, vty:$xj, timm:$imm) 1841// (LAInst vty:$xd, vty:$xj, timm:$imm)>; 1842foreach Inst = ["XVSRLNI_B_H", "XVSRANI_B_H", "XVSRLRNI_B_H", "XVSRARNI_B_H", 1843 "XVSSRLNI_B_H", "XVSSRANI_B_H", "XVSSRLNI_BU_H", "XVSSRANI_BU_H", 1844 "XVSSRLRNI_B_H", "XVSSRARNI_B_H", "XVSSRLRNI_BU_H", "XVSSRARNI_BU_H", 1845 "XVFRSTPI_B", "XVBITSELI_B", "XVEXTRINS_B", "XVPERMI_Q"] in 1846 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1847 (v32i8 LASX256:$xd), (v32i8 LASX256:$xj), timm:$imm), 1848 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, 1849 (to_valid_timm timm:$imm))>; 1850foreach Inst = ["XVSRLNI_H_W", "XVSRANI_H_W", "XVSRLRNI_H_W", "XVSRARNI_H_W", 1851 "XVSSRLNI_H_W", "XVSSRANI_H_W", "XVSSRLNI_HU_W", "XVSSRANI_HU_W", 1852 "XVSSRLRNI_H_W", "XVSSRARNI_H_W", "XVSSRLRNI_HU_W", "XVSSRARNI_HU_W", 1853 "XVFRSTPI_H", "XVEXTRINS_H"] in 1854 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1855 (v16i16 LASX256:$xd), (v16i16 LASX256:$xj), timm:$imm), 1856 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, 1857 (to_valid_timm timm:$imm))>; 1858foreach Inst = ["XVSRLNI_W_D", "XVSRANI_W_D", "XVSRLRNI_W_D", "XVSRARNI_W_D", 1859 "XVSSRLNI_W_D", "XVSSRANI_W_D", "XVSSRLNI_WU_D", "XVSSRANI_WU_D", 1860 "XVSSRLRNI_W_D", "XVSSRARNI_W_D", "XVSSRLRNI_WU_D", "XVSSRARNI_WU_D", 1861 "XVPERMI_W", "XVEXTRINS_W", "XVINSVE0_W"] in 1862 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1863 (v8i32 LASX256:$xd), (v8i32 LASX256:$xj), timm:$imm), 1864 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, 1865 (to_valid_timm timm:$imm))>; 1866foreach Inst = ["XVSRLNI_D_Q", "XVSRANI_D_Q", "XVSRLRNI_D_Q", "XVSRARNI_D_Q", 1867 "XVSSRLNI_D_Q", "XVSSRANI_D_Q", "XVSSRLNI_DU_Q", "XVSSRANI_DU_Q", 1868 "XVSSRLRNI_D_Q", "XVSSRARNI_D_Q", "XVSSRLRNI_DU_Q", "XVSSRARNI_DU_Q", 1869 "XVSHUF4I_D", "XVEXTRINS_D", "XVINSVE0_D"] in 1870 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1871 (v4i64 LASX256:$xd), (v4i64 LASX256:$xj), timm:$imm), 1872 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, 1873 (to_valid_timm timm:$imm))>; 1874 1875// vty: v32i8/v16i16/v8i32/v4i64 1876// Pat<(Intrinsic vty:$xd, vty:$xj, vty:$xk), 1877// (LAInst vty:$xd, vty:$xj, vty:$xk)>; 1878foreach Inst = ["XVFRSTP_B", "XVBITSEL_V", "XVSHUF_B"] in 1879 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1880 (v32i8 LASX256:$xd), (v32i8 LASX256:$xj), (v32i8 LASX256:$xk)), 1881 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 1882foreach Inst = ["XVFRSTP_H", "XVSHUF_H"] in 1883 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1884 (v16i16 LASX256:$xd), (v16i16 LASX256:$xj), (v16i16 LASX256:$xk)), 1885 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 1886def : Pat<(int_loongarch_lasx_xvshuf_w (v8i32 LASX256:$xd), (v8i32 LASX256:$xj), 1887 (v8i32 LASX256:$xk)), 1888 (XVSHUF_W LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 1889def : Pat<(int_loongarch_lasx_xvshuf_d (v4i64 LASX256:$xd), (v4i64 LASX256:$xj), 1890 (v4i64 LASX256:$xk)), 1891 (XVSHUF_D LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 1892 1893// vty: v8f32/v4f64 1894// Pat<(Intrinsic vty:$xj, vty:$xk, vty:$xa), 1895// (LAInst vty:$xj, vty:$xk, vty:$xa)>; 1896foreach Inst = ["XVFMSUB_S", "XVFNMADD_S", "XVFNMSUB_S"] in 1897 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1898 (v8f32 LASX256:$xj), (v8f32 LASX256:$xk), (v8f32 LASX256:$xa)), 1899 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk, LASX256:$xa)>; 1900foreach Inst = ["XVFMSUB_D", "XVFNMADD_D", "XVFNMSUB_D"] in 1901 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1902 (v4f64 LASX256:$xj), (v4f64 LASX256:$xk), (v4f64 LASX256:$xa)), 1903 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk, LASX256:$xa)>; 1904 1905// vty: v8f32/v4f64 1906// Pat<(Intrinsic vty:$xj, vty:$xk), 1907// (LAInst vty:$xj, vty:$xk)>; 1908foreach Inst = ["XVFMAX_S", "XVFMIN_S", "XVFMAXA_S", "XVFMINA_S", "XVFCVT_H_S", 1909 "XVFCMP_CAF_S", "XVFCMP_CUN_S", "XVFCMP_CEQ_S", "XVFCMP_CUEQ_S", 1910 "XVFCMP_CLT_S", "XVFCMP_CULT_S", "XVFCMP_CLE_S", "XVFCMP_CULE_S", 1911 "XVFCMP_CNE_S", "XVFCMP_COR_S", "XVFCMP_CUNE_S", 1912 "XVFCMP_SAF_S", "XVFCMP_SUN_S", "XVFCMP_SEQ_S", "XVFCMP_SUEQ_S", 1913 "XVFCMP_SLT_S", "XVFCMP_SULT_S", "XVFCMP_SLE_S", "XVFCMP_SULE_S", 1914 "XVFCMP_SNE_S", "XVFCMP_SOR_S", "XVFCMP_SUNE_S"] in 1915 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1916 (v8f32 LASX256:$xj), (v8f32 LASX256:$xk)), 1917 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk)>; 1918foreach Inst = ["XVFMAX_D", "XVFMIN_D", "XVFMAXA_D", "XVFMINA_D", "XVFCVT_S_D", 1919 "XVFTINTRNE_W_D", "XVFTINTRZ_W_D", "XVFTINTRP_W_D", "XVFTINTRM_W_D", 1920 "XVFTINT_W_D", 1921 "XVFCMP_CAF_D", "XVFCMP_CUN_D", "XVFCMP_CEQ_D", "XVFCMP_CUEQ_D", 1922 "XVFCMP_CLT_D", "XVFCMP_CULT_D", "XVFCMP_CLE_D", "XVFCMP_CULE_D", 1923 "XVFCMP_CNE_D", "XVFCMP_COR_D", "XVFCMP_CUNE_D", 1924 "XVFCMP_SAF_D", "XVFCMP_SUN_D", "XVFCMP_SEQ_D", "XVFCMP_SUEQ_D", 1925 "XVFCMP_SLT_D", "XVFCMP_SULT_D", "XVFCMP_SLE_D", "XVFCMP_SULE_D", 1926 "XVFCMP_SNE_D", "XVFCMP_SOR_D", "XVFCMP_SUNE_D"] in 1927 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1928 (v4f64 LASX256:$xj), (v4f64 LASX256:$xk)), 1929 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk)>; 1930 1931// vty: v8f32/v4f64 1932// Pat<(Intrinsic vty:$xj), 1933// (LAInst vty:$xj)>; 1934foreach Inst = ["XVFLOGB_S", "XVFCLASS_S", "XVFSQRT_S", "XVFRECIP_S", "XVFRSQRT_S", 1935 "XVFRINT_S", "XVFCVTL_D_S", "XVFCVTH_D_S", 1936 "XVFRINTRNE_S", "XVFRINTRZ_S", "XVFRINTRP_S", "XVFRINTRM_S", 1937 "XVFTINTRNE_W_S", "XVFTINTRZ_W_S", "XVFTINTRP_W_S", "XVFTINTRM_W_S", 1938 "XVFTINT_W_S", "XVFTINTRZ_WU_S", "XVFTINT_WU_S", 1939 "XVFTINTRNEL_L_S", "XVFTINTRNEH_L_S", "XVFTINTRZL_L_S", 1940 "XVFTINTRZH_L_S", "XVFTINTRPL_L_S", "XVFTINTRPH_L_S", 1941 "XVFTINTRML_L_S", "XVFTINTRMH_L_S", "XVFTINTL_L_S", 1942 "XVFTINTH_L_S"] in 1943 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v8f32 LASX256:$xj)), 1944 (!cast<LAInst>(Inst) LASX256:$xj)>; 1945foreach Inst = ["XVFLOGB_D", "XVFCLASS_D", "XVFSQRT_D", "XVFRECIP_D", "XVFRSQRT_D", 1946 "XVFRINT_D", 1947 "XVFRINTRNE_D", "XVFRINTRZ_D", "XVFRINTRP_D", "XVFRINTRM_D", 1948 "XVFTINTRNE_L_D", "XVFTINTRZ_L_D", "XVFTINTRP_L_D", "XVFTINTRM_L_D", 1949 "XVFTINT_L_D", "XVFTINTRZ_LU_D", "XVFTINT_LU_D"] in 1950 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v4f64 LASX256:$xj)), 1951 (!cast<LAInst>(Inst) LASX256:$xj)>; 1952 1953// 256-Bit vector FP approximate reciprocal operation 1954let Predicates = [HasFrecipe] in { 1955foreach Inst = ["XVFRECIPE_S", "XVFRSQRTE_S"] in 1956 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v8f32 LASX256:$xj)), 1957 (!cast<LAInst>(Inst) LASX256:$xj)>; 1958foreach Inst = ["XVFRECIPE_D", "XVFRSQRTE_D"] in 1959 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v4f64 LASX256:$xj)), 1960 (!cast<LAInst>(Inst) LASX256:$xj)>; 1961} 1962 1963def : Pat<(int_loongarch_lasx_xvpickve_w_f v8f32:$xj, timm:$imm), 1964 (XVPICKVE_W v8f32:$xj, (to_valid_timm timm:$imm))>; 1965def : Pat<(int_loongarch_lasx_xvpickve_d_f v4f64:$xj, timm:$imm), 1966 (XVPICKVE_D v4f64:$xj, (to_valid_timm timm:$imm))>; 1967 1968// load 1969def : Pat<(int_loongarch_lasx_xvld GPR:$rj, timm:$imm), 1970 (XVLD GPR:$rj, (to_valid_timm timm:$imm))>; 1971def : Pat<(int_loongarch_lasx_xvldx GPR:$rj, GPR:$rk), 1972 (XVLDX GPR:$rj, GPR:$rk)>; 1973 1974def : Pat<(int_loongarch_lasx_xvldrepl_b GPR:$rj, timm:$imm), 1975 (XVLDREPL_B GPR:$rj, (to_valid_timm timm:$imm))>; 1976def : Pat<(int_loongarch_lasx_xvldrepl_h GPR:$rj, timm:$imm), 1977 (XVLDREPL_H GPR:$rj, (to_valid_timm timm:$imm))>; 1978def : Pat<(int_loongarch_lasx_xvldrepl_w GPR:$rj, timm:$imm), 1979 (XVLDREPL_W GPR:$rj, (to_valid_timm timm:$imm))>; 1980def : Pat<(int_loongarch_lasx_xvldrepl_d GPR:$rj, timm:$imm), 1981 (XVLDREPL_D GPR:$rj, (to_valid_timm timm:$imm))>; 1982 1983// store 1984def : Pat<(int_loongarch_lasx_xvst LASX256:$xd, GPR:$rj, timm:$imm), 1985 (XVST LASX256:$xd, GPR:$rj, (to_valid_timm timm:$imm))>; 1986def : Pat<(int_loongarch_lasx_xvstx LASX256:$xd, GPR:$rj, GPR:$rk), 1987 (XVSTX LASX256:$xd, GPR:$rj, GPR:$rk)>; 1988 1989def : Pat<(int_loongarch_lasx_xvstelm_b v32i8:$xd, GPR:$rj, timm:$imm, timm:$idx), 1990 (XVSTELM_B v32i8:$xd, GPR:$rj, (to_valid_timm timm:$imm), 1991 (to_valid_timm timm:$idx))>; 1992def : Pat<(int_loongarch_lasx_xvstelm_h v16i16:$xd, GPR:$rj, timm:$imm, timm:$idx), 1993 (XVSTELM_H v16i16:$xd, GPR:$rj, (to_valid_timm timm:$imm), 1994 (to_valid_timm timm:$idx))>; 1995def : Pat<(int_loongarch_lasx_xvstelm_w v8i32:$xd, GPR:$rj, timm:$imm, timm:$idx), 1996 (XVSTELM_W v8i32:$xd, GPR:$rj, (to_valid_timm timm:$imm), 1997 (to_valid_timm timm:$idx))>; 1998def : Pat<(int_loongarch_lasx_xvstelm_d v4i64:$xd, GPR:$rj, timm:$imm, timm:$idx), 1999 (XVSTELM_D v4i64:$xd, GPR:$rj, (to_valid_timm timm:$imm), 2000 (to_valid_timm timm:$idx))>; 2001 2002} // Predicates = [HasExtLASX] 2003